diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrFormats.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td index a0b5bd34738..683ab69bb62 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -7938,10 +7938,10 @@ multiclass SIMDFPScalarRShift<bit U, bits<5> opc, string asm> { let Inst{21-16} = imm{5-0}; let Inst{23-22} = 0b11; } - def DHr : BaseSIMDScalarShift<U, opc, {?,?,?,?,?,?,?}, + def DHr : BaseSIMDScalarShift<U, opc, {1,1,1,?,?,?,?}, FPR64, FPR16, vecshiftR64, asm, []> { let Inst{21-16} = imm{5-0}; - let Inst{23-22} = 0b11; + let Inst{23-22} = 0b01; let Inst{31} = 1; } def h : BaseSIMDScalarShift<U, opc, {0,0,1,?,?,?,?}, |
