diff options
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp | 12 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/apint-sub.ll | 6 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/sub.ll | 5 |
3 files changed, 9 insertions, 14 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp index 846a3640930..840a25fb813 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp @@ -1324,15 +1324,15 @@ Instruction *InstCombiner::visitSRem(BinaryOperator &I) { if (Instruction *Common = commonIRemTransforms(I)) return Common; - if (Value *RHSNeg = dyn_castNegVal(Op1)) - if (!isa<Constant>(RHSNeg) || - (isa<ConstantInt>(RHSNeg) && - cast<ConstantInt>(RHSNeg)->getValue().isStrictlyPositive())) { - // X % -Y -> X % Y + { + const APInt *Y; + // X % -Y -> X % Y + if (match(Op1, m_APInt(Y)) && Y->isNegative() && !Y->isMinSignedValue()) { Worklist.AddValue(I.getOperand(1)); - I.setOperand(1, RHSNeg); + I.setOperand(1, ConstantInt::get(I.getType(), -*Y)); return &I; } + } // If the sign bits of both operands are zero (i.e. we can prove they are // unsigned inputs), turn this into a urem. diff --git a/llvm/test/Transforms/InstCombine/apint-sub.ll b/llvm/test/Transforms/InstCombine/apint-sub.ll index df8ec52b5ab..3b69c17e183 100644 --- a/llvm/test/Transforms/InstCombine/apint-sub.ll +++ b/llvm/test/Transforms/InstCombine/apint-sub.ll @@ -95,12 +95,6 @@ define i1024 @test14(i1024 %A) { ret i1024 %D } -define i14 @test15(i14 %A, i14 %B) { - %C = sub i14 0, %A ; <i14> [#uses=1] - %D = srem i14 %B, %C ; <i14> [#uses=1] - ret i14 %D -} - define i51 @test16(i51 %A) { %X = sdiv i51 %A, 1123 ; <i51> [#uses=1] %Y = sub i51 0, %X ; <i51> [#uses=1] diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll index e0b3a07c233..1d1bedc0a7b 100644 --- a/llvm/test/Transforms/InstCombine/sub.ll +++ b/llvm/test/Transforms/InstCombine/sub.ll @@ -142,8 +142,9 @@ define i32 @test15(i32 %A, i32 %B) { %D = srem i32 %B, %C ret i32 %D ; CHECK-LABEL: @test15( -; CHECK: %D = srem i32 %B, %A -; CHECK: ret i32 %D +; CHECK: %[[sub:.*]] = sub i32 0, %A +; CHECK-NEXT: %[[rem:.*]] = srem i32 %B, %[[sub]] +; CHECK: ret i32 %[[rem]] } define i32 @test16(i32 %A) { |
