diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/FastISel.h | 13 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 23 | ||||
| -rw-r--r-- | llvm/utils/TableGen/FastISelEmitter.cpp | 3 |
3 files changed, 1 insertions, 38 deletions
diff --git a/llvm/include/llvm/CodeGen/FastISel.h b/llvm/include/llvm/CodeGen/FastISel.h index 3b97d1e1f29..cdaea250c33 100644 --- a/llvm/include/llvm/CodeGen/FastISel.h +++ b/llvm/include/llvm/CodeGen/FastISel.h @@ -356,19 +356,6 @@ protected: virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm); - /// \brief This method is called by target-independent code to request that an - /// instruction with the given type, opcode, and register and floating-point - /// immediate operands be emitted. - virtual unsigned fastEmit_rf(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, - bool Op0IsKill, const ConstantFP *FPImm); - - /// \brief This method is called by target-independent code to request that an - /// instruction with the given type, opcode, and register and immediate - /// operands be emitted. - virtual unsigned fastEmit_rri(MVT VT, MVT RetVT, unsigned Opcode, - unsigned Op0, bool Op0IsKill, unsigned Op1, - bool Op1IsKill, uint64_t Imm); - /// \brief This method is a wrapper of fastEmit_ri. /// /// It first tries to emit an instruction with an immediate operand using diff --git a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index 95b4ff7a46e..a246f12e96a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -455,17 +455,6 @@ bool FastISel::selectBinaryOp(const User *I, unsigned ISDOpcode) { return true; } - // Check if the second operand is a constant float. - if (const auto *CF = dyn_cast<ConstantFP>(I->getOperand(1))) { - unsigned ResultReg = fastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT(), - ISDOpcode, Op0, Op0IsKill, CF); - if (ResultReg) { - // We successfully emitted code for the given LLVM Instruction. - updateValueMap(I, ResultReg); - return true; - } - } - unsigned Op1 = getRegForValue(I->getOperand(1)); if (!Op1) // Unhandled operand. Halt "fast" selection and bail. return false; @@ -1725,18 +1714,6 @@ unsigned FastISel::fastEmit_ri(MVT, MVT, unsigned, unsigned /*Op0*/, return 0; } -unsigned FastISel::fastEmit_rf(MVT, MVT, unsigned, unsigned /*Op0*/, - bool /*Op0IsKill*/, - const ConstantFP * /*FPImm*/) { - return 0; -} - -unsigned FastISel::fastEmit_rri(MVT, MVT, unsigned, unsigned /*Op0*/, - bool /*Op0IsKill*/, unsigned /*Op1*/, - bool /*Op1IsKill*/, uint64_t /*Imm*/) { - return 0; -} - /// This method is a wrapper of fastEmit_ri. It first tries to emit an /// instruction with an immediate operand using fastEmit_ri. /// If that fails, it materializes the immediate into a register and try diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index debb12c4f51..30a57b502bf 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -564,8 +564,7 @@ void FastISelMap::collectPatterns(CodeGenDAGPatterns &CGP) { Operands.PrintManglingSuffix(SuffixOS, ImmediatePredicates, true); SuffixOS.flush(); if (!StringSwitch<bool>(ManglingSuffix) - .Cases("", "r", "rr", "ri", "rf", true) - .Cases("rri", "i", "f", true) + .Cases("", "r", "rr", "ri", "i", "f", true) .Default(false)) continue; |
