diff options
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td index 85fd1f5078b..74ec45d5864 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td @@ -32,13 +32,13 @@ let Defs = [ARGUMENTS] in { // Basic load. def LOAD_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [], - "i32.load\t$dst, $off($addr)">; + "i32.load\t$dst, ${off}(${addr})">; def LOAD_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load\t$dst, $off($addr)">; + "i64.load\t$dst, ${off}(${addr})">; def LOAD_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr), [], - "f32.load\t$dst, $off($addr)">; + "f32.load\t$dst, ${off}(${addr})">; def LOAD_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr), [], - "f64.load\t$dst, $off($addr)">; + "f64.load\t$dst, ${off}(${addr})">; } // Defs = [ARGUMENTS] @@ -100,25 +100,25 @@ let Defs = [ARGUMENTS] in { // Extending load. def LOAD8_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [], - "i32.load8_s\t$dst, $off($addr)">; + "i32.load8_s\t$dst, ${off}(${addr})">; def LOAD8_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [], - "i32.load8_u\t$dst, $off($addr)">; + "i32.load8_u\t$dst, ${off}(${addr})">; def LOAD16_S_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [], - "i32.load16_s\t$dst, $off($addr)">; + "i32.load16_s\t$dst, ${off}(${addr})">; def LOAD16_U_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr), [], - "i32.load16_u\t$dst, $off($addr)">; + "i32.load16_u\t$dst, ${off}(${addr})">; def LOAD8_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load8_s\t$dst, $off($addr)">; + "i64.load8_s\t$dst, ${off}(${addr})">; def LOAD8_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load8_u\t$dst, $off($addr)">; + "i64.load8_u\t$dst, ${off}(${addr})">; def LOAD16_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load16_s\t$dst, $off($addr)">; + "i64.load16_s\t$dst, ${off}(${addr})">; def LOAD16_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load16_u\t$dst, $off($addr)">; + "i64.load16_u\t$dst, ${off}(${addr})">; def LOAD32_S_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load32_s\t$dst, $off($addr)">; + "i64.load32_s\t$dst, ${off}(${addr})">; def LOAD32_U_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr), [], - "i64.load32_u\t$dst, $off($addr)">; + "i64.load32_u\t$dst, ${off}(${addr})">; } // Defs = [ARGUMENTS] @@ -326,13 +326,13 @@ let Defs = [ARGUMENTS] in { // operands. // Note: WebAssembly inverts SelectionDAG's usual operand order. def STORE_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [], - "i32.store\t$dst, $off($addr), $val">; + "i32.store\t$dst, ${off}(${addr}), $val">; def STORE_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [], - "i64.store\t$dst, $off($addr), $val">; + "i64.store\t$dst, ${off}(${addr}), $val">; def STORE_F32 : I<(outs F32:$dst), (ins i32imm:$off, I32:$addr, F32:$val), [], - "f32.store\t$dst, $off($addr), $val">; + "f32.store\t$dst, ${off}(${addr}), $val">; def STORE_F64 : I<(outs F64:$dst), (ins i32imm:$off, I32:$addr, F64:$val), [], - "f64.store\t$dst, $off($addr), $val">; + "f64.store\t$dst, ${off}(${addr}), $val">; } // Defs = [ARGUMENTS] @@ -398,15 +398,15 @@ let Defs = [ARGUMENTS] in { // Truncating store. def STORE8_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [], - "i32.store8\t$dst, $off($addr), $val">; + "i32.store8\t$dst, ${off}(${addr}), $val">; def STORE16_I32 : I<(outs I32:$dst), (ins i32imm:$off, I32:$addr, I32:$val), [], - "i32.store16\t$dst, $off($addr), $val">; + "i32.store16\t$dst, ${off}(${addr}), $val">; def STORE8_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [], - "i64.store8\t$dst, $off($addr), $val">; + "i64.store8\t$dst, ${off}(${addr}), $val">; def STORE16_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [], - "i64.store16\t$dst, $off($addr), $val">; + "i64.store16\t$dst, ${off}(${addr}), $val">; def STORE32_I64 : I<(outs I64:$dst), (ins i32imm:$off, I32:$addr, I64:$val), [], - "i64.store32\t$dst, $off($addr), $val">; + "i64.store32\t$dst, ${off}(${addr}), $val">; } // Defs = [ARGUMENTS] |
