diff options
| -rw-r--r-- | llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 9 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/ExecutionDepsFix.cpp | 13 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineRegisterInfo.cpp | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 9 |
4 files changed, 29 insertions, 14 deletions
diff --git a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h index 56c85475b5d..27cc122543c 100644 --- a/llvm/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/llvm/include/llvm/CodeGen/MachineRegisterInfo.h @@ -644,9 +644,16 @@ public: /// Return true if the specified register is modified in this function. /// This checks that no defining machine operands exist for the register or /// any of its aliases. Definitions found on functions marked noreturn are - /// ignored. + /// ignored. The register is also considered modified when it is set in the + /// UsedPhysRegMask. bool isPhysRegModified(unsigned PhysReg) const; + /// Return true if the specified register is modified or read in this + /// function. This checks that no machine operands exist for the register or + /// any of its aliases. The register is also considered used when it is set + /// in the UsedPhysRegMask. + bool isPhysRegUsed(unsigned PhysReg) const; + /// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. /// This corresponds to the bit mask attached to register mask operands. void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) { diff --git a/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/llvm/lib/CodeGen/ExecutionDepsFix.cpp index cbc3b80a6a5..c77f0f0c47c 100644 --- a/llvm/lib/CodeGen/ExecutionDepsFix.cpp +++ b/llvm/lib/CodeGen/ExecutionDepsFix.cpp @@ -733,13 +733,12 @@ bool ExeDepsFix::runOnMachineFunction(MachineFunction &mf) { // completely. bool anyregs = false; const MachineRegisterInfo &MRI = mf.getRegInfo(); - for (TargetRegisterClass::const_iterator I = RC->begin(), E = RC->end(); - I != E && !anyregs; ++I) - for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) - if (!MRI.reg_nodbg_empty(*AI)) { - anyregs = true; - break; - } + for (unsigned Reg : *RC) { + if (MRI.isPhysRegUsed(Reg)) { + anyregs = true; + break; + } + } if (!anyregs) return false; // Initialize the AliasMap on the first use. diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp index d3704efb631..574eefe67dd 100644 --- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -489,3 +489,15 @@ bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const { } return false; } + +bool MachineRegisterInfo::isPhysRegUsed(unsigned PhysReg) const { + if (UsedPhysRegMask.test(PhysReg)) + return true; + const TargetRegisterInfo *TRI = getTargetRegisterInfo(); + for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid(); + ++AliasReg) { + if (!reg_nodbg_empty(*AliasReg)) + return true; + } + return false; +} diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp index a0e6fba745c..544c3a3940d 100644 --- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp @@ -495,12 +495,9 @@ unsigned SIRegisterInfo::getPreloadedValue(const MachineFunction &MF, // AMDGPU::NoRegister. unsigned SIRegisterInfo::findUnusedRegister(const MachineRegisterInfo &MRI, const TargetRegisterClass *RC) const { - - for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end(); - I != E; ++I) { - if (MRI.reg_nodbg_empty(*I)) - return *I; - } + for (unsigned Reg : *RC) + if (!MRI.isPhysRegUsed(Reg)) + return Reg; return AMDGPU::NoRegister; } |
