diff options
| -rw-r--r-- | llvm/include/llvm/Target/TargetLowering.h | 1 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.h | 1 | 
5 files changed, 8 insertions, 3 deletions
diff --git a/llvm/include/llvm/Target/TargetLowering.h b/llvm/include/llvm/Target/TargetLowering.h index 24b0af1ed6d..fb25ca77ee5 100644 --- a/llvm/include/llvm/Target/TargetLowering.h +++ b/llvm/include/llvm/Target/TargetLowering.h @@ -1905,6 +1905,7 @@ public:    /// This method can be implemented by targets that want to expose additional    /// information about sign bits to the DAG Combiner.    virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op, +                                                   const SelectionDAG &DAG,                                                     unsigned Depth = 0) const;    struct DAGCombinerInfo { diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index d11ce804244..8f624508398 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2422,7 +2422,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{        Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||        Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||        Op.getOpcode() == ISD::INTRINSIC_VOID) { -    unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, Depth); +    unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);      if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);    } diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 5de0b030c7c..8948467997a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -1074,6 +1074,7 @@ void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,  /// targets that want to expose additional information about sign bits to the  /// DAG Combiner.  unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op, +                                                         const SelectionDAG &,                                                           unsigned Depth) const {    assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||            Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN || diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b91e066e6cc..28b49d98336 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -16576,8 +16576,10 @@ void X86TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,    }  } -unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op, -                                                         unsigned Depth) const { +unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode( +  SDValue Op, +  const SelectionDAG &, +  unsigned Depth) const {    // SETCC_CARRY sets the dest to ~0 for true or 0 for false.    if (Op.getOpcode() == X86ISD::SETCC_CARRY)      return Op.getValueType().getScalarType().getSizeInBits(); diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h index dd99453b7b5..3d4cf342a8e 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.h +++ b/llvm/lib/Target/X86/X86ISelLowering.h @@ -626,6 +626,7 @@ namespace llvm {      // ComputeNumSignBitsForTargetNode - Determine the number of bits in the      // operation that are sign bits.      unsigned ComputeNumSignBitsForTargetNode(SDValue Op, +                                             const SelectionDAG &DAG,                                               unsigned Depth) const override;      bool isGAPlusOffset(SDNode *N, const GlobalValue* &GA,  | 

