diff options
| -rw-r--r-- | llvm/test/CodeGen/RISCV/mir-target-flags.ll | 17 |
1 files changed, 7 insertions, 10 deletions
diff --git a/llvm/test/CodeGen/RISCV/mir-target-flags.ll b/llvm/test/CodeGen/RISCV/mir-target-flags.ll index fcfdcfdb2b4..f41fb77dbb0 100644 --- a/llvm/test/CodeGen/RISCV/mir-target-flags.ll +++ b/llvm/test/CodeGen/RISCV/mir-target-flags.ll @@ -26,16 +26,13 @@ define i32 @caller(i32 %a) nounwind { ; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_e ; RV32-SMALL-NEXT: target-flags(riscv-hi) @g_i ; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_i -; RV32-SMALL-NEXT: target-flags(riscv-tprel-hi) @t_un -; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_un -; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_un -; RV32-SMALL-NEXT: target-flags(riscv-tprel-hi) @t_ld -; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_ld -; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_ld -; RV32-SMALL-NEXT: target-flags(riscv-tprel-hi) @t_ie -; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_ie -; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_ie -; RV32-SMALL-NEXT: target-flags(riscv-tprel-hi) @t_le +; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_un +; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.1 +; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ld +; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.2 +; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ie +; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.3 +; RV32-SMALL: target-flags(riscv-tprel-hi) @t_le ; RV32-SMALL-NEXT: target-flags(riscv-tprel-add) @t_le ; RV32-SMALL-NEXT: target-flags(riscv-tprel-lo) @t_le ; RV32-SMALL: target-flags(riscv-call) @callee |
