4 files changed, 8 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-call.ll b/llvm/test/CodeGen/PowerPC/fast-isel-call.ll
index 8823beb9684..d3a1bea87d1 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-call.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-call.ll
@@ -1,8 +1,4 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
-; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -mattr=-vsx -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -relocation-model=pic -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -ppc-late-peephole=true | FileCheck %s --check-prefix=ELF64
 
 define i32 @t1(i8 signext %a) nounwind {
   %1 = sext i8 %a to i32
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-const.ll b/llvm/test/CodeGen/PowerPC/fast-isel-const.ll
index 3987e54a8d1..c0b9fe43926 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-const.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-const.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
 
 define zeroext i1 @testi1(i8 %in) nounwind {
 entry:
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
index 80a733c5da8..cb9e1c9256d 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll
@@ -1,8 +1,5 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
 ; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=-vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
+; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=VSX
 ; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=spe  -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=SPE
 
 ; This test verifies that load/store instructions are properly generated,
@@ -78,9 +75,11 @@ define double @t6() nounwind {
 ; SPE: t6
   %1 = load double, double* @f, align 8
 ; ELF64: lfd
+; VSX: lxsdx
 ; SPE: evldd
   %2 = fadd double %1, 1.0
 ; ELF64: fadd
+; VSX: xsadddp
 ; SPE: efdadd
   ret double %2
 }
@@ -150,6 +149,8 @@ define void @t12(double %v) nounwind {
   store double %1, double* @f, align 8
 ; ELF64: fadd
 ; ELF64: stfd
+; VSX: xsadddp
+; VSX: stxsdx
 ; SPE: efdadd
 ; SPE: evstdd
   ret void
diff --git a/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll b/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
index 4c499e44e4f..5fe786129b5 100644
--- a/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
+++ b/llvm/test/CodeGen/PowerPC/fast-isel-ret.ll
@@ -1,8 +1,4 @@
-; FIXME: FastISel currently returns false if it hits code that uses VSX
-; registers and with -fast-isel-abort=1 turned on the test case will then fail.
-; When fastisel better supports VSX fix up this test case.
-;
-; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
+; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
 
 define zeroext i1 @rettrue() nounwind {
 entry: