diff options
| -rw-r--r-- | lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp | 23 | ||||
| -rw-r--r-- | lld/test/elf/Mips/rel-pc18-s3-align.test | 44 | ||||
| -rw-r--r-- | lld/test/elf/Mips/rel-pc19-s2-align.test | 44 | ||||
| -rw-r--r-- | lld/test/elf/Mips/rel-pc21-s2-align.test | 44 | ||||
| -rw-r--r-- | lld/test/elf/Mips/rel-pc26-s2-align.test | 44 |
5 files changed, 189 insertions, 10 deletions
diff --git a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp index d09010469bd..2292172a622 100644 --- a/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp +++ b/lld/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp @@ -296,34 +296,37 @@ static int64_t relocGPRel32(uint64_t S, int64_t A, uint64_t GP) { /// \brief R_MIPS_PC18_S3, R_MICROMIPS_PC18_S3 /// local/external: (S + A - P) >> 3 (P with cleared 3 less significant bits) -static int32_t relocPc18(uint64_t P, uint64_t S, int64_t A) { +static ErrorOr<int64_t> relocPc18(uint64_t P, uint64_t S, int64_t A) { A = llvm::SignExtend32<21>(A); - // FIXME (simon): Check that S + A has 8-byte alignment - int32_t result = S + A - ((P | 7) ^ 7); - return result; + if ((S + A) & 6) + return make_unaligned_range_reloc_error(); + return S + A - ((P | 7) ^ 7); } /// \brief R_MIPS_PC19_S2, R_MICROMIPS_PC19_S2 /// local/external: (S + A - P) >> 2 -static int32_t relocPc19(uint64_t P, uint64_t S, int64_t A) { +static ErrorOr<int64_t> relocPc19(uint64_t P, uint64_t S, int64_t A) { A = llvm::SignExtend32<21>(A); - // FIXME (simon): Check that S + A has 4-byte alignment + if ((S + A) & 2) + return make_unaligned_range_reloc_error(); return S + A - P; } /// \brief R_MIPS_PC21_S2, R_MICROMIPS_PC21_S2 /// local/external: (S + A - P) >> 2 -static int32_t relocPc21(uint64_t P, uint64_t S, int64_t A) { +static ErrorOr<int64_t> relocPc21(uint64_t P, uint64_t S, int64_t A) { A = llvm::SignExtend32<23>(A); - // FIXME (simon): Check that S + A has 4-byte alignment + if ((S + A) & 2) + return make_unaligned_range_reloc_error(); return S + A - P; } /// \brief R_MIPS_PC26_S2, R_MICROMIPS_PC26_S2 /// local/external: (S + A - P) >> 2 -static int32_t relocPc26(uint64_t P, uint64_t S, int64_t A) { +static ErrorOr<int64_t> relocPc26(uint64_t P, uint64_t S, int64_t A) { A = llvm::SignExtend32<28>(A); - // FIXME (simon): Check that S + A has 4-byte alignment + if ((S + A) & 2) + return make_unaligned_range_reloc_error(); return S + A - P; } diff --git a/lld/test/elf/Mips/rel-pc18-s3-align.test b/lld/test/elf/Mips/rel-pc18-s3-align.test new file mode 100644 index 00000000000..29972bf5acc --- /dev/null +++ b/lld/test/elf/Mips/rel-pc18-s3-align.test @@ -0,0 +1,44 @@ +# Check incorrect alignment handling for R_MIPS_PC18_S3 relocation target. + +# RUN: yaml2obj -format=elf %s > %t.o +# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \ +# RUN: | FileCheck %s + +# CHECK: Relocation not aligned in file {{.*}} reference from T1+0 to T1+0 of type 62 (R_MIPS_PC18_S3) + +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_MIPS + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6] + +Sections: +- Name: .text + Type: SHT_PROGBITS + Content: "0000000000000000" +# ^ T0 ^ T1 + AddressAlign: 16 + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + +- Name: .rel.text + Type: SHT_REL + Info: .text + AddressAlign: 4 + Relocations: + - Offset: 4 + Symbol: T1 + Type: R_MIPS_PC18_S3 + +Symbols: + Global: + - Name: T0 + Section: .text + Type: STT_FUNC + Value: 0 + Size: 4 + - Name: T1 + Section: .text + Type: STT_FUNC + Value: 4 + Size: 4 diff --git a/lld/test/elf/Mips/rel-pc19-s2-align.test b/lld/test/elf/Mips/rel-pc19-s2-align.test new file mode 100644 index 00000000000..72b796c83f7 --- /dev/null +++ b/lld/test/elf/Mips/rel-pc19-s2-align.test @@ -0,0 +1,44 @@ +# Check incorrect alignment handling for R_MIPS_PC19_S2 relocation target. + +# RUN: yaml2obj -format=elf %s > %t.o +# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \ +# RUN: | FileCheck %s + +# CHECK: Relocation not aligned in file {{.*}} reference from T0+0 to T1+0 of type 63 (R_MIPS_PC19_S2) + +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_MIPS + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6] + +Sections: +- Name: .text + Type: SHT_PROGBITS + Content: "0000000000000000" +# ^ T0 ^ T1 + AddressAlign: 16 + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + +- Name: .rel.text + Type: SHT_REL + Info: .text + AddressAlign: 4 + Relocations: + - Offset: 0 + Symbol: T1 + Type: R_MIPS_PC19_S2 + +Symbols: + Global: + - Name: T0 + Section: .text + Type: STT_FUNC + Value: 0 + Size: 4 + - Name: T1 + Section: .text + Type: STT_FUNC + Value: 6 + Size: 2 diff --git a/lld/test/elf/Mips/rel-pc21-s2-align.test b/lld/test/elf/Mips/rel-pc21-s2-align.test new file mode 100644 index 00000000000..f56b298cdf0 --- /dev/null +++ b/lld/test/elf/Mips/rel-pc21-s2-align.test @@ -0,0 +1,44 @@ +# Check incorrect alignment handling for R_MIPS_PC21_S2 relocation target. + +# RUN: yaml2obj -format=elf %s > %t.o +# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \ +# RUN: | FileCheck %s + +# CHECK: Relocation not aligned in file {{.*}} reference from T0+0 to T1+0 of type 60 (R_MIPS_PC21_S2) + +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_MIPS + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6] + +Sections: +- Name: .text + Type: SHT_PROGBITS + Content: "0000000000000000" +# ^ T0 ^ T1 + AddressAlign: 16 + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + +- Name: .rel.text + Type: SHT_REL + Info: .text + AddressAlign: 4 + Relocations: + - Offset: 0 + Symbol: T1 + Type: R_MIPS_PC21_S2 + +Symbols: + Global: + - Name: T0 + Section: .text + Type: STT_FUNC + Value: 0 + Size: 4 + - Name: T1 + Section: .text + Type: STT_FUNC + Value: 6 + Size: 2 diff --git a/lld/test/elf/Mips/rel-pc26-s2-align.test b/lld/test/elf/Mips/rel-pc26-s2-align.test new file mode 100644 index 00000000000..52c66205b52 --- /dev/null +++ b/lld/test/elf/Mips/rel-pc26-s2-align.test @@ -0,0 +1,44 @@ +# Check incorrect alignment handling for R_MIPS_PC26_S2 relocation target. + +# RUN: yaml2obj -format=elf %s > %t.o +# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \ +# RUN: | FileCheck %s + +# CHECK: Relocation not aligned in file {{.*}} reference from T0+0 to T1+0 of type 61 (R_MIPS_PC26_S2) + +FileHeader: + Class: ELFCLASS32 + Data: ELFDATA2LSB + Type: ET_REL + Machine: EM_MIPS + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6] + +Sections: +- Name: .text + Type: SHT_PROGBITS + Content: "0000000000000000" +# ^ T0 ^ T1 + AddressAlign: 16 + Flags: [ SHF_ALLOC, SHF_EXECINSTR ] + +- Name: .rel.text + Type: SHT_REL + Info: .text + AddressAlign: 4 + Relocations: + - Offset: 0 + Symbol: T1 + Type: R_MIPS_PC26_S2 + +Symbols: + Global: + - Name: T0 + Section: .text + Type: STT_FUNC + Value: 0 + Size: 4 + - Name: T1 + Section: .text + Type: STT_FUNC + Value: 6 + Size: 2 |

