diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/shifter_operand.ll | 17 |
2 files changed, 19 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 9ffed031059..89e0bab3d0b 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -747,7 +747,7 @@ bool ARMDAGToDAGISel::SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset, // If Offset is a multiply-by-constant and it's profitable to extract a shift // and use it in a shifted operand do so. - if (Offset.getOpcode() == ISD::MUL) { + if (Offset.getOpcode() == ISD::MUL && N.hasOneUse()) { unsigned PowerOfTwo = 0; SDValue NewMulConst; if (canExtractShiftFromMul(Offset, 31, PowerOfTwo, NewMulConst)) { @@ -1422,7 +1422,7 @@ bool ARMDAGToDAGISel::SelectT2AddrModeSoReg(SDValue N, // If OffReg is a multiply-by-constant and it's profitable to extract a shift // and use it in a shifted operand do so. - if (OffReg.getOpcode() == ISD::MUL) { + if (OffReg.getOpcode() == ISD::MUL && N.hasOneUse()) { unsigned PowerOfTwo = 0; SDValue NewMulConst; if (canExtractShiftFromMul(OffReg, 3, PowerOfTwo, NewMulConst)) { diff --git a/llvm/test/CodeGen/ARM/shifter_operand.ll b/llvm/test/CodeGen/ARM/shifter_operand.ll index 5d44eb0f11d..e5f9b118527 100644 --- a/llvm/test/CodeGen/ARM/shifter_operand.ll +++ b/llvm/test/CodeGen/ARM/shifter_operand.ll @@ -239,3 +239,20 @@ define void @test_well_formed_dag(i32 %in1, i32 %in2, i32* %addr) { store i32 %add, i32* %addr ret void } + +define { i32, i32 } @test_multi_use_add(i32 %base, i32 %offset) { +; CHECK-LABEL: test_multi_use_add: +; CHECK-THUMB: movs [[CONST:r[0-9]+]], #28 +; CHECK-THUMB: movt [[CONST]], #1 + + %prod = mul i32 %offset, 65564 + %sum = add i32 %base, %prod + + %ptr = inttoptr i32 %sum to i32* + %loaded = load i32, i32* %ptr + + %ret.tmp = insertvalue { i32, i32 } undef, i32 %sum, 0 + %ret = insertvalue { i32, i32 } %ret.tmp, i32 %loaded, 1 + + ret { i32, i32 } %ret +} |
