diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/Windows/if-cvt-bundle.ll | 24 |
2 files changed, 27 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 9e0a49935fc..f687523c197 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -575,6 +575,9 @@ bool ARMBaseInstrInfo::isPredicable(MachineInstr &MI) const { if (!MI.isPredicable()) return false; + if (MI.isBundle()) + return false; + if (!isEligibleForITBlock(&MI)) return false; diff --git a/llvm/test/CodeGen/ARM/Windows/if-cvt-bundle.ll b/llvm/test/CodeGen/ARM/Windows/if-cvt-bundle.ll new file mode 100644 index 00000000000..5521ed72ee2 --- /dev/null +++ b/llvm/test/CodeGen/ARM/Windows/if-cvt-bundle.ll @@ -0,0 +1,24 @@ +; RUN: llc -mtriple thumbv7--windows-itanium -filetype asm -o - %s | FileCheck %s + +declare void @llvm.trap() +declare arm_aapcs_vfpcc zeroext i1 @g() + +define arm_aapcs_vfpcc i8* @f() { +entry: + %call = tail call arm_aapcs_vfpcc zeroext i1 @g() + br i1 %call, label %if.then, label %if.end + +if.then: + ret i8* bitcast (i1 ()* @g to i8*) + +if.end: + tail call void @llvm.trap() + unreachable +} + +; CHECK: push.w {r11, lr} +; CHECK: bl g +; CHECK: movw [[REG:r[0-9]+]], :lower16:g +; CHECK: movt [[REG]], :upper16:g +; CHECK: pop.w {r11, pc} + |
