diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/zext-extract_subreg.ll | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/X86/zext-extract_subreg.ll b/llvm/test/CodeGen/X86/zext-extract_subreg.ll index 9e34abb69b3..86fce0c235b 100644 --- a/llvm/test/CodeGen/X86/zext-extract_subreg.ll +++ b/llvm/test/CodeGen/X86/zext-extract_subreg.ll @@ -1,7 +1,33 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s define void @t() nounwind ssp { ; CHECK-LABEL: t: +; CHECK: ## %bb.0: ## %entry +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testb %al, %al +; CHECK-NEXT: jne LBB0_6 +; CHECK-NEXT: ## %bb.1: ## %if.end.i +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testb %al, %al +; CHECK-NEXT: je LBB0_2 +; CHECK-NEXT: LBB0_6: ## %return +; CHECK-NEXT: retq +; CHECK-NEXT: LBB0_2: ## %if.end +; CHECK-NEXT: movl (%rax), %eax +; CHECK-NEXT: testl %eax, %eax +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testb %al, %al +; CHECK-NEXT: jne LBB0_5 +; CHECK-NEXT: ## %bb.3: ## %cond.true190 +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testb %al, %al +; CHECK-NEXT: jne LBB0_5 +; CHECK-NEXT: ## %bb.4: ## %cond.true225 +; CHECK-NEXT: xorl %eax, %eax +; CHECK-NEXT: testb %al, %al +; CHECK-NEXT: LBB0_5: ## %cond.false205 +; CHECK-NEXT: ud2 entry: br i1 undef, label %return, label %if.end.i @@ -10,11 +36,6 @@ if.end.i: ; preds = %entry br i1 undef, label %return, label %if.end if.end: ; preds = %if.end.i -; CHECK: %if.end -; CHECK: movl (%{{.*}}), [[REG:%[a-z]+]] -; CHECK-NOT: movl [[REG]], [[REG]] -; CHECK-NEXT: testl [[REG]], [[REG]] -; CHECK-NEXT: xorl %tmp138 = select i1 undef, i32 0, i32 %tmp7.i %tmp867 = zext i32 %tmp138 to i64 br label %while.cond |
