diff options
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 2 | ||||
| -rw-r--r-- | llvm/test/MC/RISCV/rvi-alternate-abi-names.s | 16 |
2 files changed, 17 insertions, 1 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td index 9f6c0908138..79f8ab12f6c 100644 --- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td +++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td @@ -55,7 +55,7 @@ let RegAltNameIndices = [ABIRegAltName] in { def X6 : RISCVReg<6, "x6", ["t1"]>, DwarfRegNum<[6]>; def X7 : RISCVReg<7, "x7", ["t2"]>, DwarfRegNum<[7]>; } - def X8 : RISCVReg<8, "x8", ["s0"]>, DwarfRegNum<[8]>; + def X8 : RISCVReg<8, "x8", ["s0", "fp"]>, DwarfRegNum<[8]>; def X9 : RISCVReg<9, "x9", ["s1"]>, DwarfRegNum<[9]>; def X10 : RISCVReg<10,"x10", ["a0"]>, DwarfRegNum<[10]>; def X11 : RISCVReg<11,"x11", ["a1"]>, DwarfRegNum<[11]>; diff --git a/llvm/test/MC/RISCV/rvi-alternate-abi-names.s b/llvm/test/MC/RISCV/rvi-alternate-abi-names.s new file mode 100644 index 00000000000..04ce18f1d20 --- /dev/null +++ b/llvm/test/MC/RISCV/rvi-alternate-abi-names.s @@ -0,0 +1,16 @@ +# RUN: llvm-mc %s -triple=riscv32 \ +# RUN: | FileCheck %s +# RUN: llvm-mc %s -triple=riscv64 \ +# RUN: | FileCheck %s +# RUN: llvm-mc -filetype=obj -triple riscv32 < %s \ +# RUN: | llvm-objdump -d -r - \ +# RUN: | FileCheck %s +# RUN: llvm-mc -filetype=obj -triple riscv64 < %s \ +# RUN: | llvm-objdump -d -r - \ +# RUN: | FileCheck %s + +# 'fp' is an alternate ABI name for 's0' and it should be accepted in input. +# However, 's0' should be printed in preference. + +# CHECK: addi s0, s0, -4 +addi fp, fp, -4 |
