diff options
| -rw-r--r-- | llvm/lib/CodeGen/BranchFolding.cpp | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/tail-call-conditional.mir | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp index 06a82220875..0d4a0715a9e 100644 --- a/llvm/lib/CodeGen/BranchFolding.cpp +++ b/llvm/lib/CodeGen/BranchFolding.cpp @@ -1972,14 +1972,21 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) { FBB->erase(FBB->begin(), FIB); // Update livein's. + bool AddedLiveIns = false; for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) { unsigned Def = LocalDefs[i]; if (LocalDefsSet.count(Def)) { TBB->addLiveIn(Def); FBB->addLiveIn(Def); + AddedLiveIns = true; } } + if (AddedLiveIns) { + TBB->sortUniqueLiveIns(); + FBB->sortUniqueLiveIns(); + } + ++NumHoist; return true; } diff --git a/llvm/test/CodeGen/X86/tail-call-conditional.mir b/llvm/test/CodeGen/X86/tail-call-conditional.mir index cf24eed96a7..3646076ccf8 100644 --- a/llvm/test/CodeGen/X86/tail-call-conditional.mir +++ b/llvm/test/CodeGen/X86/tail-call-conditional.mir @@ -66,7 +66,7 @@ body: | TCRETURNdi64 @f1, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi ; CHECK: bb.2: - ; CHECK-NEXT: liveins: %rax, %rsi, %rdi, %rsi + ; CHECK-NEXT: liveins: %rax, %rdi, %rsi ; CHECK-NEXT: {{^ $}} ; CHECK-NEXT: TCRETURNdi64 @f2, 0, csr_64, implicit %rsp, implicit %rdi, implicit %rsi |
