diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e71801584eb..b7018398c4b 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18873,15 +18873,10 @@ static SDValue LowerUINT_TO_FP_i32(SDValue Op, SelectionDAG &DAG, // Zero out the upper parts of the register. Load = getShuffleVectorZeroOrUndef(Load, 0, true, Subtarget, DAG); - Load = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, - DAG.getBitcast(MVT::v2f64, Load), - DAG.getIntPtrConstant(0, dl)); - // Or the load with the bias. SDValue Or = DAG.getNode( ISD::OR, dl, MVT::v2i64, - DAG.getBitcast(MVT::v2i64, - DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, Load)), + DAG.getBitcast(MVT::v2i64, Load), DAG.getBitcast(MVT::v2i64, DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f64, Bias))); Or = |
