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-rw-r--r--llvm/include/llvm/CodeGen/LivePhysRegs.h7
-rw-r--r--llvm/lib/CodeGen/BranchFolding.cpp25
-rw-r--r--llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir57
-rw-r--r--llvm/test/CodeGen/X86/tail-call-conditional.mir4
4 files changed, 69 insertions, 24 deletions
diff --git a/llvm/include/llvm/CodeGen/LivePhysRegs.h b/llvm/include/llvm/CodeGen/LivePhysRegs.h
index 1300f60213f..301a45066b4 100644
--- a/llvm/include/llvm/CodeGen/LivePhysRegs.h
+++ b/llvm/include/llvm/CodeGen/LivePhysRegs.h
@@ -185,6 +185,13 @@ void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs);
void computeAndAddLiveIns(LivePhysRegs &LiveRegs,
MachineBasicBlock &MBB);
+/// Convenience function for recomputing live-in's for \p MBB.
+static inline void recomputeLiveIns(MachineBasicBlock &MBB) {
+ LivePhysRegs LPR;
+ MBB.clearLiveIns();
+ computeAndAddLiveIns(LPR, MBB);
+}
+
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEPHYSREGS_H
diff --git a/llvm/lib/CodeGen/BranchFolding.cpp b/llvm/lib/CodeGen/BranchFolding.cpp
index 254c8579b22..0787ca552d8 100644
--- a/llvm/lib/CodeGen/BranchFolding.cpp
+++ b/llvm/lib/CodeGen/BranchFolding.cpp
@@ -2007,7 +2007,6 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
return false;
bool HasDups = false;
- SmallVector<unsigned, 4> LocalDefs, LocalKills;
SmallSet<unsigned, 4> ActiveDefsSet, AllDefsSet;
MachineBasicBlock::iterator TIB = TBB->begin();
MachineBasicBlock::iterator FIB = FBB->begin();
@@ -2090,7 +2089,6 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
if (!Reg)
continue;
if (!AllDefsSet.count(Reg)) {
- LocalKills.push_back(Reg);
continue;
}
if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
@@ -2108,7 +2106,6 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
unsigned Reg = MO.getReg();
if (!Reg || TargetRegisterInfo::isVirtualRegister(Reg))
continue;
- LocalDefs.push_back(Reg);
addRegAndItsAliases(Reg, TRI, ActiveDefsSet);
addRegAndItsAliases(Reg, TRI, AllDefsSet);
}
@@ -2124,25 +2121,9 @@ bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
MBB->splice(Loc, TBB, TBB->begin(), TIB);
FBB->erase(FBB->begin(), FIB);
- // Update livein's.
- bool ChangedLiveIns = false;
- for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
- unsigned Def = LocalDefs[i];
- if (ActiveDefsSet.count(Def)) {
- TBB->addLiveIn(Def);
- FBB->addLiveIn(Def);
- ChangedLiveIns = true;
- }
- }
- for (unsigned K : LocalKills) {
- TBB->removeLiveIn(K);
- FBB->removeLiveIn(K);
- ChangedLiveIns = true;
- }
-
- if (ChangedLiveIns) {
- TBB->sortUniqueLiveIns();
- FBB->sortUniqueLiveIns();
+ if (UpdateLiveIns) {
+ recomputeLiveIns(*TBB);
+ recomputeLiveIns(*FBB);
}
++NumHoist;
diff --git a/llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir b/llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir
new file mode 100644
index 00000000000..96a44768c6c
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/branch-folder-hoist-livein.mir
@@ -0,0 +1,57 @@
+# RUN: llc -verify-machineinstrs -O1 -mtriple=s390x-ibm-linux -o - %s -run-pass=branch-folder | FileCheck %s
+--- |
+ target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
+ target triple = "s390x-ibm-linux"
+
+ @b = external global i16, align 1
+ @d = external global i16, align 1
+
+ define void @f1() {
+ ret void
+ }
+
+...
+---
+name: f1
+tracksRegLiveness: true
+body: |
+ bb.0:
+ successors: %bb.2(0x7fffffff), %bb.1(0x00000001)
+ liveins:
+
+ renamable $r1d = LGRL @b :: (load 4 from got, align 8)
+ renamable $r1l = LH killed renamable $r1d, 0, $noreg, implicit-def $r1d :: (dereferenceable load 1 from @b)
+ renamable $r2l = LHI 0
+ renamable $r3d = LGRL @d :: (load 4 from got, align 8)
+ renamable $r4d = LLILL 0, implicit-def $r4q
+
+ CHI killed renamable $r2l, 0, implicit-def $cc
+ BRC 14, 6, %bb.2, implicit killed $cc
+ J %bb.1
+
+ bb.1:
+ successors:
+ liveins: $r1l, $r3d, $r4q
+
+ renamable $r4d = COPY killed renamable $r4d, implicit killed $r4q
+ STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store 1 into @d)
+
+ bb.2:
+ liveins: $r1l, $r3d, $r4q
+
+ renamable $r4d = COPY killed renamable $r4d, implicit killed $r4q
+ STH renamable $r1l, killed renamable $r3d, 0, $noreg, implicit killed $r4d :: (store 1 into @d)
+ Return
+
+...
+
+# CHECK: renamable $r4d = COPY killed renamable $r4d, implicit killed $r4q
+# CHECK-NEXT: CHI killed renamable $r2l, 0, implicit-def $cc
+# CHECK-NEXT: BRC 14, 6, %bb.2, implicit killed $cc
+# CHECK-NEXT: {{^ $}}
+# CHECK-NEXT: bb.1:
+# CHECK-NEXT: successors:
+# CHECK-NEXT: liveins: $r1l, $r3d, $r4d
+
+# CHECK: bb.2:
+# CHECK-NEXT: liveins: $r1l, $r3d, $r4d
diff --git a/llvm/test/CodeGen/X86/tail-call-conditional.mir b/llvm/test/CodeGen/X86/tail-call-conditional.mir
index 396fbf3bac8..47ae83dad7f 100644
--- a/llvm/test/CodeGen/X86/tail-call-conditional.mir
+++ b/llvm/test/CodeGen/X86/tail-call-conditional.mir
@@ -48,7 +48,7 @@ body: |
; CHECK-NEXT: $rdi = COPY $rsi
; CHECK-NEXT: $rsi = COPY $rax
; CHECK-NEXT: CMP64ri8 $rax, 9, implicit-def $eflags
- ; CHECK-NEXT: TCRETURNdi64cc @f1, 0, 3, csr_64, implicit $rsp, implicit $eflags, implicit $ssp, implicit $rsp, implicit $rdi, implicit $rsi, implicit $rax, implicit-def $rax, implicit $hsi, implicit-def $hsi, implicit $sil, implicit-def $sil, implicit $si, implicit-def $si, implicit $esi, implicit-def $esi, implicit $rsi, implicit-def $rsi, implicit $hdi, implicit-def $hdi, implicit $dil, implicit-def $dil, implicit $di, implicit-def $di, implicit $edi, implicit-def $edi, implicit $rdi, implicit-def $rdi, implicit $hax, implicit-def $hax, implicit $ah, implicit-def $ah, implicit $al, implicit-def $al, implicit $ax, implicit-def $ax, implicit $eax, implicit-def $eax
+ ; CHECK-NEXT: TCRETURNdi64cc @f1, 0, 3, csr_64, implicit $rsp, implicit $eflags, implicit $ssp, implicit $rsp, implicit $rdi, implicit $rsi, implicit $rdi, implicit-def $rdi, implicit $hsi, implicit-def $hsi, implicit $sil, implicit-def $sil, implicit $si, implicit-def $si, implicit $esi, implicit-def $esi, implicit $rsi, implicit-def $rsi, implicit $hdi, implicit-def $hdi, implicit $dil, implicit-def $dil, implicit $di, implicit-def $di, implicit $edi, implicit-def $edi
bb.1:
successors: %bb.2, %bb.3
@@ -67,7 +67,7 @@ body: |
TCRETURNdi64 @f1, 0, csr_64, implicit $rsp, implicit $rdi, implicit $rsi
; CHECK: bb.2:
- ; CHECK-NEXT: liveins: $rax, $rdi, $rsi
+ ; CHECK-NEXT: liveins: $rdi, $rsi
; CHECK-NEXT: {{^ $}}
; CHECK-NEXT: TCRETURNdi64 @f2, 0, csr_64, implicit $rsp, implicit $rdi, implicit $rsi
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