summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/lib/Target/AVR/AVRISelLowering.cpp3
-rw-r--r--llvm/test/CodeGen/AVR/div.ll52
2 files changed, 55 insertions, 0 deletions
diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp
index 7ac8a136e6b..c1515571aae 100644
--- a/llvm/lib/Target/AVR/AVRISelLowering.cpp
+++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp
@@ -345,6 +345,9 @@ SDValue AVRTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
case MVT::i64:
LC = IsSigned ? RTLIB::SDIVREM_I64 : RTLIB::UDIVREM_I64;
break;
+ case MVT::i128:
+ LC = IsSigned ? RTLIB::SDIVREM_I128 : RTLIB::UDIVREM_I128;
+ break;
}
SDValue InChain = DAG.getEntryNode();
diff --git a/llvm/test/CodeGen/AVR/div.ll b/llvm/test/CodeGen/AVR/div.ll
index d3e1a4c7ed6..7626ecb8172 100644
--- a/llvm/test/CodeGen/AVR/div.ll
+++ b/llvm/test/CodeGen/AVR/div.ll
@@ -62,3 +62,55 @@ define i32 @sdiv32(i32 %a, i32 %b) {
ret i32 %quot
}
+; Unsigned 64-bit division
+define i64 @udiv64(i64 %a, i64 %b) {
+; CHECK-LABEL: udiv64:
+; CHECK: call __udivmoddi4
+; CHECK-NEXT: ldd r18, Y+1
+; CHECK-NEXT: ldd r19, Y+2
+; CHECK-NEXT: ldd r20, Y+3
+; CHECK-NEXT: ldd r21, Y+4
+; CHECK-NEXT: ldd r22, Y+5
+; CHECK-NEXT: ldd r23, Y+6
+; CHECK-NEXT: ldd r24, Y+7
+; CHECK-NEXT: ldd r25, Y+8
+; CHECK: ret
+ %quot = udiv i64 %a, %b
+ ret i64 %quot
+}
+
+; Signed 64-bit division
+define i64 @sdiv64(i64 %a, i64 %b) {
+; CHECK-LABEL: sdiv64:
+; CHECK: call __divmoddi4
+; CHECK-NEXT: ldd r18, Y+1
+; CHECK-NEXT: ldd r19, Y+2
+; CHECK-NEXT: ldd r20, Y+3
+; CHECK-NEXT: ldd r21, Y+4
+; CHECK-NEXT: ldd r22, Y+5
+; CHECK-NEXT: ldd r23, Y+6
+; CHECK-NEXT: ldd r24, Y+7
+; CHECK-NEXT: ldd r25, Y+8
+; CHECK: ret
+ %quot = sdiv i64 %a, %b
+ ret i64 %quot
+}
+
+; Unsigned 128-bit division
+define i128 @udiv128(i128 %a, i128 %b) {
+; CHECK-LABEL: udiv128:
+; CHECK: call __udivmodti4
+; CHECK: ret
+ %quot = udiv i128 %a, %b
+ ret i128 %quot
+}
+
+; Signed 128-bit division
+define i128 @sdiv128(i128 %a, i128 %b) {
+; CHECK-LABEL: sdiv128:
+; CHECK: call __divmodti4
+; CHECK: ret
+ %quot = sdiv i128 %a, %b
+ ret i128 %quot
+}
+
OpenPOWER on IntegriCloud