diff options
86 files changed, 112 insertions, 181 deletions
diff --git a/llvm/test/CodeGen/ARM/aliases.ll b/llvm/test/CodeGen/ARM/aliases.ll index ea39da8332c..b2c03147740 100644 --- a/llvm/test/CodeGen/ARM/aliases.ll +++ b/llvm/test/CodeGen/ARM/aliases.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=arm-linux-gnueabi -o %t +; RUN: llc < %s -mtriple=arm-linux-gnueabi -o %t ; RUN: grep set %t | count 5 ; RUN: grep globl %t | count 4 ; RUN: grep weak %t | count 1 diff --git a/llvm/test/CodeGen/ARM/ifcvt6.ll b/llvm/test/CodeGen/ARM/ifcvt6.ll index 63c4a0819db..58241157580 100644 --- a/llvm/test/CodeGen/ARM/ifcvt6.ll +++ b/llvm/test/CodeGen/ARM/ifcvt6.ll @@ -1,10 +1,6 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep cmpne | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep ldmhi | count 1 define void @foo(i32 %X, i32 %Y) { diff --git a/llvm/test/CodeGen/ARM/ifcvt7.ll b/llvm/test/CodeGen/ARM/ifcvt7.ll index 6bb4b5609a5..f9cf88f7292 100644 --- a/llvm/test/CodeGen/ARM/ifcvt7.ll +++ b/llvm/test/CodeGen/ARM/ifcvt7.ll @@ -1,13 +1,8 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep cmpeq | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep moveq | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep ldmeq | count 1 ; FIXME: Need post-ifcvt branch folding to get rid of the extra br at end of BB1. diff --git a/llvm/test/CodeGen/ARM/ifcvt8.ll b/llvm/test/CodeGen/ARM/ifcvt8.ll index 85bd8c7bf1f..6cb8e7bb69f 100644 --- a/llvm/test/CodeGen/ARM/ifcvt8.ll +++ b/llvm/test/CodeGen/ARM/ifcvt8.ll @@ -1,7 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin -; RUN: llvm-as < %s | \ -; RUN: llc -march=arm -mtriple=arm-apple-darwin | \ +; RUN: llc < %s -march=arm -mtriple=arm-apple-darwin | \ ; RUN: grep ldmne | count 1 %struct.SString = type { i8*, i32, i32 } diff --git a/llvm/test/CodeGen/ARM/load-global.ll b/llvm/test/CodeGen/ARM/load-global.ll index 8896ead5a51..56a4a477f51 100644 --- a/llvm/test/CodeGen/ARM/load-global.ll +++ b/llvm/test/CodeGen/ARM/load-global.ll @@ -1,14 +1,10 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=arm-apple-darwin -relocation-model=static | \ +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=static | \ ; RUN: not grep {L_G\$non_lazy_ptr} -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \ +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=dynamic-no-pic | \ ; RUN: grep {L_G\$non_lazy_ptr} | count 2 -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=arm-apple-darwin -relocation-model=pic | \ +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | \ ; RUN: grep {ldr.*pc} | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=arm-linux-gnueabi -relocation-model=pic | \ +; RUN: llc < %s -mtriple=arm-linux-gnueabi -relocation-model=pic | \ ; RUN: grep {GOT} | count 1 @G = external global i32 diff --git a/llvm/test/CodeGen/CellSPU/and_ops.ll b/llvm/test/CodeGen/CellSPU/and_ops.ll index a18b6f8d05f..139e97b967a 100644 --- a/llvm/test/CodeGen/CellSPU/and_ops.ll +++ b/llvm/test/CodeGen/CellSPU/and_ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep and %t1.s | count 234 ; RUN: grep andc %t1.s | count 85 ; RUN: grep andi %t1.s | count 37 diff --git a/llvm/test/CodeGen/CellSPU/call.ll b/llvm/test/CodeGen/CellSPU/call.ll index a305a235404..960d2feaded 100644 --- a/llvm/test/CodeGen/CellSPU/call.ll +++ b/llvm/test/CodeGen/CellSPU/call.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep brsl %t1.s | count 1 ; RUN: grep brasl %t1.s | count 1 ; RUN: grep stqd %t1.s | count 80 diff --git a/llvm/test/CodeGen/CellSPU/call_indirect.ll b/llvm/test/CodeGen/CellSPU/call_indirect.ll index 9be714ebc9b..639c794424f 100644 --- a/llvm/test/CodeGen/CellSPU/call_indirect.ll +++ b/llvm/test/CodeGen/CellSPU/call_indirect.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s +; RUN: llc < %s -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s ; RUN: grep bisl %t1.s | count 7 ; RUN: grep ila %t1.s | count 1 ; RUN: grep rotqby %t1.s | count 6 diff --git a/llvm/test/CodeGen/CellSPU/ctpop.ll b/llvm/test/CodeGen/CellSPU/ctpop.ll index 3c7ee7aeea2..e1a6cd82926 100644 --- a/llvm/test/CodeGen/CellSPU/ctpop.ll +++ b/llvm/test/CodeGen/CellSPU/ctpop.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep cntb %t1.s | count 3 ; RUN: grep andi %t1.s | count 3 ; RUN: grep rotmi %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/dp_farith.ll b/llvm/test/CodeGen/CellSPU/dp_farith.ll index d4802ae8f54..b0a372beba0 100644 --- a/llvm/test/CodeGen/CellSPU/dp_farith.ll +++ b/llvm/test/CodeGen/CellSPU/dp_farith.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep dfa %t1.s | count 2 ; RUN: grep dfs %t1.s | count 2 ; RUN: grep dfm %t1.s | count 6 diff --git a/llvm/test/CodeGen/CellSPU/eqv.ll b/llvm/test/CodeGen/CellSPU/eqv.ll index 54069567720..22c8c3bff94 100644 --- a/llvm/test/CodeGen/CellSPU/eqv.ll +++ b/llvm/test/CodeGen/CellSPU/eqv.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep eqv %t1.s | count 18 ; RUN: grep xshw %t1.s | count 6 ; RUN: grep xsbh %t1.s | count 3 diff --git a/llvm/test/CodeGen/CellSPU/extract_elt.ll b/llvm/test/CodeGen/CellSPU/extract_elt.ll index bcd2f42aa77..0ac971c58c5 100644 --- a/llvm/test/CodeGen/CellSPU/extract_elt.ll +++ b/llvm/test/CodeGen/CellSPU/extract_elt.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep shufb %t1.s | count 39 ; RUN: grep ilhu %t1.s | count 27 ; RUN: grep iohl %t1.s | count 27 diff --git a/llvm/test/CodeGen/CellSPU/fcmp32.ll b/llvm/test/CodeGen/CellSPU/fcmp32.ll index 27a659e8293..f07fe6fdab2 100644 --- a/llvm/test/CodeGen/CellSPU/fcmp32.ll +++ b/llvm/test/CodeGen/CellSPU/fcmp32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep fceq %t1.s | count 1 ; RUN: grep fcmeq %t1.s | count 1 diff --git a/llvm/test/CodeGen/CellSPU/fcmp64.ll b/llvm/test/CodeGen/CellSPU/fcmp64.ll index 1906bfe7dda..2b61fa6d2dc 100644 --- a/llvm/test/CodeGen/CellSPU/fcmp64.ll +++ b/llvm/test/CodeGen/CellSPU/fcmp64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s define i1 @fcmp_eq_setcc_f64(double %arg1, double %arg2) nounwind { entry: diff --git a/llvm/test/CodeGen/CellSPU/fdiv.ll b/llvm/test/CodeGen/CellSPU/fdiv.ll index d121c3f8c90..9921626b79c 100644 --- a/llvm/test/CodeGen/CellSPU/fdiv.ll +++ b/llvm/test/CodeGen/CellSPU/fdiv.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep frest %t1.s | count 2 ; RUN: grep -w fi %t1.s | count 2 ; RUN: grep -w fm %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll index 5bd66f4aaef..1e5e3b34144 100644 --- a/llvm/test/CodeGen/CellSPU/fneg-fabs.ll +++ b/llvm/test/CodeGen/CellSPU/fneg-fabs.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep 32768 %t1.s | count 2 ; RUN: grep xor %t1.s | count 4 ; RUN: grep and %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/i64ops.ll b/llvm/test/CodeGen/CellSPU/i64ops.ll index dd6782772a5..3553cbbf7b5 100644 --- a/llvm/test/CodeGen/CellSPU/i64ops.ll +++ b/llvm/test/CodeGen/CellSPU/i64ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep xswd %t1.s | count 3 ; RUN: grep xsbh %t1.s | count 1 ; RUN: grep xshw %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/i8ops.ll b/llvm/test/CodeGen/CellSPU/i8ops.ll index 23a036e3744..57a2aa89472 100644 --- a/llvm/test/CodeGen/CellSPU/i8ops.ll +++ b/llvm/test/CodeGen/CellSPU/i8ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; ModuleID = 'i8ops.bc' target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" diff --git a/llvm/test/CodeGen/CellSPU/icmp16.ll b/llvm/test/CodeGen/CellSPU/icmp16.ll index 56d1b8fb41b..32b12617cfc 100644 --- a/llvm/test/CodeGen/CellSPU/icmp16.ll +++ b/llvm/test/CodeGen/CellSPU/icmp16.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ilh %t1.s | count 15 ; RUN: grep ceqh %t1.s | count 29 ; RUN: grep ceqhi %t1.s | count 13 diff --git a/llvm/test/CodeGen/CellSPU/icmp32.ll b/llvm/test/CodeGen/CellSPU/icmp32.ll index 4f74b0dd042..ccbb5f7cde5 100644 --- a/llvm/test/CodeGen/CellSPU/icmp32.ll +++ b/llvm/test/CodeGen/CellSPU/icmp32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ila %t1.s | count 6 ; RUN: grep ceq %t1.s | count 28 ; RUN: grep ceqi %t1.s | count 12 diff --git a/llvm/test/CodeGen/CellSPU/icmp64.ll b/llvm/test/CodeGen/CellSPU/icmp64.ll index b26252cedb3..9dd2cdc0dea 100644 --- a/llvm/test/CodeGen/CellSPU/icmp64.ll +++ b/llvm/test/CodeGen/CellSPU/icmp64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ceq %t1.s | count 20 ; RUN: grep cgti %t1.s | count 12 ; RUN: grep cgt %t1.s | count 16 diff --git a/llvm/test/CodeGen/CellSPU/icmp8.ll b/llvm/test/CodeGen/CellSPU/icmp8.ll index d246481f03a..5517d104ab9 100644 --- a/llvm/test/CodeGen/CellSPU/icmp8.ll +++ b/llvm/test/CodeGen/CellSPU/icmp8.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ceqb %t1.s | count 24 ; RUN: grep ceqbi %t1.s | count 12 ; RUN: grep clgtb %t1.s | count 11 diff --git a/llvm/test/CodeGen/CellSPU/immed16.ll b/llvm/test/CodeGen/CellSPU/immed16.ll index 9a461cbb85a..077d07169e4 100644 --- a/llvm/test/CodeGen/CellSPU/immed16.ll +++ b/llvm/test/CodeGen/CellSPU/immed16.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep "ilh" %t1.s | count 11 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" target triple = "spu" diff --git a/llvm/test/CodeGen/CellSPU/immed32.ll b/llvm/test/CodeGen/CellSPU/immed32.ll index bf471b1eb1c..119f526847c 100644 --- a/llvm/test/CodeGen/CellSPU/immed32.ll +++ b/llvm/test/CodeGen/CellSPU/immed32.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ilhu %t1.s | count 8 ; RUN: grep iohl %t1.s | count 6 ; RUN: grep -w il %t1.s | count 3 diff --git a/llvm/test/CodeGen/CellSPU/immed64.ll b/llvm/test/CodeGen/CellSPU/immed64.ll index bbda3ff329c..fd483651756 100644 --- a/llvm/test/CodeGen/CellSPU/immed64.ll +++ b/llvm/test/CodeGen/CellSPU/immed64.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep lqa %t1.s | count 13 ; RUN: grep ilhu %t1.s | count 15 ; RUN: grep ila %t1.s | count 1 diff --git a/llvm/test/CodeGen/CellSPU/int2fp.ll b/llvm/test/CodeGen/CellSPU/int2fp.ll index ee3076594ad..984c017c96d 100644 --- a/llvm/test/CodeGen/CellSPU/int2fp.ll +++ b/llvm/test/CodeGen/CellSPU/int2fp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep csflt %t1.s | count 5 ; RUN: grep cuflt %t1.s | count 1 ; RUN: grep xshw %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/intrinsics_branch.ll b/llvm/test/CodeGen/CellSPU/intrinsics_branch.ll index 87ad18211a2..b0f6a6247e4 100644 --- a/llvm/test/CodeGen/CellSPU/intrinsics_branch.ll +++ b/llvm/test/CodeGen/CellSPU/intrinsics_branch.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep ceq %t1.s | count 30 ; RUN: grep ceqb %t1.s | count 10 ; RUN: grep ceqhi %t1.s | count 5 diff --git a/llvm/test/CodeGen/CellSPU/intrinsics_float.ll b/llvm/test/CodeGen/CellSPU/intrinsics_float.ll index c18f8deb385..81373470d06 100644 --- a/llvm/test/CodeGen/CellSPU/intrinsics_float.ll +++ b/llvm/test/CodeGen/CellSPU/intrinsics_float.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep fa %t1.s | count 5 ; RUN: grep fs %t1.s | count 5 ; RUN: grep fm %t1.s | count 15 diff --git a/llvm/test/CodeGen/CellSPU/intrinsics_logical.ll b/llvm/test/CodeGen/CellSPU/intrinsics_logical.ll index 843340b7454..a29ee4c2405 100644 --- a/llvm/test/CodeGen/CellSPU/intrinsics_logical.ll +++ b/llvm/test/CodeGen/CellSPU/intrinsics_logical.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep and %t1.s | count 20 ; RUN: grep andc %t1.s | count 5 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" diff --git a/llvm/test/CodeGen/CellSPU/loads.ll b/llvm/test/CodeGen/CellSPU/loads.ll index 4addbab87a9..8e5422c58eb 100644 --- a/llvm/test/CodeGen/CellSPU/loads.ll +++ b/llvm/test/CodeGen/CellSPU/loads.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu | FileCheck %s +; RUN: llc < %s -march=cellspu | FileCheck %s ; ModuleID = 'loads.bc' target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" diff --git a/llvm/test/CodeGen/CellSPU/mul_ops.ll b/llvm/test/CodeGen/CellSPU/mul_ops.ll index 085ce555dc2..031d6c37ce7 100644 --- a/llvm/test/CodeGen/CellSPU/mul_ops.ll +++ b/llvm/test/CodeGen/CellSPU/mul_ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep mpy %t1.s | count 44 ; RUN: grep mpyu %t1.s | count 4 ; RUN: grep mpyh %t1.s | count 10 diff --git a/llvm/test/CodeGen/CellSPU/nand.ll b/llvm/test/CodeGen/CellSPU/nand.ll index 841a3ec54d6..e1419232ece 100644 --- a/llvm/test/CodeGen/CellSPU/nand.ll +++ b/llvm/test/CodeGen/CellSPU/nand.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep nand %t1.s | count 90 ; RUN: grep and %t1.s | count 94 ; RUN: grep xsbh %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/or_ops.ll b/llvm/test/CodeGen/CellSPU/or_ops.ll index 4e9da8f1297..8aa1e998bd0 100644 --- a/llvm/test/CodeGen/CellSPU/or_ops.ll +++ b/llvm/test/CodeGen/CellSPU/or_ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep and %t1.s | count 2 ; RUN: grep orc %t1.s | count 85 ; RUN: grep ori %t1.s | count 30 diff --git a/llvm/test/CodeGen/CellSPU/rotate_ops.ll b/llvm/test/CodeGen/CellSPU/rotate_ops.ll index 9a10264c813..a504c002ae1 100644 --- a/llvm/test/CodeGen/CellSPU/rotate_ops.ll +++ b/llvm/test/CodeGen/CellSPU/rotate_ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu -o %t1.s +; RUN: llc < %s -march=cellspu -o %t1.s ; RUN: grep rot %t1.s | count 85 ; RUN: grep roth %t1.s | count 8 ; RUN: grep roti.*5 %t1.s | count 1 diff --git a/llvm/test/CodeGen/CellSPU/select_bits.ll b/llvm/test/CodeGen/CellSPU/select_bits.ll index e83e47606c2..c804256f513 100644 --- a/llvm/test/CodeGen/CellSPU/select_bits.ll +++ b/llvm/test/CodeGen/CellSPU/select_bits.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep selb %t1.s | count 56 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128" diff --git a/llvm/test/CodeGen/CellSPU/sext128.ll b/llvm/test/CodeGen/CellSPU/sext128.ll index 71962a94258..0c0b3599b11 100644 --- a/llvm/test/CodeGen/CellSPU/sext128.ll +++ b/llvm/test/CodeGen/CellSPU/sext128.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu | FileCheck %s +; RUN: llc < %s -march=cellspu | FileCheck %s ; ModuleID = 'sext128.bc' target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:128:128-v128:128:128-a0:0:128-s0:128:128" diff --git a/llvm/test/CodeGen/CellSPU/shift_ops.ll b/llvm/test/CodeGen/CellSPU/shift_ops.ll index 3c26baa7c7a..0264fc830ea 100644 --- a/llvm/test/CodeGen/CellSPU/shift_ops.ll +++ b/llvm/test/CodeGen/CellSPU/shift_ops.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep {shlh } %t1.s | count 9 ; RUN: grep {shlhi } %t1.s | count 3 ; RUN: grep {shl } %t1.s | count 9 diff --git a/llvm/test/CodeGen/CellSPU/sp_farith.ll b/llvm/test/CodeGen/CellSPU/sp_farith.ll index d77dd9216cd..80bf47ccf5d 100644 --- a/llvm/test/CodeGen/CellSPU/sp_farith.ll +++ b/llvm/test/CodeGen/CellSPU/sp_farith.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu -enable-unsafe-fp-math > %t1.s +; RUN: llc < %s -march=cellspu -enable-unsafe-fp-math > %t1.s ; RUN: grep fa %t1.s | count 2 ; RUN: grep fs %t1.s | count 2 ; RUN: grep fm %t1.s | count 6 diff --git a/llvm/test/CodeGen/CellSPU/stores.ll b/llvm/test/CodeGen/CellSPU/stores.ll index f2f35ef4dbc..05f44f4be04 100644 --- a/llvm/test/CodeGen/CellSPU/stores.ll +++ b/llvm/test/CodeGen/CellSPU/stores.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep {stqd.*0(\$3)} %t1.s | count 4 ; RUN: grep {stqd.*16(\$3)} %t1.s | count 4 ; RUN: grep 16256 %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/struct_1.ll b/llvm/test/CodeGen/CellSPU/struct_1.ll index 82d319dd105..8ee7d932251 100644 --- a/llvm/test/CodeGen/CellSPU/struct_1.ll +++ b/llvm/test/CodeGen/CellSPU/struct_1.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s +; RUN: llc < %s -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s ; RUN: grep lqa %t1.s | count 5 ; RUN: grep lqd %t1.s | count 11 ; RUN: grep rotqbyi %t1.s | count 7 diff --git a/llvm/test/CodeGen/CellSPU/trunc.ll b/llvm/test/CodeGen/CellSPU/trunc.ll index db22564f434..d16185238af 100644 --- a/llvm/test/CodeGen/CellSPU/trunc.ll +++ b/llvm/test/CodeGen/CellSPU/trunc.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep shufb %t1.s | count 19 ; RUN: grep {ilhu.*1799} %t1.s | count 1 ; RUN: grep {ilhu.*771} %t1.s | count 2 diff --git a/llvm/test/CodeGen/CellSPU/vec_const.ll b/llvm/test/CodeGen/CellSPU/vec_const.ll index 4b29adc8092..24c05c68408 100644 --- a/llvm/test/CodeGen/CellSPU/vec_const.ll +++ b/llvm/test/CodeGen/CellSPU/vec_const.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s -; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s +; RUN: llc < %s -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu -mattr=large_mem > %t2.s ; RUN: grep -w il %t1.s | count 3 ; RUN: grep ilhu %t1.s | count 8 ; RUN: grep -w ilh %t1.s | count 5 diff --git a/llvm/test/CodeGen/CellSPU/vecinsert.ll b/llvm/test/CodeGen/CellSPU/vecinsert.ll index 6abbd9ac797..9a00c1f29f8 100644 --- a/llvm/test/CodeGen/CellSPU/vecinsert.ll +++ b/llvm/test/CodeGen/CellSPU/vecinsert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s +; RUN: llc < %s -march=cellspu > %t1.s ; RUN: grep cbd %t1.s | count 5 ; RUN: grep chd %t1.s | count 5 ; RUN: grep cwd %t1.s | count 10 diff --git a/llvm/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll b/llvm/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll index f6d95cbd53f..dd382cfcb24 100644 --- a/llvm/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll +++ b/llvm/test/CodeGen/Generic/2002-04-14-UnexpectedUnsignedType.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc +; RUN: llc < %s ; This caused the backend to assert out with: ; SparcInstrInfo.cpp:103: failed assertion `0 && "Unexpected unsigned type"' diff --git a/llvm/test/CodeGen/Generic/spillccr.ll b/llvm/test/CodeGen/Generic/spillccr.ll index 85451333174..0a774c64f82 100644 --- a/llvm/test/CodeGen/Generic/spillccr.ll +++ b/llvm/test/CodeGen/Generic/spillccr.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc +; RUN: llc < %s ; July 6, 2002 -- LLC Regression test ; This test case checks if the integer CC register %xcc (or %ccr) diff --git a/llvm/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll b/llvm/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll index a536fa162c0..969772ee2be 100644 --- a/llvm/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll +++ b/llvm/test/CodeGen/PowerPC/2006-04-05-splat-ish.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ ; RUN: grep {vspltish v.*, 10} define void @test(<8 x i16>* %P) { diff --git a/llvm/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll b/llvm/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll index 7a65c00f104..57ed250abc0 100644 --- a/llvm/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll +++ b/llvm/test/CodeGen/PowerPC/2006-10-11-combiner-aa-regression.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -combiner-alias-analysis | grep f5 +; RUN: llc < %s -march=ppc32 -combiner-alias-analysis | grep f5 target datalayout = "E-p:32:32" target triple = "powerpc-apple-darwin8.2.0" diff --git a/llvm/test/CodeGen/PowerPC/Frames-small.ll b/llvm/test/CodeGen/PowerPC/Frames-small.ll index c12dd44e6b9..6875704cf30 100644 --- a/llvm/test/CodeGen/PowerPC/Frames-small.ll +++ b/llvm/test/CodeGen/PowerPC/Frames-small.ll @@ -1,25 +1,21 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -o %t1 ; RUN not grep {stw r31, 20(r1)} %t1 ; RUN: grep {stwu r1, -16448(r1)} %t1 ; RUN: grep {addi r1, r1, 16448} %t1 -; RUN: llvm-as < %s | \ +; RUN: llc < %s -march=ppc32 | \ ; RUN: not grep {lwz r31, 20(r1)} -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ ; RUN: -o %t2 ; RUN: grep {stw r31, 20(r1)} %t2 ; RUN: grep {stwu r1, -16448(r1)} %t2 ; RUN: grep {addi r1, r1, 16448} %t2 ; RUN: grep {lwz r31, 20(r1)} %t2 -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 +; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -o %t3 ; RUN: not grep {std r31, 40(r1)} %t3 ; RUN: grep {stdu r1, -16496(r1)} %t3 ; RUN: grep {addi r1, r1, 16496} %t3 ; RUN: not grep {ld r31, 40(r1)} %t3 -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ +; RUN: llc < %s -march=ppc64 -mtriple=powerpc-apple-darwin8 -disable-fp-elim \ ; RUN: -o %t4 ; RUN: grep {std r31, 40(r1)} %t4 ; RUN: grep {stdu r1, -16496(r1)} %t4 diff --git a/llvm/test/CodeGen/PowerPC/buildvec_canonicalize.ll b/llvm/test/CodeGen/PowerPC/buildvec_canonicalize.ll index 20ff3dbc4f7..0454c584bcf 100644 --- a/llvm/test/CodeGen/PowerPC/buildvec_canonicalize.ll +++ b/llvm/test/CodeGen/PowerPC/buildvec_canonicalize.ll @@ -1,11 +1,9 @@ ; There should be exactly one vxor here. -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ +; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ ; RUN: grep vxor | count 1 ; There should be exactly one vsplti here. -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ +; RUN: llc < %s -march=ppc32 -mcpu=g5 --enable-unsafe-fp-math | \ ; RUN: grep vsplti | count 1 define void @VXOR(<4 x float>* %P1, <4 x i32>* %P2, <4 x float>* %P3) { diff --git a/llvm/test/CodeGen/PowerPC/fsqrt.ll b/llvm/test/CodeGen/PowerPC/fsqrt.ll index 1260c602f9d..74a8725eb12 100644 --- a/llvm/test/CodeGen/PowerPC/fsqrt.ll +++ b/llvm/test/CodeGen/PowerPC/fsqrt.ll @@ -1,17 +1,13 @@ ; fsqrt should be generated when the fsqrt feature is enabled, but not ; otherwise. -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=+fsqrt | \ ; RUN: grep {fsqrt f1, f1} -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ -; RUN: grep {fsqrt f1, f1} -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g5 | \ +; RUN: grep {fsqrt f1, f1} +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-fsqrt | \ ; RUN: not grep {fsqrt f1, f1} -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mcpu=g4 | \ ; RUN: not grep {fsqrt f1, f1} declare double @llvm.sqrt.f64(double) diff --git a/llvm/test/CodeGen/PowerPC/seteq-0.ll b/llvm/test/CodeGen/PowerPC/seteq-0.ll index 0f0afe9e665..688b29aa124 100644 --- a/llvm/test/CodeGen/PowerPC/seteq-0.ll +++ b/llvm/test/CodeGen/PowerPC/seteq-0.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 | \ ; RUN: grep {srwi r., r., 5} define i32 @eq0(i32 %a) { diff --git a/llvm/test/CodeGen/PowerPC/stfiwx.ll b/llvm/test/CodeGen/PowerPC/stfiwx.ll index 765c326bad1..d1c3f5234a2 100644 --- a/llvm/test/CodeGen/PowerPC/stfiwx.ll +++ b/llvm/test/CodeGen/PowerPC/stfiwx.ll @@ -1,9 +1,7 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=stfiwx -o %t1 ; RUN: grep stfiwx %t1 ; RUN: not grep r1 %t1 -; RUN: llvm-as < %s | \ -; RUN: llc -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \ +; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8 -mattr=-stfiwx \ ; RUN: -o %t2 ; RUN: not grep stfiwx %t2 ; RUN: grep r1 %t2 diff --git a/llvm/test/CodeGen/SPARC/ctpop.ll b/llvm/test/CodeGen/SPARC/ctpop.ll index 28fe9a44296..37d1c5a5706 100644 --- a/llvm/test/CodeGen/SPARC/ctpop.ll +++ b/llvm/test/CodeGen/SPARC/ctpop.ll @@ -1,9 +1,7 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=sparc -mattr=v9 -enable-sparc-v9-insts +; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts ; RUN: llc < %s -march=sparc -mattr=-v9 | \ ; RUN: not grep popc -; RUN: llvm-as < %s | \ -; RUN: llc -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc +; RUN: llc < %s -march=sparc -mattr=v9 -enable-sparc-v9-insts | grep popc declare i32 @llvm.ctpop.i32(i32) diff --git a/llvm/test/CodeGen/Thumb2/load-global.ll b/llvm/test/CodeGen/Thumb2/load-global.ll index 4aad567fa8f..4fd4525b045 100644 --- a/llvm/test/CodeGen/Thumb2/load-global.ll +++ b/llvm/test/CodeGen/Thumb2/load-global.ll @@ -1,11 +1,7 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s -check-prefix=DYNAMIC +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC +; RUN: llc < %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic | FileCheck %s -check-prefix=LINUX @G = external global i32 diff --git a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll index 4a0b5c37e26..8783a11c060 100644 --- a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t +; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t ; RUN: grep {movl _last} %t | count 1 ; RUN: grep {cmpl.*_last} %t | count 1 diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll index 72dab39888f..7d0a6ab0a04 100644 --- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll +++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -relocation-model=static -stats |& \ +; RUN: llc < %s -march=x86 -relocation-model=static -stats |& \ ; RUN: grep asm-printer | grep 14 ; @size20 = external global i32 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll index c39b377cc73..d58d638562c 100644 --- a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -relocation-model=static | not grep {subl.*%esp} +; RUN: llc < %s -march=x86 -relocation-model=static | not grep {subl.*%esp} @A = external global i16* ; <i16**> [#uses=1] @B = external global i32 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/aliases.ll b/llvm/test/CodeGen/X86/aliases.ll index 3cfe1aa2cc7..0b26859b04c 100644 --- a/llvm/test/CodeGen/X86/aliases.ll +++ b/llvm/test/CodeGen/X86/aliases.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=false -o %t ; RUN: grep set %t | count 7 ; RUN: grep globl %t | count 6 ; RUN: grep weak %t | count 1 diff --git a/llvm/test/CodeGen/X86/extractelement-from-arg.ll b/llvm/test/CodeGen/X86/extractelement-from-arg.ll index 44704b6adb3..4ea37f0c46d 100644 --- a/llvm/test/CodeGen/X86/extractelement-from-arg.ll +++ b/llvm/test/CodeGen/X86/extractelement-from-arg.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc -march=x86-64 -mattr=+sse2 +; RUN: llc < %s -march=x86-64 -mattr=+sse2 define void @test(float* %R, <4 x float> %X) nounwind { %tmp = extractelement <4 x float> %X, i32 3 diff --git a/llvm/test/CodeGen/X86/extractelement-load.ll b/llvm/test/CodeGen/X86/extractelement-load.ll index 601690ef7ca..ee57d9b7629 100644 --- a/llvm/test/CodeGen/X86/extractelement-load.ll +++ b/llvm/test/CodeGen/X86/extractelement-load.ll @@ -1,5 +1,5 @@ -; RUN: llvm-as %s -o - | llc -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd -; RUN: llvm-as %s -o - | llc -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd +; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=yonah | not grep movd +; RUN: llc < %s -march=x86-64 -mattr=+sse2 -mcpu=core2 | not grep movd define i32 @t(<2 x i64>* %val) nounwind { %tmp2 = load <2 x i64>* %val, align 16 ; <<2 x i64>> [#uses=1] diff --git a/llvm/test/CodeGen/X86/fabs.ll b/llvm/test/CodeGen/X86/fabs.ll index 8b0a472296b..54947c394b5 100644 --- a/llvm/test/CodeGen/X86/fabs.ll +++ b/llvm/test/CodeGen/X86/fabs.ll @@ -1,8 +1,7 @@ ; Make sure this testcase codegens to the fabs instruction, not a call to fabsf ; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fabs\$ | \ ; RUN: count 2 -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep fabs\$ | count 3 declare float @fabsf(float) diff --git a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll index 941f7087f62..5e88ed7f00d 100644 --- a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll +++ b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | grep {ret 20} ; Check that a fastcc function pops its stack variables before returning. diff --git a/llvm/test/CodeGen/X86/fp-stack-ret.ll b/llvm/test/CodeGen/X86/fp-stack-ret.ll index 3e6ad54e73b..c83a0cbf69e 100644 --- a/llvm/test/CodeGen/X86/fp-stack-ret.ll +++ b/llvm/test/CodeGen/X86/fp-stack-ret.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t +; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 > %t ; RUN: grep fldl %t | count 1 ; RUN: not grep xmm %t ; RUN: grep {sub.*esp} %t | count 1 diff --git a/llvm/test/CodeGen/X86/illegal-insert.ll b/llvm/test/CodeGen/X86/illegal-insert.ll index 59773b24910..dbf1b14684c 100644 --- a/llvm/test/CodeGen/X86/illegal-insert.ll +++ b/llvm/test/CodeGen/X86/illegal-insert.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as %s -o - | llc -march=x86-64 +; RUN: llc < %s -march=x86-64 define <4 x double> @foo0(<4 x double> %t) { %r = insertelement <4 x double> %t, double 2.3, i32 0 diff --git a/llvm/test/CodeGen/X86/sincos.ll b/llvm/test/CodeGen/X86/sincos.ll index 27215956b64..ec5fc398c26 100644 --- a/llvm/test/CodeGen/X86/sincos.ll +++ b/llvm/test/CodeGen/X86/sincos.ll @@ -1,9 +1,7 @@ ; Make sure this testcase codegens to the sin and cos instructions, not calls -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep sin\$ | count 3 -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ +; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | \ ; RUN: grep cos\$ | count 3 declare float @sinf(float) diff --git a/llvm/test/CodeGen/X86/sse-load-ret.ll b/llvm/test/CodeGen/X86/sse-load-ret.ll index cbf3eb0e5f0..1ebcb1a6fa6 100644 --- a/llvm/test/CodeGen/X86/sse-load-ret.ll +++ b/llvm/test/CodeGen/X86/sse-load-ret.ll @@ -1,7 +1,5 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mcpu=yonah | not grep movss -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86 -mcpu=yonah | not grep xmm +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss +; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm define double @test1(double* %P) { %X = load double* %P ; <double> [#uses=1] diff --git a/llvm/test/CodeGen/X86/sse_reload_fold.ll b/llvm/test/CodeGen/X86/sse_reload_fold.ll index 547763e4a79..dc3d6fe6797 100644 --- a/llvm/test/CodeGen/X86/sse_reload_fold.ll +++ b/llvm/test/CodeGen/X86/sse_reload_fold.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \ +; RUN: llc < %s -march=x86-64 -mattr=+64bit,+sse3 -print-failed-fuse-candidates |& \ ; RUN: grep fail | count 1 declare float @test_f(float %f) diff --git a/llvm/test/CodeGen/X86/x86-64-mem.ll b/llvm/test/CodeGen/X86/x86-64-mem.ll index c2c1701256f..d15f516cdde 100644 --- a/llvm/test/CodeGen/X86/x86-64-mem.ll +++ b/llvm/test/CodeGen/X86/x86-64-mem.ll @@ -3,8 +3,7 @@ ; RUN: grep %%rip %t1 | count 6 ; RUN: grep movq %t1 | count 6 ; RUN: grep leaq %t1 | count 1 -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=static -o %t2 ; RUN: grep movl %t2 | count 2 ; RUN: grep movq %t2 | count 2 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-1.ll b/llvm/test/CodeGen/X86/x86-64-pic-1.ll index 016528a7dcd..b21918ef80d 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-1.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-1.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f@PLT} %t1 define void @g() { diff --git a/llvm/test/CodeGen/X86/x86-64-pic-10.ll b/llvm/test/CodeGen/X86/x86-64-pic-10.ll index e0fcc057308..0f65e574495 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-10.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-10.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call g@PLT} %t1 @g = alias weak i32 ()* @f diff --git a/llvm/test/CodeGen/X86/x86-64-pic-11.ll b/llvm/test/CodeGen/X86/x86-64-pic-11.ll index e5cad9e164f..ef816853326 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-11.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-11.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call __fixunsxfti@PLT} %t1 define i128 @f(x86_fp80 %a) nounwind { diff --git a/llvm/test/CodeGen/X86/x86-64-pic-2.ll b/llvm/test/CodeGen/X86/x86-64-pic-2.ll index 0fc62ff844d..a52c564f968 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-2.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-2.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f} %t1 ; RUN: not grep {call f@PLT} %t1 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-3.ll b/llvm/test/CodeGen/X86/x86-64-pic-3.ll index 671b94d9159..246c00f7411 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-3.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-3.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {call f} %t1 ; RUN: not grep {call f@PLT} %t1 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-4.ll b/llvm/test/CodeGen/X86/x86-64-pic-4.ll index 10428dc6dbe..90fc1194a33 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-4.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-4.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movq a@GOTPCREL(%rip),} %t1 @a = global i32 0 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-5.ll b/llvm/test/CodeGen/X86/x86-64-pic-5.ll index a1f658fd2a5..6369bde6943 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-5.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-5.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movl a(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-6.ll b/llvm/test/CodeGen/X86/x86-64-pic-6.ll index 88978188e07..6e19ad35bcf 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-6.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-6.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movl a(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-7.ll b/llvm/test/CodeGen/X86/x86-64-pic-7.ll index 57e78b604a1..4d98ee61402 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-7.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-7.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {movq f@GOTPCREL(%rip),} %t1 define void ()* @g() nounwind { diff --git a/llvm/test/CodeGen/X86/x86-64-pic-8.ll b/llvm/test/CodeGen/X86/x86-64-pic-8.ll index 6231991ef20..d3b567c6107 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-8.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-8.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {leaq f(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/llvm/test/CodeGen/X86/x86-64-pic-9.ll b/llvm/test/CodeGen/X86/x86-64-pic-9.ll index 3ad1d9558ac..076103133fa 100644 --- a/llvm/test/CodeGen/X86/x86-64-pic-9.ll +++ b/llvm/test/CodeGen/X86/x86-64-pic-9.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: llc -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 ; RUN: grep {leaq f(%rip),} %t1 ; RUN: not grep GOTPCREL %t1 diff --git a/llvm/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll b/llvm/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll index 5d1ebbd0bf3..b2a967913f4 100644 --- a/llvm/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll +++ b/llvm/test/Transforms/PredicateSimplifier/2006-10-22-IntOr.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: opt -predsimplify -instcombine -simplifycfg -S > %t +; RUN: opt < %s -predsimplify -instcombine -simplifycfg -S > %t ; RUN: grep -v declare %t | not grep fail ; RUN: grep -v declare %t | grep pass | count 3 diff --git a/llvm/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll b/llvm/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll index 5412c3cca73..57ba3cf809f 100644 --- a/llvm/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll +++ b/llvm/test/Transforms/PredicateSimplifier/2006-10-25-AddSetCC.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: opt -predsimplify -instcombine -simplifycfg -S | \ +; RUN: opt < %s -predsimplify -instcombine -simplifycfg -S | \ ; RUN: grep -v declare | grep pass | count 2 define i32 @test(i32 %x, i32 %y) { diff --git a/llvm/test/Transforms/PredicateSimplifier/predsimplify.ll b/llvm/test/Transforms/PredicateSimplifier/predsimplify.ll index ab42b491a1b..1a08c9d0d5b 100644 --- a/llvm/test/Transforms/PredicateSimplifier/predsimplify.ll +++ b/llvm/test/Transforms/PredicateSimplifier/predsimplify.ll @@ -1,5 +1,4 @@ -; RUN: llvm-as < %s | \ -; RUN: opt -predsimplify -instcombine -simplifycfg -S > %t +; RUN: opt < %s -predsimplify -instcombine -simplifycfg -S > %t ; RUN: grep -v declare %t | not grep fail ; RUN: grep -v declare %t | grep pass | count 4 diff --git a/llvm/test/Transforms/Reassociate/mul-factor3.ll b/llvm/test/Transforms/Reassociate/mul-factor3.ll index 734213d870f..4d0517618e0 100644 --- a/llvm/test/Transforms/Reassociate/mul-factor3.ll +++ b/llvm/test/Transforms/Reassociate/mul-factor3.ll @@ -1,7 +1,6 @@ ; This should be one add and two multiplies. -; RUN: llvm-as < %s | \ -; RUN: opt -reassociate -instcombine -S > %t +; RUN: opt < %s -reassociate -instcombine -S > %t ; RUN: grep mul %t | count 2 ; RUN: grep add %t | count 1 diff --git a/llvm/test/Transforms/Reassociate/mulfactor2.ll b/llvm/test/Transforms/Reassociate/mulfactor2.ll index 1d0e68d2445..8116554196f 100644 --- a/llvm/test/Transforms/Reassociate/mulfactor2.ll +++ b/llvm/test/Transforms/Reassociate/mulfactor2.ll @@ -1,7 +1,6 @@ ; This should turn into one multiply and one add. -; RUN: llvm-as < %s | \ -; RUN: opt -instcombine -reassociate -instcombine -S > %t +; RUN: opt < %s -instcombine -reassociate -instcombine -S > %t ; RUN: grep mul %t | count 1 ; RUN: grep add %t | count 1 diff --git a/llvm/test/Transforms/Reassociate/shift-factor.ll b/llvm/test/Transforms/Reassociate/shift-factor.ll index b84d3d9fc20..73af5e5304e 100644 --- a/llvm/test/Transforms/Reassociate/shift-factor.ll +++ b/llvm/test/Transforms/Reassociate/shift-factor.ll @@ -1,6 +1,5 @@ ; There should be exactly one shift and one add left. -; RUN: llvm-as < %s | \ -; RUN: opt -reassociate -instcombine -S > %t +; RUN: opt < %s -reassociate -instcombine -S > %t ; RUN: grep shl %t | count 1 ; RUN: grep add %t | count 1 diff --git a/llvm/test/Transforms/TailCallElim/ackermann.ll b/llvm/test/Transforms/TailCallElim/ackermann.ll index f65c66669e5..0c140ad681d 100644 --- a/llvm/test/Transforms/TailCallElim/ackermann.ll +++ b/llvm/test/Transforms/TailCallElim/ackermann.ll @@ -1,6 +1,5 @@ ; This function contains two tail calls, which should be eliminated -; RUN: llvm-as < %s | \ -; RUN: opt -tailcallelim -stats -disable-output |& grep {2 tailcallelim} +; RUN: opt < %s -tailcallelim -stats -disable-output |& grep {2 tailcallelim} define i32 @Ack(i32 %M.1, i32 %N.1) { entry: |
