diff options
| -rw-r--r-- | llvm/lib/Target/R600/EvergreenInstructions.td | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/EvergreenInstructions.td b/llvm/lib/Target/R600/EvergreenInstructions.td index 6430ca6e11f..dec6da6a513 100644 --- a/llvm/lib/Target/R600/EvergreenInstructions.td +++ b/llvm/lib/Target/R600/EvergreenInstructions.td @@ -273,7 +273,7 @@ def BFE_UINT_eg : R600_3OP <0x4, "BFE_UINT", VecALU >; -def BFE_INT_eg : R600_3OP <0x4, "BFE_INT", +def BFE_INT_eg : R600_3OP <0x5, "BFE_INT", [(set i32:$dst, (AMDGPUbfe_i32 i32:$src0, i32:$src1, i32:$src2))], VecALU >; diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll index c3f000a87c6..d15cb329830 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll @@ -1,11 +1,12 @@ ; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s -; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s +; RUN: llc -march=r600 -mcpu=redwood -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone ; FUNC-LABEL: @bfe_i32_arg_arg_arg ; SI: V_BFE_I32 ; EG: BFE_INT +; EG: encoding: [{{[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+,[x0-9a-f]+}},0xac define void @bfe_i32_arg_arg_arg(i32 addrspace(1)* %out, i32 %src0, i32 %src1, i32 %src2) nounwind { %bfe_i32 = call i32 @llvm.AMDGPU.bfe.i32(i32 %src0, i32 %src1, i32 %src1) nounwind readnone store i32 %bfe_i32, i32 addrspace(1)* %out, align 4 |
