diff options
| -rw-r--r-- | llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/param-align.ll | 11 |
2 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp index dba685548dc..0538eb1a5f3 100644 --- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp @@ -1072,7 +1072,6 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, MachineFunction &MF = DAG.getMachineFunction(); const Function *F = MF.getFunction(); auto &DL = MF.getDataLayout(); - bool isKernel = llvm::isKernelFunction(*F); SDValue tempChain = Chain; Chain = DAG.getCALLSEQ_START(Chain, @@ -1342,7 +1341,7 @@ SDValue NVPTXTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, // Enforce minumum alignment of 4 to work around ptxas miscompile // for sm_50+. See corresponding alignment adjustment in // emitFunctionParamList() for details. - if (!isKernel && ArgAlign < 4) + if (ArgAlign < 4) ArgAlign = 4; SDValue DeclareParamOps[] = {Chain, DAG.getConstant(ArgAlign, dl, MVT::i32), DAG.getConstant(paramCount, dl, MVT::i32), diff --git a/llvm/test/CodeGen/NVPTX/param-align.ll b/llvm/test/CodeGen/NVPTX/param-align.ll index 6d58fda59ae..75b6917265e 100644 --- a/llvm/test/CodeGen/NVPTX/param-align.ll +++ b/llvm/test/CodeGen/NVPTX/param-align.ll @@ -31,3 +31,14 @@ define ptx_device void @t4(i8* byval %x) { ; CHECK: .param .align 4 .b8 t4_param_0[1] ret void } + +;;; Make sure we adjust alignment at the call site as well. +define ptx_device void @t5(i8* align 2 byval %x) { +; CHECK: .func t5 +; CHECK: .param .align 4 .b8 t5_param_0[1] +; CHECK: { +; CHECK: .param .align 4 .b8 param0[1]; +; CHECK: call.uni + call void @t4(i8* byval %x) + ret void +} |
