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-rw-r--r--llvm/include/llvm/Target/TargetInstrPredicate.td19
-rw-r--r--llvm/lib/Target/X86/X86SchedPredicates.td2
-rw-r--r--llvm/utils/TableGen/CodeGenSchedule.cpp27
-rw-r--r--llvm/utils/TableGen/CodeGenSchedule.h2
-rw-r--r--llvm/utils/TableGen/InstrInfoEmitter.cpp21
-rw-r--r--llvm/utils/TableGen/PredicateExpander.cpp10
-rw-r--r--llvm/utils/TableGen/PredicateExpander.h8
-rw-r--r--llvm/utils/TableGen/SubtargetEmitter.cpp2
8 files changed, 59 insertions, 32 deletions
diff --git a/llvm/include/llvm/Target/TargetInstrPredicate.td b/llvm/include/llvm/Target/TargetInstrPredicate.td
index 8925e4b0b39..4191efbb050 100644
--- a/llvm/include/llvm/Target/TargetInstrPredicate.td
+++ b/llvm/include/llvm/Target/TargetInstrPredicate.td
@@ -198,19 +198,24 @@ class MCOpcodeSwitchStatement<list<MCOpcodeSwitchCase> cases,
MCStatement DefaultCase = default;
}
+// Base class for function predicates.
+class FunctionPredicateBase<string name, MCStatement body> {
+ string FunctionName = name;
+ MCStatement Body = body;
+}
+
// Check that a call to method `Name` in class "XXXGenInstrInfo" (where XXX is
-// the `Target` name) returns true.
+// the name of a target) returns true.
//
// TIIPredicate definitions are used to model calls to the target-specific
// InstrInfo. A TIIPredicate is treated specially by the InstrInfoEmitter
// tablegen backend, which will use it to automatically generate a definition in
// the target specific `GenInstrInfo` class.
-class TIIPredicate<string Target, string Name, MCStatement body>
- : MCInstPredicate {
- string TargetName = Target;
- string FunctionName = Name;
- MCStatement Body = body;
-}
+//
+// There cannot be multiple TIIPredicate definitions with the same name for the
+// same target.
+class TIIPredicate<string Name, MCStatement body>
+ : FunctionPredicateBase<Name, body>, MCInstPredicate;
// A function predicate that takes as input a machine instruction, and returns
// a boolean value.
diff --git a/llvm/lib/Target/X86/X86SchedPredicates.td b/llvm/lib/Target/X86/X86SchedPredicates.td
index abb86119d45..11b567c18cf 100644
--- a/llvm/lib/Target/X86/X86SchedPredicates.td
+++ b/llvm/lib/Target/X86/X86SchedPredicates.td
@@ -53,4 +53,4 @@ def IsThreeOperandsLEABody :
// 3-operands LEA. Tablegen automatically generates a new method for it in
// X86GenInstrInfo.
def IsThreeOperandsLEAFn :
- TIIPredicate<"X86", "isThreeOperandsLEA", IsThreeOperandsLEABody>;
+ TIIPredicate<"isThreeOperandsLEA", IsThreeOperandsLEABody>;
diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 9331fadf409..7b96f081e24 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -222,9 +222,36 @@ CodeGenSchedModels::CodeGenSchedModels(RecordKeeper &RK,
// Collect optional processor description.
collectOptionalProcessorInfo();
+ // Check MCInstPredicate definitions.
+ checkMCInstPredicates();
+
checkCompleteness();
}
+void CodeGenSchedModels::checkMCInstPredicates() const {
+ RecVec MCPredicates = Records.getAllDerivedDefinitions("TIIPredicate");
+ if (MCPredicates.empty())
+ return;
+
+ // A target cannot have multiple TIIPredicate definitions with a same name.
+ llvm::StringMap<const Record *> TIIPredicates(MCPredicates.size());
+ for (const Record *TIIPred : MCPredicates) {
+ StringRef Name = TIIPred->getValueAsString("FunctionName");
+ StringMap<const Record *>::const_iterator It = TIIPredicates.find(Name);
+ if (It == TIIPredicates.end()) {
+ TIIPredicates[Name] = TIIPred;
+ continue;
+ }
+
+ PrintError(TIIPred->getLoc(),
+ "TIIPredicate " + Name + " is multiply defined.");
+ PrintNote(It->second->getLoc(),
+ " Previous definition of " + Name + " was here.");
+ PrintFatalError(TIIPred->getLoc(),
+ "Found conflicting definitions of TIIPredicate.");
+ }
+}
+
void CodeGenSchedModels::collectRetireControlUnits() {
RecVec Units = Records.getAllDerivedDefinitions("RetireControlUnit");
diff --git a/llvm/utils/TableGen/CodeGenSchedule.h b/llvm/utils/TableGen/CodeGenSchedule.h
index 07c11596ade..112ae08d493 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.h
+++ b/llvm/utils/TableGen/CodeGenSchedule.h
@@ -465,6 +465,8 @@ private:
void inferSchedClasses();
+ void checkMCInstPredicates() const;
+
void checkCompleteness();
void inferFromRW(ArrayRef<unsigned> OperWrites, ArrayRef<unsigned> OperReads,
diff --git a/llvm/utils/TableGen/InstrInfoEmitter.cpp b/llvm/utils/TableGen/InstrInfoEmitter.cpp
index 2f2d301821b..34680155209 100644
--- a/llvm/utils/TableGen/InstrInfoEmitter.cpp
+++ b/llvm/utils/TableGen/InstrInfoEmitter.cpp
@@ -66,11 +66,11 @@ private:
/// This method is used to custom expand TIIPredicate definitions.
/// See file llvm/Target/TargetInstPredicates.td for a description of what is
/// a TIIPredicate and how to use it.
- void emitTIIHelperMethods(raw_ostream &OS);
+ void emitTIIHelperMethods(raw_ostream &OS, StringRef TargetName);
/// Expand TIIPredicate definitions to functions that accept a const MCInst
/// reference.
- void emitMCIIHelperMethods(raw_ostream &OS);
+ void emitMCIIHelperMethods(raw_ostream &OS, StringRef TargetName);
void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
Record *InstrInfo,
std::map<std::vector<Record*>, unsigned> &EL,
@@ -351,14 +351,12 @@ void InstrInfoEmitter::emitOperandTypesEnum(raw_ostream &OS,
OS << "#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM\n\n";
}
-void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS) {
+void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS,
+ StringRef TargetName) {
RecVec TIIPredicates = Records.getAllDerivedDefinitions("TIIPredicate");
if (TIIPredicates.empty())
return;
- CodeGenTarget &Target = CDP.getTargetInfo();
- const StringRef TargetName = Target.getName();
-
OS << "#ifdef GET_GENINSTRINFO_MC_DECL\n";
OS << "#undef GET_GENINSTRINFO_MC_DECL\n\n";
@@ -383,7 +381,7 @@ void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS) {
OS << "namespace llvm {\n";
OS << "namespace " << TargetName << "_MC {\n\n";
- PredicateExpander PE;
+ PredicateExpander PE(TargetName);
PE.setExpandForMC(true);
for (const Record *Rec : TIIPredicates) {
@@ -401,12 +399,13 @@ void InstrInfoEmitter::emitMCIIHelperMethods(raw_ostream &OS) {
OS << "#endif // GET_GENISTRINFO_MC_HELPERS\n";
}
-void InstrInfoEmitter::emitTIIHelperMethods(raw_ostream &OS) {
+void InstrInfoEmitter::emitTIIHelperMethods(raw_ostream &OS,
+ StringRef TargetName) {
RecVec TIIPredicates = Records.getAllDerivedDefinitions("TIIPredicate");
if (TIIPredicates.empty())
return;
- PredicateExpander PE;
+ PredicateExpander PE(TargetName);
PE.setExpandForMC(false);
PE.setIndentLevel(2);
@@ -518,7 +517,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
<< "(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1, int ReturnOpcode = -1);\n"
<< " ~" << ClassName << "() override = default;\n";
- emitTIIHelperMethods(OS);
+ emitTIIHelperMethods(OS, TargetName);
OS << "\n};\n} // end llvm namespace\n";
@@ -545,7 +544,7 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
emitOperandTypesEnum(OS, Target);
- emitMCIIHelperMethods(OS);
+ emitMCIIHelperMethods(OS, TargetName);
}
void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
diff --git a/llvm/utils/TableGen/PredicateExpander.cpp b/llvm/utils/TableGen/PredicateExpander.cpp
index ab0e67abbbd..0882ab84b98 100644
--- a/llvm/utils/TableGen/PredicateExpander.cpp
+++ b/llvm/utils/TableGen/PredicateExpander.cpp
@@ -134,14 +134,9 @@ void PredicateExpander::expandPredicateSequence(raw_ostream &OS,
}
void PredicateExpander::expandTIIFunctionCall(raw_ostream &OS,
- StringRef TargetName,
StringRef MethodName) {
OS << (shouldNegate() ? "!" : "");
- if (shouldExpandForMC())
- OS << TargetName << "_MC::";
- else
- OS << TargetName << "Gen"
- << "InstrInfo::";
+ OS << TargetName << (shouldExpandForMC() ? "_MC::" : "GenInstrInfo::");
OS << MethodName << (isByRef() ? "(MI)" : "(*MI)");
}
@@ -313,8 +308,7 @@ void PredicateExpander::expandPredicate(raw_ostream &OS, const Record *Rec) {
return expandCheckNonPortable(OS, Rec->getValueAsString("CodeBlock"));
if (Rec->isSubClassOf("TIIPredicate"))
- return expandTIIFunctionCall(OS, Rec->getValueAsString("TargetName"),
- Rec->getValueAsString("FunctionName"));
+ return expandTIIFunctionCall(OS, Rec->getValueAsString("FunctionName"));
llvm_unreachable("No known rules to expand this MCInstPredicate");
}
diff --git a/llvm/utils/TableGen/PredicateExpander.h b/llvm/utils/TableGen/PredicateExpander.h
index b39452f0fbf..9337a0f3d2c 100644
--- a/llvm/utils/TableGen/PredicateExpander.h
+++ b/llvm/utils/TableGen/PredicateExpander.h
@@ -30,14 +30,15 @@ class PredicateExpander {
bool NegatePredicate;
bool ExpandForMC;
unsigned IndentLevel;
+ StringRef TargetName;
PredicateExpander(const PredicateExpander &) = delete;
PredicateExpander &operator=(const PredicateExpander &) = delete;
public:
- PredicateExpander()
+ PredicateExpander(StringRef Target)
: EmitCallsByRef(true), NegatePredicate(false), ExpandForMC(false),
- IndentLevel(1U) {}
+ IndentLevel(1U), TargetName(Target) {}
bool isByRef() const { return EmitCallsByRef; }
bool shouldNegate() const { return NegatePredicate; }
bool shouldExpandForMC() const { return ExpandForMC; }
@@ -65,8 +66,7 @@ public:
void expandCheckOpcode(raw_ostream &OS, const RecVec &Opcodes);
void expandPredicateSequence(raw_ostream &OS, const RecVec &Sequence,
bool IsCheckAll);
- void expandTIIFunctionCall(raw_ostream &OS, StringRef TargetName,
- StringRef MethodName);
+ void expandTIIFunctionCall(raw_ostream &OS, StringRef MethodName);
void expandCheckIsRegOperand(raw_ostream &OS, int OpIndex);
void expandCheckIsImmOperand(raw_ostream &OS, int OpIndex);
void expandCheckInvalidRegOperand(raw_ostream &OS, int OpIndex);
diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 165189179c8..5153bba44a6 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -1616,7 +1616,7 @@ void SubtargetEmitter::emitSchedModelHelpersImpl(
OS << " case " << VC << ": // " << SC.Name << '\n';
- PredicateExpander PE;
+ PredicateExpander PE(Target);
PE.setByRef(false);
PE.setExpandForMC(OnlyExpandMCInstPredicates);
for (unsigned PI : ProcIndices) {
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