diff options
| -rw-r--r-- | llvm/test/TableGen/GlobalISelEmitter.td | 2 | ||||
| -rw-r--r-- | llvm/utils/TableGen/GlobalISelEmitter.cpp | 24 |
2 files changed, 18 insertions, 8 deletions
diff --git a/llvm/test/TableGen/GlobalISelEmitter.td b/llvm/test/TableGen/GlobalISelEmitter.td index 9a7fabb7588..a29ed4aea01 100644 --- a/llvm/test/TableGen/GlobalISelEmitter.td +++ b/llvm/test/TableGen/GlobalISelEmitter.td @@ -34,6 +34,7 @@ class I<dag OOps, dag IOps, list<dag> Pat> // CHECK-NEXT: (((MRI.getType(I.getOperand(2).getReg()) == (LLT::scalar(32))) && // CHECK-NEXT: ((&RBI.getRegBankFromRegClass(MyTarget::GPR32RegClass) == RBI.getRegBank(I.getOperand(2).getReg(), MRI, TRI)))))) { +// CHECK-NEXT: // (add:i32 GPR32:i32:$src1, GPR32:i32:$src2) => (ADD:i32 GPR32:i32:$src1, GPR32:i32:$src2) // CHECK-NEXT: I.setDesc(TII.get(MyTarget::ADD)); // CHECK-NEXT: constrainSelectedInstRegOperands(I, TII, TRI, RBI); // CHECK-NEXT: return true; @@ -47,6 +48,7 @@ def ADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2), // CHECK: if ((I.getOpcode() == TargetOpcode::G_BR) && // CHECK-NEXT: (((I.getOperand(0).isMBB())))) { +// CHECK-NEXT: // (br (bb:Other):$target) => (BR (bb:Other):$target) // CHECK-NEXT: I.setDesc(TII.get(MyTarget::BR)); // CHECK-NEXT: constrainSelectedInstRegOperands(I, TII, TRI, RBI); // CHECK-NEXT: return true; diff --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp b/llvm/utils/TableGen/GlobalISelEmitter.cpp index 1d16c5cb6c1..45567b23787 100644 --- a/llvm/utils/TableGen/GlobalISelEmitter.cpp +++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp @@ -291,6 +291,19 @@ public: virtual void emitCxxActionStmts(raw_ostream &OS) const = 0; }; +/// Generates a comment describing the matched rule being acted upon. +class DebugCommentAction : public MatchAction { +private: + const PatternToMatch &P; + +public: + DebugCommentAction(const PatternToMatch &P) : P(P) {} + + virtual void emitCxxActionStmts(raw_ostream &OS) const { + OS << "// " << *P.getSrcPattern() << " => " << *P.getDstPattern(); + } +}; + class MutateOpcodeAction : public MatchAction { private: const CodeGenInstruction *I; @@ -310,14 +323,11 @@ public: /// support multiple positions to support div/rem fusion or load-multiple /// instructions. class RuleMatcher { - const PatternToMatch &P; - std::vector<std::unique_ptr<InstructionMatcher>> Matchers; std::vector<std::unique_ptr<MatchAction>> Actions; public: - - RuleMatcher(const PatternToMatch &P) : P(P) {} + RuleMatcher() {} InstructionMatcher &addInstructionMatcher() { Matchers.emplace_back(new InstructionMatcher()); @@ -334,9 +344,6 @@ public: if (Matchers.empty()) llvm_unreachable("Unexpected empty matcher!"); - OS << " // Src: " << *P.getSrcPattern() << "\n" - << " // Dst: " << *P.getDstPattern() << "\n"; - // The representation supports rules that require multiple roots such as: // %ptr(p0) = ... // %elt0(s32) = G_LOAD %ptr @@ -385,7 +392,8 @@ Optional<GlobalISelEmitter::SkipReason> GlobalISelEmitter::runOnPattern(const PatternToMatch &P, raw_ostream &OS) { // Keep track of the matchers and actions to emit. - RuleMatcher M(P); + RuleMatcher M; + M.addAction<DebugCommentAction>(P); // First, analyze the whole pattern. // If the entire pattern has a predicate (e.g., target features), ignore it. |
