diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/constraint-c-err.ll | 17 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/constraint-c.ll | 18 |
3 files changed, 39 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 6448fd91756..c14360dc6b5 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3863,8 +3863,10 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, case 'c': // register suitable for indirect jump if (VT == MVT::i32) return std::make_pair((unsigned)Mips::T9, &Mips::GPR32RegClass); - assert(VT == MVT::i64 && "Unexpected type."); - return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass); + if (VT == MVT::i64) + return std::make_pair((unsigned)Mips::T9_64, &Mips::GPR64RegClass); + // This will generate an error message + return std::make_pair(0U, nullptr); case 'l': // register suitable for indirect jump if (VT == MVT::i32) return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass); diff --git a/llvm/test/CodeGen/Mips/constraint-c-err.ll b/llvm/test/CodeGen/Mips/constraint-c-err.ll new file mode 100644 index 00000000000..4015ef48065 --- /dev/null +++ b/llvm/test/CodeGen/Mips/constraint-c-err.ll @@ -0,0 +1,17 @@ +; Check that invalid type for constraint `c` causes an error message. +; RUN: not llc -march=mips -target-abi o32 < %s 2>&1 | FileCheck %s + +define i32 @main() #0 { +entry: + %jmp = alloca float, align 4 + store float 0x4200000000000000, float* %jmp, align 4 + %0 = load float, float* %jmp, align 4 + call void asm sideeffect "jr $0", "c,~{$1}"(float %0) #1 + +; CHECK: error: couldn't allocate input reg for constraint 'c' + + ret i32 0 +} + +attributes #0 = { noinline nounwind } +attributes #1 = { nounwind } diff --git a/llvm/test/CodeGen/Mips/constraint-c.ll b/llvm/test/CodeGen/Mips/constraint-c.ll new file mode 100644 index 00000000000..5a5d7672e95 --- /dev/null +++ b/llvm/test/CodeGen/Mips/constraint-c.ll @@ -0,0 +1,18 @@ +; Check handling of the constraint `c`. +; RUN: llc -march=mips -target-abi o32 < %s | FileCheck %s + +define i32 @main() #0 { +entry: + %jmp = alloca i32, align 4 + store i32 0, i32* %jmp, align 4 + %0 = load i32, i32* %jmp, align 4 + call void asm sideeffect "jr $0", "c,~{$1}"(i32 %0) #1 + +; CHECK: addiu $25, $zero, 0 +; CHECK: jr $25 + + ret i32 0 +} + +attributes #0 = { noinline nounwind } +attributes #1 = { nounwind } |
