diff options
| -rw-r--r-- | llvm/include/llvm/Target/GenericOpcodes.td | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td index 13896a32101..f5be5bd9727 100644 --- a/llvm/include/llvm/Target/GenericOpcodes.td +++ b/llvm/include/llvm/Target/GenericOpcodes.td @@ -315,8 +315,9 @@ def G_EXTRACT : Instruction { let hasSideEffects = 0; } -// Combine a sequence of generic vregs into a single larger value (starting at -// bit 0). +// Insert a sequence of smaller registers into a larger one at the specified +// indices (interleaved with the values in the operand list "op0, bit0, op1, +// bit1, ...")). def G_INSERT : Instruction { let OutOperandList = (outs unknown:$dst); let InOperandList = (ins unknown:$src, variable_ops); |
