diff options
| -rwxr-xr-x | llvm/lib/Target/X86/X86SchedBroadwell.td | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 20 |
2 files changed, 11 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td index 1e5a6e3bb7d..27bbf147c68 100755 --- a/llvm/lib/Target/X86/X86SchedBroadwell.td +++ b/llvm/lib/Target/X86/X86SchedBroadwell.td @@ -152,7 +152,7 @@ defm : BWWriteResPair<WriteBZHI, [BWPort15], 1>; defm : X86WriteRes<WriteLoad, [BWPort23], 5, [1], 1>; defm : X86WriteRes<WriteStore, [BWPort237, BWPort4], 1, [1,1], 1>; defm : X86WriteRes<WriteStoreNT, [BWPort237, BWPort4], 1, [1,1], 2>; -defm : X86WriteRes<WriteMove, [BWPort0156], 1, [1,1], 1>; +defm : X86WriteRes<WriteMove, [BWPort0156], 1, [1], 1>; // Idioms that clear a register, like xorps %xmm0, %xmm0. // These can often bypass execution ports completely. diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index 4450bf6b114..5ba22a85efb 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -197,12 +197,12 @@ defm : X86WriteRes<WriteFLoadX, [ZnAGU], 8, [1], 1>; defm : X86WriteRes<WriteFLoadY, [ZnAGU], 8, [1], 1>; defm : X86WriteRes<WriteFMaskedLoad, [ZnAGU,ZnFPU01], 8, [1,1], 1>; defm : X86WriteRes<WriteFMaskedLoadY, [ZnAGU,ZnFPU01], 8, [1,2], 2>; -defm : X86WriteRes<WriteFStore, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteFStoreX, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteFStoreY, [ZnAGU], 1, [1,1], 1>; +defm : X86WriteRes<WriteFStore, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteFStoreX, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteFStoreY, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteFStoreNT, [ZnAGU,ZnFPU2], 8, [1,1], 1>; -defm : X86WriteRes<WriteFStoreNTX, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteFStoreNTY, [ZnAGU], 1, [1,1], 1>; +defm : X86WriteRes<WriteFStoreNTX, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteFStoreNTY, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteFMaskedStore, [ZnAGU,ZnFPU01], 4, [1,1], 1>; defm : X86WriteRes<WriteFMaskedStoreY, [ZnAGU,ZnFPU01], 5, [1,2], 2>; defm : X86WriteRes<WriteFMove, [ZnFPU], 1, [1], 1>; @@ -292,11 +292,11 @@ defm : X86WriteRes<WriteVecLoadNT, [ZnAGU], 8, [1], 1>; defm : X86WriteRes<WriteVecLoadNTY, [ZnAGU], 8, [1], 1>; defm : X86WriteRes<WriteVecMaskedLoad, [ZnAGU,ZnFPU01], 8, [1,2], 2>; defm : X86WriteRes<WriteVecMaskedLoadY, [ZnAGU,ZnFPU01], 9, [1,3], 2>; -defm : X86WriteRes<WriteVecStore, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteVecStoreX, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteVecStoreY, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteVecStoreNT, [ZnAGU], 1, [1,1], 1>; -defm : X86WriteRes<WriteVecStoreNTY, [ZnAGU], 1, [1,1], 1>; +defm : X86WriteRes<WriteVecStore, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteVecStoreX, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteVecStoreY, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteVecStoreNT, [ZnAGU], 1, [1], 1>; +defm : X86WriteRes<WriteVecStoreNTY, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteVecMaskedStore, [ZnAGU,ZnFPU01], 4, [1,1], 1>; defm : X86WriteRes<WriteVecMaskedStoreY, [ZnAGU,ZnFPU01], 5, [1,2], 2>; defm : X86WriteRes<WriteVecMove, [ZnFPU], 1, [1], 1>; |
