diff options
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir | 18 |
2 files changed, 24 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index c1d503642fc..5e5c9d7d3b8 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -1534,6 +1534,12 @@ bool AMDGPULegalizerInfo::legalizeIntrinsic(MachineInstr &MI, return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::LOCAL_ADDRESS); case Intrinsic::amdgcn_is_private: return legalizeIsAddrSpace(MI, MRI, B, AMDGPUAS::PRIVATE_ADDRESS); + case Intrinsic::amdgcn_wavefrontsize: { + B.setInstr(MI); + B.buildConstant(MI.getOperand(0), ST.getWavefrontSize()); + MI.eraseFromParent(); + return true; + } default: return true; } diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir new file mode 100644 index 00000000000..53eef78c733 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir @@ -0,0 +1,18 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE64 %s +# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -run-pass=legalizer %s -o - | FileCheck -check-prefix=WAVE32 %s + +--- +name: test_wavefrontsize +body: | + bb.0: + + ; WAVE64-LABEL: name: test_wavefrontsize + ; WAVE64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64 + ; WAVE64: $vgpr0 = COPY [[C]](s32) + ; WAVE32-LABEL: name: test_wavefrontsize + ; WAVE32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32 + ; WAVE32: $vgpr0 = COPY [[C]](s32) + %0:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wavefrontsize) + $vgpr0 = COPY %0 +... |
