diff options
25 files changed, 2322 insertions, 0 deletions
diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi1.s new file mode 100644 index 00000000000..1d78f1e8a43 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi1.s @@ -0,0 +1,116 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 3 7 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 3 7 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 14.00 6.00 6.00 - 10.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsil %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsil (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsiq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi2.s new file mode 100644 index 00000000000..4d5723a3317 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-bmi2.s @@ -0,0 +1,144 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 3 4 1.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 4 9 1.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 3 9 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 9.50 14.50 8.00 8.00 - 4.50 9.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mulxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxl $1, %eax, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxq $1, %rax, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-lzcnt.s new file mode 100644 index 00000000000..6b0e54572bd --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-lzcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-popcnt.s new file mode 100644 index 00000000000..8971d2d9fc3 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-popcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * popcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - BWDivider +# CHECK-NEXT: [1] - BWFPDivider +# CHECK-NEXT: [2] - BWPort0 +# CHECK-NEXT: [3] - BWPort1 +# CHECK-NEXT: [4] - BWPort2 +# CHECK-NEXT: [5] - BWPort3 +# CHECK-NEXT: [6] - BWPort4 +# CHECK-NEXT: [7] - BWPort5 +# CHECK-NEXT: [8] - BWPort6 +# CHECK-NEXT: [9] - BWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s new file mode 100644 index 00000000000..d67e0429859 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-bmi1.s @@ -0,0 +1,120 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 1 4 1.00 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 1 4 1.00 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 1 4 1.00 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 1 4 1.00 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx +# CHECK-NEXT: 1 4 1.00 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx +# CHECK-NEXT: 1 4 1.00 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx +# CHECK-NEXT: 1 4 1.00 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx +# CHECK-NEXT: 1 4 1.00 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx +# CHECK-NEXT: 1 4 1.00 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx +# CHECK-NEXT: 1 4 1.00 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 2 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 1 5 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 2 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 1 5 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - JALU0 +# CHECK-NEXT: [1] - JALU1 +# CHECK-NEXT: [2] - JDiv +# CHECK-NEXT: [3] - JFPA +# CHECK-NEXT: [4] - JFPM +# CHECK-NEXT: [5] - JFPU0 +# CHECK-NEXT: [6] - JFPU1 +# CHECK-NEXT: [7] - JLAGU +# CHECK-NEXT: [8] - JMul +# CHECK-NEXT: [9] - JSAGU +# CHECK-NEXT: [10] - JSTC +# CHECK-NEXT: [11] - JVALU0 +# CHECK-NEXT: [12] - JVALU1 +# CHECK-NEXT: [13] - JVIMUL + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] +# CHECK-NEXT: 14.00 14.00 - - - - - 12.00 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsil %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsil (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsiq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsiq (%rax), %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsmskl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsmskl (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsmskq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsmskq (%rax), %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsrl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsrl (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - blsrq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - blsrq (%rax), %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: 1.00 1.00 - - - - - - - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: 1.00 1.00 - - - - - 1.00 - - - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-lzcnt.s new file mode 100644 index 00000000000..1dd144dd648 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-lzcnt.s @@ -0,0 +1,57 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 lzcntw %cx, %cx +# CHECK-NEXT: 1 4 1.00 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 1 0.50 lzcntl %eax, %ecx +# CHECK-NEXT: 1 4 1.00 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 lzcntq %rax, %rcx +# CHECK-NEXT: 1 4 1.00 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - JALU0 +# CHECK-NEXT: [1] - JALU1 +# CHECK-NEXT: [2] - JDiv +# CHECK-NEXT: [3] - JFPA +# CHECK-NEXT: [4] - JFPM +# CHECK-NEXT: [5] - JFPU0 +# CHECK-NEXT: [6] - JFPU1 +# CHECK-NEXT: [7] - JLAGU +# CHECK-NEXT: [8] - JMul +# CHECK-NEXT: [9] - JSAGU +# CHECK-NEXT: [10] - JSTC +# CHECK-NEXT: [11] - JVALU0 +# CHECK-NEXT: [12] - JVALU1 +# CHECK-NEXT: [13] - JVIMUL + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] +# CHECK-NEXT: 3.00 3.00 - - - - - 3.00 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - lzcntw (%rax), %cx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: 0.50 0.50 - - - - - - - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 - - - - - 1.00 - - - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi1.s new file mode 100644 index 00000000000..e73f06c9140 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi1.s @@ -0,0 +1,116 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 3 7 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 3 7 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 14.00 6.00 6.00 - 10.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsil %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsil (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsiq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi2.s new file mode 100644 index 00000000000..c316af02d51 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-bmi2.s @@ -0,0 +1,144 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 3 4 1.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 4 9 1.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 3 9 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 9.50 14.50 8.00 8.00 - 2.50 11.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mulxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - 1.00 - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - 1.00 - mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxl $1, %eax, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxq $1, %rax, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-lzcnt.s new file mode 100644 index 00000000000..fed571678f6 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-lzcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-popcnt.s new file mode 100644 index 00000000000..5366a247baa --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-popcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * popcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - HWDivider +# CHECK-NEXT: [1] - HWFPDivider +# CHECK-NEXT: [2] - HWPort0 +# CHECK-NEXT: [3] - HWPort1 +# CHECK-NEXT: [4] - HWPort2 +# CHECK-NEXT: [5] - HWPort3 +# CHECK-NEXT: [6] - HWPort4 +# CHECK-NEXT: [7] - HWPort5 +# CHECK-NEXT: [8] - HWPort6 +# CHECK-NEXT: [9] - HWPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-popcnt.s new file mode 100644 index 00000000000..a34414d7aff --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SLM/resources-popcnt.s @@ -0,0 +1,51 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=slm -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx +# CHECK-NEXT: 1 6 1.00 * popcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx +# CHECK-NEXT: 1 6 1.00 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx +# CHECK-NEXT: 1 6 1.00 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SLMDivider +# CHECK-NEXT: [1] - SLMFPDivider +# CHECK-NEXT: [2] - SLMFPMultiplier +# CHECK-NEXT: [3] - SLM_FPC_RSV0 +# CHECK-NEXT: [4] - SLM_FPC_RSV1 +# CHECK-NEXT: [5] - SLM_IEC_RSV0 +# CHECK-NEXT: [6] - SLM_IEC_RSV1 +# CHECK-NEXT: [7] - SLM_MEC_RSV + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] +# CHECK-NEXT: - - - - - 6.00 - 3.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions: +# CHECK-NEXT: - - - - - 1.00 - - popcntw %cx, %cx +# CHECK-NEXT: - - - - - 1.00 - 1.00 popcntw (%rax), %cx +# CHECK-NEXT: - - - - - 1.00 - - popcntl %eax, %ecx +# CHECK-NEXT: - - - - - 1.00 - 1.00 popcntl (%rax), %ecx +# CHECK-NEXT: - - - - - 1.00 - - popcntq %rax, %rcx +# CHECK-NEXT: - - - - - 1.00 - 1.00 popcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi1.s new file mode 100644 index 00000000000..a50ba653491 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi1.s @@ -0,0 +1,114 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.33 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.33 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 1.00 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 3 7 1.00 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 1.00 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 3 7 1.00 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.33 blsil %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.33 blsiq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.33 blsmskl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.33 blsmskq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.33 blsrl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.33 blsrq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 7.33 13.33 - 7.33 6.00 6.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 1.00 - 0.50 - - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 1.00 - 0.50 0.50 0.50 bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsil %eax, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsil (%rax), %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsiq %rax, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsiq (%rax), %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskl %eax, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskl (%rax), %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsmskq %rax, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsmskq (%rax), %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrl %eax, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrl (%rax), %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - blsrq %rax, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 blsrq (%rax), %rcx +# CHECK-NEXT: - - - 1.00 - - - - tzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - tzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi2.s new file mode 100644 index 00000000000..591b28918f8 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-bmi2.s @@ -0,0 +1,142 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=ivybridge -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 1.00 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 1.00 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 1.00 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 1.00 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 2 3 1.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 3 8 1.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 2 3 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 3 8 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.33 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.33 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.33 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.33 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SBDivider +# CHECK-NEXT: [1] - SBFPDivider +# CHECK-NEXT: [2] - SBPort0 +# CHECK-NEXT: [3] - SBPort1 +# CHECK-NEXT: [4] - SBPort4 +# CHECK-NEXT: [5] - SBPort5 +# CHECK-NEXT: [6.0] - SBPort23 +# CHECK-NEXT: [6.1] - SBPort23 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] +# CHECK-NEXT: - - 10.67 10.67 - 10.67 8.00 8.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6.0] [6.1] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 1.00 - - - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 1.00 - - - - mulxl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - 0.50 0.50 mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.33 0.33 - 0.33 0.50 0.50 pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 - - rorxl $1, %eax, %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 - - rorxq $1, %rax, %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 - - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 - - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 - - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 - - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 - - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - 0.50 - - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - 0.50 0.50 0.50 shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi1.s new file mode 100644 index 00000000000..2adaa9d0817 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi1.s @@ -0,0 +1,116 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 3 7 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 3 7 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 14.00 6.00 6.00 - 10.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsil %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsil (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsiq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi2.s new file mode 100644 index 00000000000..8f11d60c32b --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-bmi2.s @@ -0,0 +1,144 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 3 4 1.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 4 9 1.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 3 9 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 9.50 14.50 8.00 8.00 - 4.50 9.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mulxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxl $1, %eax, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxq $1, %rax, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-lzcnt.s new file mode 100644 index 00000000000..64ce95161b8 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-lzcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-popcnt.s new file mode 100644 index 00000000000..9f340da63e1 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-popcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * popcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKLDivider +# CHECK-NEXT: [1] - SKLFPDivider +# CHECK-NEXT: [2] - SKLPort0 +# CHECK-NEXT: [3] - SKLPort1 +# CHECK-NEXT: [4] - SKLPort2 +# CHECK-NEXT: [5] - SKLPort3 +# CHECK-NEXT: [6] - SKLPort4 +# CHECK-NEXT: [7] - SKLPort5 +# CHECK-NEXT: [8] - SKLPort6 +# CHECK-NEXT: [9] - SKLPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi1.s new file mode 100644 index 00000000000..e84bfa3c884 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi1.s @@ -0,0 +1,116 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.50 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 2 2 0.50 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 3 7 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 2 2 0.50 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 3 7 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 blsil %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsiq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsmskl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsmskq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 blsrl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 blsrq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 3 1.00 tzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 tzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 2.00 14.00 6.00 6.00 - 10.00 2.00 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 0.50 - - - 0.50 0.50 - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 0.50 0.50 0.50 - 0.50 0.50 - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsil %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsil (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsiq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsiq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsmskq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrl %eax, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrl (%rax), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - blsrq %rax, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - blsrq (%rax), %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi2.s new file mode 100644 index 00000000000..951aa0d5ccb --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-bmi2.s @@ -0,0 +1,144 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.50 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 3 4 1.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 4 9 1.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 3 9 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 3 1.00 pextl %eax, %ebx, %ecx +# CHECK-NEXT: 2 8 1.00 * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 pextq %rax, %rbx, %rcx +# CHECK-NEXT: 2 8 1.00 * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.50 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.50 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.50 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.50 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 6 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.50 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 6 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - 9.50 14.50 8.00 8.00 - 4.50 9.50 - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - - 0.50 - - - 0.50 - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 0.50 0.50 0.50 - 0.50 - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.75 1.25 - - - 0.25 0.75 - mulxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.75 1.25 0.50 0.50 - 0.25 0.75 - mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - 1.00 - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - 1.00 - - mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxl $1, %eax, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - rorxq $1, %rax, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.50 - - - - - 0.50 - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: - - 0.50 - 0.50 0.50 - - 0.50 - shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-lzcnt.s new file mode 100644 index 00000000000..0f29ea7cdcd --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-lzcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 lzcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 lzcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 lzcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-popcnt.s new file mode 100644 index 00000000000..de7a7f2d779 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-popcnt.s @@ -0,0 +1,53 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 3 1.00 popcntw %cx, %cx +# CHECK-NEXT: 2 8 1.00 * popcntw (%rax), %cx +# CHECK-NEXT: 1 3 1.00 popcntl %eax, %ecx +# CHECK-NEXT: 2 8 1.00 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 3 1.00 popcntq %rax, %rcx +# CHECK-NEXT: 2 8 1.00 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - SKXDivider +# CHECK-NEXT: [1] - SKXFPDivider +# CHECK-NEXT: [2] - SKXPort0 +# CHECK-NEXT: [3] - SKXPort1 +# CHECK-NEXT: [4] - SKXPort2 +# CHECK-NEXT: [5] - SKXPort3 +# CHECK-NEXT: [6] - SKXPort4 +# CHECK-NEXT: [7] - SKXPort5 +# CHECK-NEXT: [8] - SKXPort6 +# CHECK-NEXT: [9] - SKXPort7 + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] +# CHECK-NEXT: - - - 6.00 1.50 1.50 - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions: +# CHECK-NEXT: - - - 1.00 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: - - - 1.00 0.50 0.50 - - - - popcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s new file mode 100644 index 00000000000..a77b5ca3bbf --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi1.s @@ -0,0 +1,118 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +andn %eax, %ebx, %ecx +andn (%rax), %ebx, %ecx + +andn %rax, %rbx, %rcx +andn (%rax), %rbx, %rcx + +bextr %eax, %ebx, %ecx +bextr %eax, (%rbx), %ecx + +bextr %rax, %rbx, %rcx +bextr %rax, (%rbx), %rcx + +blsi %eax, %ecx +blsi (%rax), %ecx + +blsi %rax, %rcx +blsi (%rax), %rcx + +blsmsk %eax, %ecx +blsmsk (%rax), %ecx + +blsmsk %rax, %rcx +blsmsk (%rax), %rcx + +blsr %eax, %ecx +blsr (%rax), %ecx + +blsr %rax, %rcx +blsr (%rax), %rcx + +tzcnt %eax, %ecx +tzcnt (%rax), %ecx + +tzcnt %rax, %rcx +tzcnt (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 andnl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * andnl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 1 0.25 andnq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * andnq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.25 bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 2 0.25 blsil %eax, %ecx +# CHECK-NEXT: 1 6 0.50 * blsil (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsiq %rax, %rcx +# CHECK-NEXT: 1 6 0.50 * blsiq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 blsmskl %eax, %ecx +# CHECK-NEXT: 1 6 0.50 * blsmskl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsmskq %rax, %rcx +# CHECK-NEXT: 1 6 0.50 * blsmskq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 blsrl %eax, %ecx +# CHECK-NEXT: 1 6 0.50 * blsrl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 blsrq %rax, %rcx +# CHECK-NEXT: 1 6 0.50 * blsrq (%rax), %rcx +# CHECK-NEXT: 1 2 0.25 tzcntl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * tzcntl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 tzcntq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * tzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: 6.00 6.00 6.00 6.00 6.00 6.00 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - andnl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - andnl (%rax), %ebx, %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - andnq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - andnq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - bextrl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - bextrl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - bextrq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - bextrq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsil %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsil (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsiq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsiq (%rax), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsmskl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsmskl (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsmskq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsmskq (%rax), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsrl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsrl (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - blsrq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - blsrq (%rax), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - tzcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - tzcntl (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - tzcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - tzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi2.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi2.s new file mode 100644 index 00000000000..217619a3587 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-bmi2.s @@ -0,0 +1,146 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +bzhi %eax, %ebx, %ecx +bzhi %eax, (%rbx), %ecx + +bzhi %rax, %rbx, %rcx +bzhi %rax, (%rbx), %rcx + +mulx %eax, %ebx, %ecx +mulx (%rax), %ebx, %ecx + +mulx %rax, %rbx, %rcx +mulx (%rax), %rbx, %rcx + +pdep %eax, %ebx, %ecx +pdep (%rax), %ebx, %ecx + +pdep %rax, %rbx, %rcx +pdep (%rax), %rbx, %rcx + +pext %eax, %ebx, %ecx +pext (%rax), %ebx, %ecx + +pext %rax, %rbx, %rcx +pext (%rax), %rbx, %rcx + +rorx $1, %eax, %ecx +rorx $1, (%rax), %ecx + +rorx $1, %rax, %rcx +rorx $1, (%rax), %rcx + +sarx %eax, %ebx, %ecx +sarx %eax, (%rbx), %ecx + +sarx %rax, %rbx, %rcx +sarx %rax, (%rbx), %rcx + +shlx %eax, %ebx, %ecx +shlx %eax, (%rbx), %ecx + +shlx %rax, %rbx, %rcx +shlx %rax, (%rbx), %rcx + +shrx %eax, %ebx, %ecx +shrx %eax, (%rbx), %ecx + +shrx %rax, %rbx, %rcx +shrx %rax, (%rbx), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 3 2.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 1 8 2.00 * mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 3 1.00 mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 1 8 1.00 * mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 100 - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: 1 100 - * pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 100 - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: 1 100 - * pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 100 - pextl %eax, %ebx, %ecx +# CHECK-NEXT: 1 100 - * pextl (%rax), %ebx, %ecx +# CHECK-NEXT: 1 100 - pextq %rax, %rbx, %rcx +# CHECK-NEXT: 1 100 - * pextq (%rax), %rbx, %rcx +# CHECK-NEXT: 1 1 0.25 rorxl $1, %eax, %ecx +# CHECK-NEXT: 2 5 0.50 * rorxl $1, (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 rorxq $1, %rax, %rcx +# CHECK-NEXT: 2 5 0.50 * rorxq $1, (%rax), %rcx +# CHECK-NEXT: 1 1 0.25 sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: 1 1 0.25 shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 2 5 0.50 * shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: 1 1 0.25 shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 2 5 0.50 * shrxq %rax, (%rbx), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: 6.00 6.00 5.00 10.00 5.00 5.00 - - - - - 5.00 + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - bzhil %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - bzhil %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - bzhiq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - bzhiq %rax, (%rbx), %rcx +# CHECK-NEXT: - - - 1.00 - - - - - - - 2.00 mulxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 - 2.00 - - - - - - - 2.00 mulxl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - 1.00 - - - - - - - - mulxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 - 1.00 - - - - - - - 1.00 mulxq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - pdepl %eax, %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - pdepl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - pdepq %rax, %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - pdepq (%rax), %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - pextl %eax, %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - pextl (%rax), %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - pextq %rax, %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - pextq (%rax), %rbx, %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorxl $1, %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - rorxl $1, (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - rorxq $1, %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - rorxq $1, (%rax), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - sarxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - sarxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - sarxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shlxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shlxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shlxq %rax, (%rbx), %rcx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shrxl %eax, %ebx, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shrxl %eax, (%rbx), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - shrxq %rax, %rbx, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - shrxq %rax, (%rbx), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-lzcnt.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-lzcnt.s new file mode 100644 index 00000000000..9f2a8b6d4f3 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-lzcnt.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +lzcntw %cx, %cx +lzcntw (%rax), %cx + +lzcntl %eax, %ecx +lzcntl (%rax), %ecx + +lzcntq %rax, %rcx +lzcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 2 0.25 lzcntw %cx, %cx +# CHECK-NEXT: 2 6 0.50 * lzcntw (%rax), %cx +# CHECK-NEXT: 1 2 0.25 lzcntl %eax, %ecx +# CHECK-NEXT: 2 6 0.50 * lzcntl (%rax), %ecx +# CHECK-NEXT: 1 2 0.25 lzcntq %rax, %rcx +# CHECK-NEXT: 2 6 0.50 * lzcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: 1.50 1.50 1.50 1.50 1.50 1.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - lzcntw %cx, %cx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - lzcntw (%rax), %cx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - lzcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - lzcntl (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - lzcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - lzcntq (%rax), %rcx + diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-popcnt.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-popcnt.s new file mode 100644 index 00000000000..969da2fd106 --- /dev/null +++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-popcnt.s @@ -0,0 +1,55 @@ +# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py +# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s + +popcntw %cx, %cx +popcntw (%rax), %cx + +popcntl %eax, %ecx +popcntl (%rax), %ecx + +popcntq %rax, %rcx +popcntq (%rax), %rcx + +# CHECK: Instruction Info: +# CHECK-NEXT: [1]: #uOps +# CHECK-NEXT: [2]: Latency +# CHECK-NEXT: [3]: RThroughput +# CHECK-NEXT: [4]: MayLoad +# CHECK-NEXT: [5]: MayStore +# CHECK-NEXT: [6]: HasSideEffects + +# CHECK: [1] [2] [3] [4] [5] [6] Instructions: +# CHECK-NEXT: 1 1 0.25 popcntw %cx, %cx +# CHECK-NEXT: 2 5 0.50 * popcntw (%rax), %cx +# CHECK-NEXT: 1 1 0.25 popcntl %eax, %ecx +# CHECK-NEXT: 2 5 0.50 * popcntl (%rax), %ecx +# CHECK-NEXT: 1 1 0.25 popcntq %rax, %rcx +# CHECK-NEXT: 2 5 0.50 * popcntq (%rax), %rcx + +# CHECK: Resources: +# CHECK-NEXT: [0] - ZnAGU0 +# CHECK-NEXT: [1] - ZnAGU1 +# CHECK-NEXT: [2] - ZnALU0 +# CHECK-NEXT: [3] - ZnALU1 +# CHECK-NEXT: [4] - ZnALU2 +# CHECK-NEXT: [5] - ZnALU3 +# CHECK-NEXT: [6] - ZnDivider +# CHECK-NEXT: [7] - ZnFPU0 +# CHECK-NEXT: [8] - ZnFPU1 +# CHECK-NEXT: [9] - ZnFPU2 +# CHECK-NEXT: [10] - ZnFPU3 +# CHECK-NEXT: [11] - ZnMultiplier + +# CHECK: Resource pressure per iteration: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] +# CHECK-NEXT: 1.50 1.50 1.50 1.50 1.50 1.50 - - - - - - + +# CHECK: Resource pressure by instruction: +# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] Instructions: +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - popcntw %cx, %cx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - popcntw (%rax), %cx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - popcntl %eax, %ecx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - popcntl (%rax), %ecx +# CHECK-NEXT: - - 0.25 0.25 0.25 0.25 - - - - - - popcntq %rax, %rcx +# CHECK-NEXT: 0.50 0.50 0.25 0.25 0.25 0.25 - - - - - - popcntq (%rax), %rcx + |
