diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrMVE.td | 3 | ||||
| -rw-r--r-- | llvm/unittests/Target/ARM/MachineInstrTest.cpp | 22 |
2 files changed, 0 insertions, 25 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrMVE.td b/llvm/lib/Target/ARM/ARMInstrMVE.td index a40231c4aa1..82a622d799a 100644 --- a/llvm/lib/Target/ARM/ARMInstrMVE.td +++ b/llvm/lib/Target/ARM/ARMInstrMVE.td @@ -5394,7 +5394,6 @@ class MVE_VPT<string suffix, bits<2> size, dag iops, string asm, list<dag> patte let Inst{4} = 0b0; let Defs = [VPR]; - let validForTailPredication = 1; } class MVE_VPTt1<string suffix, bits<2> size, dag iops> @@ -5406,7 +5405,6 @@ class MVE_VPTt1<string suffix, bits<2> size, dag iops> let Inst{5} = Qm{3}; let Inst{3-1} = Qm{2-0}; let Inst{0} = fc{1}; - let validForTailPredication = 1; } class MVE_VPTt1i<string suffix, bits<2> size> @@ -5508,7 +5506,6 @@ class MVE_VPTf<string suffix, bit size, dag iops, string asm, list<dag> pattern= let Defs = [VPR]; let Predicates = [HasMVEFloat]; - let validForTailPredication = 1; } class MVE_VPTft1<string suffix, bit size> diff --git a/llvm/unittests/Target/ARM/MachineInstrTest.cpp b/llvm/unittests/Target/ARM/MachineInstrTest.cpp index fc7dc9e67ca..8807a2f3182 100644 --- a/llvm/unittests/Target/ARM/MachineInstrTest.cpp +++ b/llvm/unittests/Target/ARM/MachineInstrTest.cpp @@ -272,28 +272,6 @@ TEST(MachineInstrValidTailPredication, IsCorrect) { case MVE_VPNOT: case MVE_VPSEL: case MVE_VPST: - case MVE_VPTv16i8: - case MVE_VPTv16i8r: - case MVE_VPTv16s8: - case MVE_VPTv16s8r: - case MVE_VPTv16u8: - case MVE_VPTv16u8r: - case MVE_VPTv4f32: - case MVE_VPTv4f32r: - case MVE_VPTv4i32: - case MVE_VPTv4i32r: - case MVE_VPTv4s32: - case MVE_VPTv4s32r: - case MVE_VPTv4u32: - case MVE_VPTv4u32r: - case MVE_VPTv8f16: - case MVE_VPTv8f16r: - case MVE_VPTv8i16: - case MVE_VPTv8i16r: - case MVE_VPTv8s16: - case MVE_VPTv8s16r: - case MVE_VPTv8u16: - case MVE_VPTv8u16r: case MVE_VQABSs16: case MVE_VQABSs32: case MVE_VQABSs8: |
