diff options
| -rw-r--r-- | llvm/test/CodeGen/X86/sar_fold64.ll | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/sar_fold64.ll b/llvm/test/CodeGen/X86/sar_fold64.ll index 7b33bb8c061..cc00d2d7866 100644 --- a/llvm/test/CodeGen/X86/sar_fold64.ll +++ b/llvm/test/CodeGen/X86/sar_fold64.ll @@ -1,9 +1,14 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s define i32 @shl48sar47(i64 %a) #0 { ; CHECK-LABEL: shl48sar47: ; CHECK: # BB#0: ; CHECK-NEXT: movswq %di, %rax +; CHECK-NEXT: addl %eax, %eax +; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill> +; CHECK-NEXT: retq +; %1 = shl i64 %a, 48 %2 = ashr exact i64 %1, 47 %3 = trunc i64 %2 to i32 @@ -14,6 +19,10 @@ define i32 @shl48sar49(i64 %a) #0 { ; CHECK-LABEL: shl48sar49: ; CHECK: # BB#0: ; CHECK-NEXT: movswq %di, %rax +; CHECK-NEXT: shrq %rax +; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill> +; CHECK-NEXT: retq +; %1 = shl i64 %a, 48 %2 = ashr exact i64 %1, 49 %3 = trunc i64 %2 to i32 @@ -24,6 +33,10 @@ define i32 @shl56sar55(i64 %a) #0 { ; CHECK-LABEL: shl56sar55: ; CHECK: # BB#0: ; CHECK-NEXT: movsbq %dil, %rax +; CHECK-NEXT: addl %eax, %eax +; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill> +; CHECK-NEXT: retq +; %1 = shl i64 %a, 56 %2 = ashr exact i64 %1, 55 %3 = trunc i64 %2 to i32 @@ -34,6 +47,10 @@ define i32 @shl56sar57(i64 %a) #0 { ; CHECK-LABEL: shl56sar57: ; CHECK: # BB#0: ; CHECK-NEXT: movsbq %dil, %rax +; CHECK-NEXT: shrq %rax +; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill> +; CHECK-NEXT: retq +; %1 = shl i64 %a, 56 %2 = ashr exact i64 %1, 57 %3 = trunc i64 %2 to i32 |
