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authorSanjay Patel <spatel@rotateright.com>2016-10-17 15:38:41 +0000
committerSanjay Patel <spatel@rotateright.com>2016-10-17 15:38:41 +0000
commit832962110af1fd1ad90fa77d9631b545a8beb55d (patch)
tree638c08f420c7ed8f6606fd89269772db3f7ce085
parent50fd615f54abe0cf0dee8b8a02817cde12ee15e0 (diff)
downloadbcm5719-llvm-832962110af1fd1ad90fa77d9631b545a8beb55d.tar.gz
bcm5719-llvm-832962110af1fd1ad90fa77d9631b545a8beb55d.zip
[x86] auto-generate checks
llvm-svn: 284393
-rw-r--r--llvm/test/CodeGen/X86/sar_fold64.ll17
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/sar_fold64.ll b/llvm/test/CodeGen/X86/sar_fold64.ll
index 7b33bb8c061..cc00d2d7866 100644
--- a/llvm/test/CodeGen/X86/sar_fold64.ll
+++ b/llvm/test/CodeGen/X86/sar_fold64.ll
@@ -1,9 +1,14 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @shl48sar47(i64 %a) #0 {
; CHECK-LABEL: shl48sar47:
; CHECK: # BB#0:
; CHECK-NEXT: movswq %di, %rax
+; CHECK-NEXT: addl %eax, %eax
+; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: retq
+;
%1 = shl i64 %a, 48
%2 = ashr exact i64 %1, 47
%3 = trunc i64 %2 to i32
@@ -14,6 +19,10 @@ define i32 @shl48sar49(i64 %a) #0 {
; CHECK-LABEL: shl48sar49:
; CHECK: # BB#0:
; CHECK-NEXT: movswq %di, %rax
+; CHECK-NEXT: shrq %rax
+; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: retq
+;
%1 = shl i64 %a, 48
%2 = ashr exact i64 %1, 49
%3 = trunc i64 %2 to i32
@@ -24,6 +33,10 @@ define i32 @shl56sar55(i64 %a) #0 {
; CHECK-LABEL: shl56sar55:
; CHECK: # BB#0:
; CHECK-NEXT: movsbq %dil, %rax
+; CHECK-NEXT: addl %eax, %eax
+; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: retq
+;
%1 = shl i64 %a, 56
%2 = ashr exact i64 %1, 55
%3 = trunc i64 %2 to i32
@@ -34,6 +47,10 @@ define i32 @shl56sar57(i64 %a) #0 {
; CHECK-LABEL: shl56sar57:
; CHECK: # BB#0:
; CHECK-NEXT: movsbq %dil, %rax
+; CHECK-NEXT: shrq %rax
+; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<kill>
+; CHECK-NEXT: retq
+;
%1 = shl i64 %a, 56
%2 = ashr exact i64 %1, 57
%3 = trunc i64 %2 to i32
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