diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrControl.td | 3 |
2 files changed, 1 insertions, 12 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 9526f27ddfc..de510291cd8 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -27551,16 +27551,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, switch (MI.getOpcode()) { default: llvm_unreachable("Unexpected instr type to insert"); - case X86::TAILJMPd64: - case X86::TAILJMPr64: - case X86::TAILJMPm64: - case X86::TAILJMPr64_REX: - case X86::TAILJMPm64_REX: - llvm_unreachable("TAILJMP64 would not be touched here."); - case X86::TCRETURNdi64: - case X86::TCRETURNri64: - case X86::TCRETURNmi64: - return BB; case X86::TLS_addr32: case X86::TLS_addr64: case X86::TLS_base_addr32: diff --git a/llvm/lib/Target/X86/X86InstrControl.td b/llvm/lib/Target/X86/X86InstrControl.td index 5581fd462a1..300e2ff9e34 100644 --- a/llvm/lib/Target/X86/X86InstrControl.td +++ b/llvm/lib/Target/X86/X86InstrControl.td @@ -309,8 +309,7 @@ let isCall = 1, Uses = [RSP, SSP], SchedRW = [WriteJump] in { } let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, - isCodeGenOnly = 1, Uses = [RSP, SSP], usesCustomInserter = 1, - SchedRW = [WriteJump] in { + isCodeGenOnly = 1, Uses = [RSP, SSP], SchedRW = [WriteJump] in { def TCRETURNdi64 : PseudoI<(outs), (ins i64i32imm_pcrel:$dst, i32imm:$offset), []>; |
