diff options
32 files changed, 113 insertions, 108 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index 0d6fab50424..5509ec00886 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -316,7 +316,7 @@ StringRef sys::detail::getHostCPUNameForS390x(StringRef ProcCpuinfoContent) { unsigned int Id; if (!Lines[I].drop_front(Pos).getAsInteger(10, Id)) { if (Id >= 8561 && HaveVectorSupport) - return "arch13"; + return "z15"; if (Id >= 3906 && HaveVectorSupport) return "z14"; if (Id >= 2964 && HaveVectorSupport) diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp index aaf7c580ea5..6a0f59ef56a 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -258,7 +258,7 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM, setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote); setOperationAction(ISD::CTLZ, MVT::i64, Legal); - // On arch13 we have native support for a 64-bit CTPOP. + // On z15 we have native support for a 64-bit CTPOP. if (Subtarget.hasMiscellaneousExtensions3()) { setOperationAction(ISD::CTPOP, MVT::i32, Promote); setOperationAction(ISD::CTPOP, MVT::i64, Legal); diff --git a/llvm/lib/Target/SystemZ/SystemZProcessors.td b/llvm/lib/Target/SystemZ/SystemZProcessors.td index b27c25beb58..af33a030055 100644 --- a/llvm/lib/Target/SystemZ/SystemZProcessors.td +++ b/llvm/lib/Target/SystemZ/SystemZProcessors.td @@ -35,5 +35,6 @@ def : ProcessorModel<"z13", Z13Model, Arch11SupportedFeatures.List>; def : ProcessorModel<"arch12", Z14Model, Arch12SupportedFeatures.List>; def : ProcessorModel<"z14", Z14Model, Arch12SupportedFeatures.List>; -def : ProcessorModel<"arch13", Arch13Model, Arch13SupportedFeatures.List>; +def : ProcessorModel<"arch13", Z15Model, Arch13SupportedFeatures.List>; +def : ProcessorModel<"z15", Z15Model, Arch13SupportedFeatures.List>; diff --git a/llvm/lib/Target/SystemZ/SystemZSchedule.td b/llvm/lib/Target/SystemZ/SystemZSchedule.td index 98eca280224..119e3ee7c22 100644 --- a/llvm/lib/Target/SystemZ/SystemZSchedule.td +++ b/llvm/lib/Target/SystemZ/SystemZSchedule.td @@ -59,7 +59,7 @@ def VBU : SchedWrite; // Virtual branching unit def MCD : SchedWrite; // Millicode -include "SystemZScheduleArch13.td" +include "SystemZScheduleZ15.td" include "SystemZScheduleZ14.td" include "SystemZScheduleZ13.td" include "SystemZScheduleZEC12.td" diff --git a/llvm/lib/Target/SystemZ/SystemZScheduleArch13.td b/llvm/lib/Target/SystemZ/SystemZScheduleZ15.td index 9f82f24d0e8..56ceb88f35d 100644 --- a/llvm/lib/Target/SystemZ/SystemZScheduleArch13.td +++ b/llvm/lib/Target/SystemZ/SystemZScheduleZ15.td @@ -1,4 +1,4 @@ -//-- SystemZScheduleArch13.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// +//-- SystemZScheduleZ15.td - SystemZ Scheduling Definitions ----*- tblgen -*-=// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -6,14 +6,14 @@ // //===----------------------------------------------------------------------===// // -// This file defines the machine model for Arch13 to support instruction +// This file defines the machine model for Z15 to support instruction // scheduling and other instruction cost heuristics. // // Pseudos expanded right after isel do not need to be modelled here. // //===----------------------------------------------------------------------===// -def Arch13Model : SchedMachineModel { +def Z15Model : SchedMachineModel { let UnsupportedFeatures = Arch13UnsupportedFeatures.List; @@ -27,7 +27,7 @@ def Arch13Model : SchedMachineModel { let MispredictPenalty = 20; } -let SchedModel = Arch13Model in { +let SchedModel = Z15Model in { // These definitions need the SchedModel value. They could be put in a // subtarget common include file, but it seems the include system in Tablegen // currently (2016) rejects multiple includes of same file. @@ -73,43 +73,43 @@ let NumMicroOps = 0 in { } // Execution units. -def Arch13_FXaUnit : ProcResource<2>; -def Arch13_FXbUnit : ProcResource<2>; -def Arch13_LSUnit : ProcResource<2>; -def Arch13_VecUnit : ProcResource<2>; -def Arch13_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } -def Arch13_VBUnit : ProcResource<2>; -def Arch13_MCD : ProcResource<1>; +def Z15_FXaUnit : ProcResource<2>; +def Z15_FXbUnit : ProcResource<2>; +def Z15_LSUnit : ProcResource<2>; +def Z15_VecUnit : ProcResource<2>; +def Z15_VecFPdUnit : ProcResource<2> { let BufferSize = 1; /* blocking */ } +def Z15_VBUnit : ProcResource<2>; +def Z15_MCD : ProcResource<1>; // Subtarget specific definitions of scheduling resources. let NumMicroOps = 0 in { - def : WriteRes<FXa, [Arch13_FXaUnit]>; - def : WriteRes<FXb, [Arch13_FXbUnit]>; - def : WriteRes<LSU, [Arch13_LSUnit]>; - def : WriteRes<VecBF, [Arch13_VecUnit]>; - def : WriteRes<VecDF, [Arch13_VecUnit]>; - def : WriteRes<VecDFX, [Arch13_VecUnit]>; - def : WriteRes<VecMul, [Arch13_VecUnit]>; - def : WriteRes<VecStr, [Arch13_VecUnit]>; - def : WriteRes<VecXsPm, [Arch13_VecUnit]>; + def : WriteRes<FXa, [Z15_FXaUnit]>; + def : WriteRes<FXb, [Z15_FXbUnit]>; + def : WriteRes<LSU, [Z15_LSUnit]>; + def : WriteRes<VecBF, [Z15_VecUnit]>; + def : WriteRes<VecDF, [Z15_VecUnit]>; + def : WriteRes<VecDFX, [Z15_VecUnit]>; + def : WriteRes<VecMul, [Z15_VecUnit]>; + def : WriteRes<VecStr, [Z15_VecUnit]>; + def : WriteRes<VecXsPm, [Z15_VecUnit]>; foreach Num = 2-5 in { let ResourceCycles = [Num] in { - def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Arch13_FXaUnit]>; - def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Arch13_FXbUnit]>; - def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Arch13_LSUnit]>; - def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Arch13_VecUnit]>; - def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Arch13_VecUnit]>; - def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Arch13_VecUnit]>; - def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Arch13_VecUnit]>; - def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Arch13_VecUnit]>; - def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Arch13_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("FXa"#Num), [Z15_FXaUnit]>; + def : WriteRes<!cast<SchedWrite>("FXb"#Num), [Z15_FXbUnit]>; + def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z15_LSUnit]>; + def : WriteRes<!cast<SchedWrite>("VecBF"#Num), [Z15_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("VecDF"#Num), [Z15_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("VecDFX"#Num), [Z15_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("VecMul"#Num), [Z15_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("VecStr"#Num), [Z15_VecUnit]>; + def : WriteRes<!cast<SchedWrite>("VecXsPm"#Num), [Z15_VecUnit]>; }} - def : WriteRes<VecFPd, [Arch13_VecFPdUnit]> { let ResourceCycles = [30]; } + def : WriteRes<VecFPd, [Z15_VecFPdUnit]> { let ResourceCycles = [30]; } - def : WriteRes<VBU, [Arch13_VBUnit]>; // Virtual Branching Unit + def : WriteRes<VBU, [Z15_VBUnit]>; // Virtual Branching Unit } -def : WriteRes<MCD, [Arch13_MCD]> { let NumMicroOps = 3; +def : WriteRes<MCD, [Z15_MCD]> { let NumMicroOps = 3; let BeginGroup = 1; let EndGroup = 1; } diff --git a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp index 145cf87ef9f..8d45e67d73c 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp @@ -707,7 +707,7 @@ int SystemZTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, // TODO: Fix base implementation which could simplify things a bit here // (seems to miss on differentiating on scalar/vector types). - // Only 64 bit vector conversions are natively supported before arch13. + // Only 64 bit vector conversions are natively supported before z15. if (DstScalarBits == 64 || ST->hasVectorEnhancements2()) { if (SrcScalarBits == DstScalarBits) return NumDstVectors; diff --git a/llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll b/llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll index 9a43ca31838..0c95b537340 100644 --- a/llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll +++ b/llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll @@ -1,7 +1,7 @@ ; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z13 \ ; RUN: | FileCheck %s -check-prefixes=CHECK,Z13 -; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=arch13 \ -; RUN: | FileCheck %s -check-prefixes=CHECK,AR13 +; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z15 \ +; RUN: | FileCheck %s -check-prefixes=CHECK,Z15 ; ; Note: The scalarized vector instructions costs are not including any ; extracts, due to the undef operands. @@ -118,7 +118,7 @@ define void @fptosi() { ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v19 = fptosi <2 x double> undef to <2 x i8> ; CHECK: Cost Model: Found an estimated cost of 5 for instruction: %v20 = fptosi <2 x float> undef to <2 x i64> ; Z13: Cost Model: Found an estimated cost of 12 for instruction: %v21 = fptosi <2 x float> undef to <2 x i32> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v21 = fptosi <2 x float> undef to <2 x i32> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v21 = fptosi <2 x float> undef to <2 x i32> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v22 = fptosi <2 x float> undef to <2 x i16> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v23 = fptosi <2 x float> undef to <2 x i8> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v24 = fptosi <4 x fp128> undef to <4 x i64> @@ -131,7 +131,7 @@ define void @fptosi() { ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v31 = fptosi <4 x double> undef to <4 x i8> ; CHECK: Cost Model: Found an estimated cost of 10 for instruction: %v32 = fptosi <4 x float> undef to <4 x i64> ; Z13: Cost Model: Found an estimated cost of 12 for instruction: %v33 = fptosi <4 x float> undef to <4 x i32> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v33 = fptosi <4 x float> undef to <4 x i32> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v33 = fptosi <4 x float> undef to <4 x i32> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v34 = fptosi <4 x float> undef to <4 x i16> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v35 = fptosi <4 x float> undef to <4 x i8> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v36 = fptosi <8 x fp128> undef to <8 x i64> @@ -144,7 +144,7 @@ define void @fptosi() { ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v43 = fptosi <8 x double> undef to <8 x i8> ; CHECK: Cost Model: Found an estimated cost of 20 for instruction: %v44 = fptosi <8 x float> undef to <8 x i64> ; Z13: Cost Model: Found an estimated cost of 24 for instruction: %v45 = fptosi <8 x float> undef to <8 x i32> -; AR13: Cost Model: Found an estimated cost of 2 for instruction: %v45 = fptosi <8 x float> undef to <8 x i32> +; Z15: Cost Model: Found an estimated cost of 2 for instruction: %v45 = fptosi <8 x float> undef to <8 x i32> ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v46 = fptosi <8 x float> undef to <8 x i16> ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v47 = fptosi <8 x float> undef to <8 x i8> ; CHECK: Cost Model: Found an estimated cost of 8 for instruction: %v48 = fptosi <16 x double> undef to <16 x i64> @@ -153,7 +153,7 @@ define void @fptosi() { ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v51 = fptosi <16 x double> undef to <16 x i8> ; CHECK: Cost Model: Found an estimated cost of 40 for instruction: %v52 = fptosi <16 x float> undef to <16 x i64> ; Z13: Cost Model: Found an estimated cost of 48 for instruction: %v53 = fptosi <16 x float> undef to <16 x i32> -; AR13: Cost Model: Found an estimated cost of 4 for instruction: %v53 = fptosi <16 x float> undef to <16 x i32> +; Z15: Cost Model: Found an estimated cost of 4 for instruction: %v53 = fptosi <16 x float> undef to <16 x i32> ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v54 = fptosi <16 x float> undef to <16 x i16> ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v55 = fptosi <16 x float> undef to <16 x i8> @@ -241,7 +241,7 @@ define void @fptoui() { ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v19 = fptoui <2 x double> undef to <2 x i8> ; CHECK: Cost Model: Found an estimated cost of 5 for instruction: %v20 = fptoui <2 x float> undef to <2 x i64> ; Z13: Cost Model: Found an estimated cost of 12 for instruction: %v21 = fptoui <2 x float> undef to <2 x i32> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v21 = fptoui <2 x float> undef to <2 x i32> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v21 = fptoui <2 x float> undef to <2 x i32> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v22 = fptoui <2 x float> undef to <2 x i16> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v23 = fptoui <2 x float> undef to <2 x i8> ; CHECK: Cost Model: Found an estimated cost of 6 for instruction: %v24 = fptoui <4 x fp128> undef to <4 x i64> @@ -254,7 +254,7 @@ define void @fptoui() { ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v31 = fptoui <4 x double> undef to <4 x i8> ; CHECK: Cost Model: Found an estimated cost of 10 for instruction: %v32 = fptoui <4 x float> undef to <4 x i64> ; Z13: Cost Model: Found an estimated cost of 12 for instruction: %v33 = fptoui <4 x float> undef to <4 x i32> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v33 = fptoui <4 x float> undef to <4 x i32> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v33 = fptoui <4 x float> undef to <4 x i32> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v34 = fptoui <4 x float> undef to <4 x i16> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v35 = fptoui <4 x float> undef to <4 x i8> ; CHECK: Cost Model: Found an estimated cost of 12 for instruction: %v36 = fptoui <8 x fp128> undef to <8 x i64> @@ -267,7 +267,7 @@ define void @fptoui() { ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v43 = fptoui <8 x double> undef to <8 x i8> ; CHECK: Cost Model: Found an estimated cost of 20 for instruction: %v44 = fptoui <8 x float> undef to <8 x i64> ; Z13: Cost Model: Found an estimated cost of 24 for instruction: %v45 = fptoui <8 x float> undef to <8 x i32> -; AR13: Cost Model: Found an estimated cost of 2 for instruction: %v45 = fptoui <8 x float> undef to <8 x i32> +; Z15: Cost Model: Found an estimated cost of 2 for instruction: %v45 = fptoui <8 x float> undef to <8 x i32> ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v46 = fptoui <8 x float> undef to <8 x i16> ; CHECK: Cost Model: Found an estimated cost of 24 for instruction: %v47 = fptoui <8 x float> undef to <8 x i8> ; CHECK: Cost Model: Found an estimated cost of 8 for instruction: %v48 = fptoui <16 x double> undef to <16 x i64> @@ -276,7 +276,7 @@ define void @fptoui() { ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v51 = fptoui <16 x double> undef to <16 x i8> ; CHECK: Cost Model: Found an estimated cost of 40 for instruction: %v52 = fptoui <16 x float> undef to <16 x i64> ; Z13: Cost Model: Found an estimated cost of 48 for instruction: %v53 = fptoui <16 x float> undef to <16 x i32> -; AR13: Cost Model: Found an estimated cost of 4 for instruction: %v53 = fptoui <16 x float> undef to <16 x i32> +; Z15: Cost Model: Found an estimated cost of 4 for instruction: %v53 = fptoui <16 x float> undef to <16 x i32> ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v54 = fptoui <16 x float> undef to <16 x i16> ; CHECK: Cost Model: Found an estimated cost of 48 for instruction: %v55 = fptoui <16 x float> undef to <16 x i8> @@ -391,7 +391,7 @@ define void @sitofp() { ; CHECK: Cost Model: Found an estimated cost of 5 for instruction: %v15 = sitofp <2 x i32> undef to <2 x fp128> ; CHECK: Cost Model: Found an estimated cost of 7 for instruction: %v16 = sitofp <2 x i32> undef to <2 x double> ; Z13: Cost Model: Found an estimated cost of 14 for instruction: %v17 = sitofp <2 x i32> undef to <2 x float> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v17 = sitofp <2 x i32> undef to <2 x float> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v17 = sitofp <2 x i32> undef to <2 x float> ; CHECK: Cost Model: Found an estimated cost of 7 for instruction: %v18 = sitofp <2 x i16> undef to <2 x fp128> ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v19 = sitofp <2 x i16> undef to <2 x double> ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v20 = sitofp <2 x i16> undef to <2 x float> @@ -404,7 +404,7 @@ define void @sitofp() { ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v27 = sitofp <4 x i32> undef to <4 x fp128> ; CHECK: Cost Model: Found an estimated cost of 13 for instruction: %v28 = sitofp <4 x i32> undef to <4 x double> ; Z13: Cost Model: Found an estimated cost of 13 for instruction: %v29 = sitofp <4 x i32> undef to <4 x float> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v29 = sitofp <4 x i32> undef to <4 x float> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v29 = sitofp <4 x i32> undef to <4 x float> ; CHECK: Cost Model: Found an estimated cost of 13 for instruction: %v30 = sitofp <4 x i16> undef to <4 x fp128> ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v31 = sitofp <4 x i16> undef to <4 x double> ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v32 = sitofp <4 x i16> undef to <4 x float> @@ -417,7 +417,7 @@ define void @sitofp() { ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v39 = sitofp <8 x i32> undef to <8 x fp128> ; CHECK: Cost Model: Found an estimated cost of 25 for instruction: %v40 = sitofp <8 x i32> undef to <8 x double> ; Z13: Cost Model: Found an estimated cost of 25 for instruction: %v41 = sitofp <8 x i32> undef to <8 x float> -; AR13: Cost Model: Found an estimated cost of 2 for instruction: %v41 = sitofp <8 x i32> undef to <8 x float> +; Z15: Cost Model: Found an estimated cost of 2 for instruction: %v41 = sitofp <8 x i32> undef to <8 x float> ; CHECK: Cost Model: Found an estimated cost of 25 for instruction: %v42 = sitofp <8 x i16> undef to <8 x fp128> ; CHECK: Cost Model: Found an estimated cost of 33 for instruction: %v43 = sitofp <8 x i16> undef to <8 x double> ; CHECK: Cost Model: Found an estimated cost of 33 for instruction: %v44 = sitofp <8 x i16> undef to <8 x float> @@ -428,7 +428,7 @@ define void @sitofp() { ; CHECK: Cost Model: Found an estimated cost of 49 for instruction: %v49 = sitofp <16 x i64> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 49 for instruction: %v50 = sitofp <16 x i32> undef to <16 x double> ; Z13: Cost Model: Found an estimated cost of 49 for instruction: %v51 = sitofp <16 x i32> undef to <16 x float> -; AR13: Cost Model: Found an estimated cost of 4 for instruction: %v51 = sitofp <16 x i32> undef to <16 x float> +; Z15: Cost Model: Found an estimated cost of 4 for instruction: %v51 = sitofp <16 x i32> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v52 = sitofp <16 x i16> undef to <16 x double> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v53 = sitofp <16 x i16> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v54 = sitofp <16 x i8> undef to <16 x double> @@ -513,7 +513,7 @@ define void @uitofp() { ; CHECK: Cost Model: Found an estimated cost of 5 for instruction: %v15 = uitofp <2 x i32> undef to <2 x fp128> ; CHECK: Cost Model: Found an estimated cost of 7 for instruction: %v16 = uitofp <2 x i32> undef to <2 x double> ; Z13: Cost Model: Found an estimated cost of 14 for instruction: %v17 = uitofp <2 x i32> undef to <2 x float> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v17 = uitofp <2 x i32> undef to <2 x float> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v17 = uitofp <2 x i32> undef to <2 x float> ; CHECK: Cost Model: Found an estimated cost of 7 for instruction: %v18 = uitofp <2 x i16> undef to <2 x fp128> ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v19 = uitofp <2 x i16> undef to <2 x double> ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v20 = uitofp <2 x i16> undef to <2 x float> @@ -526,7 +526,7 @@ define void @uitofp() { ; CHECK: Cost Model: Found an estimated cost of 9 for instruction: %v27 = uitofp <4 x i32> undef to <4 x fp128> ; CHECK: Cost Model: Found an estimated cost of 13 for instruction: %v28 = uitofp <4 x i32> undef to <4 x double> ; Z13: Cost Model: Found an estimated cost of 13 for instruction: %v29 = uitofp <4 x i32> undef to <4 x float> -; AR13: Cost Model: Found an estimated cost of 1 for instruction: %v29 = uitofp <4 x i32> undef to <4 x float> +; Z15: Cost Model: Found an estimated cost of 1 for instruction: %v29 = uitofp <4 x i32> undef to <4 x float> ; CHECK: Cost Model: Found an estimated cost of 13 for instruction: %v30 = uitofp <4 x i16> undef to <4 x fp128> ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v31 = uitofp <4 x i16> undef to <4 x double> ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v32 = uitofp <4 x i16> undef to <4 x float> @@ -539,7 +539,7 @@ define void @uitofp() { ; CHECK: Cost Model: Found an estimated cost of 17 for instruction: %v39 = uitofp <8 x i32> undef to <8 x fp128> ; CHECK: Cost Model: Found an estimated cost of 25 for instruction: %v40 = uitofp <8 x i32> undef to <8 x double> ; Z13: Cost Model: Found an estimated cost of 25 for instruction: %v41 = uitofp <8 x i32> undef to <8 x float> -; AR13: Cost Model: Found an estimated cost of 2 for instruction: %v41 = uitofp <8 x i32> undef to <8 x float> +; Z15: Cost Model: Found an estimated cost of 2 for instruction: %v41 = uitofp <8 x i32> undef to <8 x float> ; CHECK: Cost Model: Found an estimated cost of 25 for instruction: %v42 = uitofp <8 x i16> undef to <8 x fp128> ; CHECK: Cost Model: Found an estimated cost of 33 for instruction: %v43 = uitofp <8 x i16> undef to <8 x double> ; CHECK: Cost Model: Found an estimated cost of 33 for instruction: %v44 = uitofp <8 x i16> undef to <8 x float> @@ -550,7 +550,7 @@ define void @uitofp() { ; CHECK: Cost Model: Found an estimated cost of 49 for instruction: %v49 = uitofp <16 x i64> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 49 for instruction: %v50 = uitofp <16 x i32> undef to <16 x double> ; Z13: Cost Model: Found an estimated cost of 49 for instruction: %v51 = uitofp <16 x i32> undef to <16 x float> -; AR13: Cost Model: Found an estimated cost of 4 for instruction: %v51 = uitofp <16 x i32> undef to <16 x float> +; Z15: Cost Model: Found an estimated cost of 4 for instruction: %v51 = uitofp <16 x i32> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v52 = uitofp <16 x i16> undef to <16 x double> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v53 = uitofp <16 x i16> undef to <16 x float> ; CHECK: Cost Model: Found an estimated cost of 65 for instruction: %v54 = uitofp <16 x i8> undef to <16 x double> diff --git a/llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll b/llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll index bbde627838b..4bc0508304f 100644 --- a/llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll +++ b/llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll @@ -1,7 +1,7 @@ ; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z13 \ ; RUN: | FileCheck %s -check-prefixes=CHECK,Z13 -; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=arch13 \ -; RUN: | FileCheck %s -check-prefixes=CHECK,AR13 +; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z15 \ +; RUN: | FileCheck %s -check-prefixes=CHECK,Z15 define void @bswap_i64(i64 %arg, <2 x i64> %arg2) { ; CHECK: Printing analysis 'Cost Model Analysis' for function 'bswap_i64': @@ -69,15 +69,15 @@ define void @bswap_i64_mem(i64* %src, i64 %arg, i64* %dst) { define void @bswap_v2i64_mem(<2 x i64>* %src, <2 x i64> %arg, <2 x i64>* %dst) { ; CHECK:Printing analysis 'Cost Model Analysis' for function 'bswap_v2i64_mem': ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %Ld1 = load <2 x i64>, <2 x i64>* %src -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <2 x i64>, <2 x i64>* %src +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <2 x i64>, <2 x i64>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp1 = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %Ld1) ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp2 = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %arg) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <2 x i64> %swp2, <2 x i64>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <2 x i64> %swp2, <2 x i64>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <2 x i64> %swp2, <2 x i64>* %dst ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %Ld2 = load <2 x i64>, <2 x i64>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp3 = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %Ld2) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <2 x i64> %swp3, <2 x i64>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <2 x i64> %swp3, <2 x i64>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <2 x i64> %swp3, <2 x i64>* %dst %Ld1 = load <2 x i64>, <2 x i64>* %src %swp1 = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %Ld1) @@ -117,15 +117,15 @@ define void @bswap_i32_mem(i32* %src, i32 %arg, i32* %dst) { define void @bswap_v4i32_mem(<4 x i32>* %src, <4 x i32> %arg, <4 x i32>* %dst) { ; CHECK: Printing analysis 'Cost Model Analysis' for function 'bswap_v4i32_mem': ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %Ld1 = load <4 x i32>, <4 x i32>* %src -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <4 x i32>, <4 x i32>* %src +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <4 x i32>, <4 x i32>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp1 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %Ld1) ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp2 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %arg) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <4 x i32> %swp2, <4 x i32>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <4 x i32> %swp2, <4 x i32>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <4 x i32> %swp2, <4 x i32>* %dst ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %Ld2 = load <4 x i32>, <4 x i32>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp3 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %Ld2) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <4 x i32> %swp3, <4 x i32>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <4 x i32> %swp3, <4 x i32>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <4 x i32> %swp3, <4 x i32>* %dst %Ld1 = load <4 x i32>, <4 x i32>* %src %swp1 = tail call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %Ld1) @@ -164,15 +164,15 @@ define void @bswap_i16_mem(i16* %src, i16 %arg, i16* %dst) { define void @bswap_v8i16_mem(<8 x i16>* %src, <8 x i16> %arg, <8 x i16>* %dst) { ; CHECK: Printing analysis 'Cost Model Analysis' for function 'bswap_v8i16_mem': ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %Ld1 = load <8 x i16>, <8 x i16>* %src -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <8 x i16>, <8 x i16>* %src +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %Ld1 = load <8 x i16>, <8 x i16>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp1 = tail call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %Ld1) ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp2 = tail call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %arg) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <8 x i16> %swp2, <8 x i16>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <8 x i16> %swp2, <8 x i16>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <8 x i16> %swp2, <8 x i16>* %dst ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %Ld2 = load <8 x i16>, <8 x i16>* %src ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %swp3 = tail call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %Ld2) ; Z13: Cost Model: Found an estimated cost of 1 for instruction: store <8 x i16> %swp3, <8 x i16>* %dst -; AR13: Cost Model: Found an estimated cost of 0 for instruction: store <8 x i16> %swp3, <8 x i16>* %dst +; Z15: Cost Model: Found an estimated cost of 0 for instruction: store <8 x i16> %swp3, <8 x i16>* %dst %Ld1 = load <8 x i16>, <8 x i16>* %src %swp1 = tail call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %Ld1) diff --git a/llvm/test/Analysis/CostModel/SystemZ/logic-miscext3.ll b/llvm/test/Analysis/CostModel/SystemZ/logic-miscext3.ll index 86706309e6d..f3b915d0a64 100644 --- a/llvm/test/Analysis/CostModel/SystemZ/logic-miscext3.ll +++ b/llvm/test/Analysis/CostModel/SystemZ/logic-miscext3.ll @@ -1,25 +1,25 @@ ; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z13 \ ; RUN: | FileCheck %s -check-prefixes=CHECK,Z13 -; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=arch13 \ -; RUN: | FileCheck %s -check-prefixes=CHECK,AR13 +; RUN: opt < %s -cost-model -analyze -mtriple=systemz-unknown -mcpu=z15 \ +; RUN: | FileCheck %s -check-prefixes=CHECK,Z15 define void @fun0(i32 %a) { ; CHECK-LABEL: Printing analysis 'Cost Model Analysis' for function 'fun0': ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c0 = xor i32 %l0, -1 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res0 = or i32 %a, %c0 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i32 %a, %c0 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i32 %a, %c0 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c1 = xor i32 %l1, -1 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res1 = and i32 %a, %c1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i32 %a, %c1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i32 %a, %c1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c2 = and i32 %l2, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res2 = xor i32 %c2, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i32 %c2, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i32 %c2, -1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c3 = or i32 %l3, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i32 %c3, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i32 %c3, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i32 %c3, -1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c4 = xor i32 %l4, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i32 %c4, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i32 %c4, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i32 %c4, -1 entry: %l0 = load i32, i32* undef @@ -54,19 +54,19 @@ define void @fun1(i64 %a) { ; CHECK-LABEL: Printing analysis 'Cost Model Analysis' for function 'fun1': ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c0 = xor i64 %l0, -1 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res0 = or i64 %a, %c0 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i64 %a, %c0 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res0 = or i64 %a, %c0 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c1 = xor i64 %l1, -1 ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res1 = and i64 %a, %c1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i64 %a, %c1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res1 = and i64 %a, %c1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c2 = and i64 %l2, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res2 = xor i64 %c2, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i64 %c2, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res2 = xor i64 %c2, -1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c3 = or i64 %l3, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res3 = xor i64 %c3, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i64 %c3, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res3 = xor i64 %c3, -1 ; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %c4 = xor i64 %l4, %a ; Z13: Cost Model: Found an estimated cost of 1 for instruction: %res4 = xor i64 %c4, -1 -; AR13: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i64 %c4, -1 +; Z15: Cost Model: Found an estimated cost of 0 for instruction: %res4 = xor i64 %c4, -1 entry: %l0 = load i64, i64* undef %c0 = xor i64 %l0, -1 diff --git a/llvm/test/CodeGen/SystemZ/cond-move-01.ll b/llvm/test/CodeGen/SystemZ/cond-move-01.ll index fad5012be10..c6b0cd5393a 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-01.ll +++ b/llvm/test/CodeGen/SystemZ/cond-move-01.ll @@ -7,7 +7,7 @@ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s ; ; And again in the presence of the select instructions. -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 -verify-machineinstrs | FileCheck %s ; Test LOCR. define i32 @f1(i32 %a, i32 %b, i32 %limit) { diff --git a/llvm/test/CodeGen/SystemZ/cond-move-02.ll b/llvm/test/CodeGen/SystemZ/cond-move-02.ll index c8ab5331216..362d7cc3865 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-02.ll +++ b/llvm/test/CodeGen/SystemZ/cond-move-02.ll @@ -4,7 +4,7 @@ ; ; Run the test again to make sure it still works the same even ; in the presence of the select instructions. -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 -verify-machineinstrs | FileCheck %s define i32 @f1(i32 %x) { diff --git a/llvm/test/CodeGen/SystemZ/cond-move-03.ll b/llvm/test/CodeGen/SystemZ/cond-move-03.ll index 0f4d080d6bc..f668f1ac407 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-03.ll +++ b/llvm/test/CodeGen/SystemZ/cond-move-03.ll @@ -6,7 +6,7 @@ ; ; Run the test again to make sure it still works the same even ; in the presence of the select instructions. -; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=arch13 \ +; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z15 \ ; RUN: -no-integrated-as | FileCheck %s define void @f1(i32 %limit) { diff --git a/llvm/test/CodeGen/SystemZ/cond-move-06.ll b/llvm/test/CodeGen/SystemZ/cond-move-06.ll index 3c133d91671..bcedb3ae8e8 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-06.ll +++ b/llvm/test/CodeGen/SystemZ/cond-move-06.ll @@ -1,6 +1,6 @@ ; Test SELR and SELGR. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 -verify-machineinstrs | FileCheck %s ; Test SELR. define i32 @f1(i32 %limit, i32 %a, i32 %b) { diff --git a/llvm/test/CodeGen/SystemZ/cond-move-07.ll b/llvm/test/CodeGen/SystemZ/cond-move-07.ll index 87123b53379..2bee8919b51 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-07.ll +++ b/llvm/test/CodeGen/SystemZ/cond-move-07.ll @@ -1,7 +1,7 @@ ; Test SELFHR. ; See comments in asm-18.ll about testing high-word operations. ; -; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=arch13 \ +; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z15 \ ; RUN: -no-integrated-as | FileCheck %s define void @f1(i32 %limit) { diff --git a/llvm/test/CodeGen/SystemZ/cond-move-08.mir b/llvm/test/CodeGen/SystemZ/cond-move-08.mir index 5808fc643bc..aed61103601 100644 --- a/llvm/test/CodeGen/SystemZ/cond-move-08.mir +++ b/llvm/test/CodeGen/SystemZ/cond-move-08.mir @@ -1,4 +1,4 @@ -# RUN: llc -mtriple=s390x-linux-gnu -mcpu=arch13 -start-before=greedy %s -o - \ +# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z15 -start-before=greedy %s -o - \ # RUN: | FileCheck %s # # Test that regalloc manages (via regalloc hints) to avoid a LOCRMux jump @@ -73,7 +73,7 @@ ; Function Attrs: nounwind declare void @llvm.stackprotector(i8*, i8**) #1 - attributes #0 = { "target-cpu"="arch13" } + attributes #0 = { "target-cpu"="z15" } attributes #1 = { nounwind } ... diff --git a/llvm/test/CodeGen/SystemZ/ctpop-02.ll b/llvm/test/CodeGen/SystemZ/ctpop-02.ll index 5b9d41f9af2..a2bddac8c5a 100644 --- a/llvm/test/CodeGen/SystemZ/ctpop-02.ll +++ b/llvm/test/CodeGen/SystemZ/ctpop-02.ll @@ -1,6 +1,6 @@ -; Test population-count instruction on arch13 +; Test population-count instruction on z15 ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i32 @llvm.ctpop.i32(i32 %a) declare i64 @llvm.ctpop.i64(i64 %a) diff --git a/llvm/test/CodeGen/SystemZ/not-01.ll b/llvm/test/CodeGen/SystemZ/not-01.ll index 3b9dbd1311f..be2a5a88d73 100644 --- a/llvm/test/CodeGen/SystemZ/not-01.ll +++ b/llvm/test/CodeGen/SystemZ/not-01.ll @@ -1,6 +1,6 @@ -; Combined logical operations involving complement on arch13 +; Combined logical operations involving complement on z15 ; -; RUN: llc -mcpu=arch13 < %s -mtriple=s390x-linux-gnu | FileCheck %s +; RUN: llc -mcpu=z15 < %s -mtriple=s390x-linux-gnu | FileCheck %s ; And-with-complement 32-bit. define i32 @f1(i32 %dummy, i32 %a, i32 %b) { diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-01.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-01.ll index 8132108953a..4d5e574033f 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-01.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-01.ll @@ -1,6 +1,6 @@ ; Test loads of byte-swapped vector elements. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>) declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-02.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-02.ll index ff7facc0910..b7e8a1c1711 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-02.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-02.ll @@ -1,6 +1,6 @@ ; Test stores of byte-swapped vector elements. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>) declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-03.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-03.ll index 9102c739b12..b812308fc6d 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-03.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-03.ll @@ -1,6 +1,6 @@ ; Test vector insertion of byte-swapped memory values. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-04.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-04.ll index 43787a48b2e..0ab521dbb9c 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-04.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-04.ll @@ -1,6 +1,6 @@ ; Test vector extraction of byte-swapped value to memory. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-05.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-05.ll index 038a3f4f4f5..4718aadbdd5 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-05.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-05.ll @@ -1,6 +1,6 @@ ; Test vector insertions of byte-swapped memory values into 0. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-06.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-06.ll index 0c78633ee7d..a67b5756c4d 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-06.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-06.ll @@ -1,6 +1,6 @@ ; Test insertions of byte-swapped memory values into a nonzero index of an undef. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-bswap-07.ll b/llvm/test/CodeGen/SystemZ/vec-bswap-07.ll index 0190184c1e2..d3f38a0a685 100644 --- a/llvm/test/CodeGen/SystemZ/vec-bswap-07.ll +++ b/llvm/test/CodeGen/SystemZ/vec-bswap-07.ll @@ -1,6 +1,6 @@ ; Test replications of a byte-swapped scalar memory value. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-conv-03.ll b/llvm/test/CodeGen/SystemZ/vec-conv-03.ll index 8398876821c..df1e3a4e0dc 100644 --- a/llvm/test/CodeGen/SystemZ/vec-conv-03.ll +++ b/llvm/test/CodeGen/SystemZ/vec-conv-03.ll @@ -1,6 +1,6 @@ -; Test conversions between integer and float elements on arch13. +; Test conversions between integer and float elements on z15. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s ; Test conversion of f32s to signed i32s. define <4 x i32> @f1(<4 x float> %floats) { diff --git a/llvm/test/CodeGen/SystemZ/vec-eswap-01.ll b/llvm/test/CodeGen/SystemZ/vec-eswap-01.ll index 89b65392440..0e93f609eac 100644 --- a/llvm/test/CodeGen/SystemZ/vec-eswap-01.ll +++ b/llvm/test/CodeGen/SystemZ/vec-eswap-01.ll @@ -1,6 +1,6 @@ ; Test loads of byte-swapped vector elements. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s ; Test v16i8 loads. define <16 x i8> @f1(<16 x i8> *%ptr) { diff --git a/llvm/test/CodeGen/SystemZ/vec-eswap-02.ll b/llvm/test/CodeGen/SystemZ/vec-eswap-02.ll index 1eab5a06ff2..07e07258204 100644 --- a/llvm/test/CodeGen/SystemZ/vec-eswap-02.ll +++ b/llvm/test/CodeGen/SystemZ/vec-eswap-02.ll @@ -1,6 +1,6 @@ ; Test stores of element-swapped vector elements. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s ; Test v16i8 stores. define void @f1(<16 x i8> %val, <16 x i8> *%ptr) { diff --git a/llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll b/llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll index d192ad89488..fa144cc93d3 100644 --- a/llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll +++ b/llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll @@ -1,6 +1,6 @@ -; Test vector intrinsics added with arch13. +; Test vector intrinsics added with z15. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s declare <16 x i8> @llvm.s390.vsld(<16 x i8>, <16 x i8>, i32) declare <16 x i8> @llvm.s390.vsrd(<16 x i8>, <16 x i8>, i32) diff --git a/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll b/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll index f42a2b41202..6b9bc80cbde 100644 --- a/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll +++ b/llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll @@ -1,6 +1,6 @@ -; Test strict conversions between integer and float elements on arch13. +; Test strict conversions between integer and float elements on z15. ; -; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=arch13 | FileCheck %s +; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s ; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist diff --git a/llvm/test/MC/Disassembler/SystemZ/insns-arch13.txt b/llvm/test/MC/Disassembler/SystemZ/insns-z15.txt index 3ed0435510e..1742a9208b6 100644 --- a/llvm/test/MC/Disassembler/SystemZ/insns-arch13.txt +++ b/llvm/test/MC/Disassembler/SystemZ/insns-z15.txt @@ -1,5 +1,5 @@ -# Test arch13 instructions that don't have PC-relative operands. -# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu -mcpu=arch13 \ +# Test z15 instructions that don't have PC-relative operands. +# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu -mcpu=z15 \ # RUN: | FileCheck %s # CHECK: dfltcc %r2, %r2, %r2 diff --git a/llvm/test/MC/SystemZ/insn-bad-arch13.s b/llvm/test/MC/SystemZ/insn-bad-z15.s index ad84e55b69f..484dfd342da 100644 --- a/llvm/test/MC/SystemZ/insn-bad-arch13.s +++ b/llvm/test/MC/SystemZ/insn-bad-z15.s @@ -1,4 +1,6 @@ -# For arch13 only. +# For z15 only. +# RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=z15 < %s 2> %t +# RUN: FileCheck < %t %s # RUN: not llvm-mc -triple s390x-linux-gnu -mcpu=arch13 < %s 2> %t # RUN: FileCheck < %t %s diff --git a/llvm/test/MC/SystemZ/insn-good-arch13.s b/llvm/test/MC/SystemZ/insn-good-z15.s index 0bbb8a54638..1eb3b743cc6 100644 --- a/llvm/test/MC/SystemZ/insn-good-arch13.s +++ b/llvm/test/MC/SystemZ/insn-good-z15.s @@ -1,4 +1,6 @@ -# For arch13 and above. +# For z15 and above. +# RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z15 -show-encoding %s \ +# RUN: | FileCheck %s # RUN: llvm-mc -triple s390x-linux-gnu -mcpu=arch13 -show-encoding %s \ # RUN: | FileCheck %s |
