diff options
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/thread-pointer.ll | 12 |
2 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 1f5ef2fc8d8..9812a979318 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -2166,6 +2166,10 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_xori_b: return DAG.getNode(ISD::XOR, DL, Op->getValueType(0), Op->getOperand(1), lowerMSASplatImm(Op, 2, DAG)); + case Intrinsic::thread_pointer: { + EVT PtrVT = getPointerTy(DAG.getDataLayout()); + return DAG.getNode(MipsISD::ThreadPointer, DL, PtrVT); + } } } diff --git a/llvm/test/CodeGen/Mips/thread-pointer.ll b/llvm/test/CodeGen/Mips/thread-pointer.ll new file mode 100644 index 00000000000..60bee3d0303 --- /dev/null +++ b/llvm/test/CodeGen/Mips/thread-pointer.ll @@ -0,0 +1,12 @@ +; RUN: llc -march=mips < %s | FileCheck %s +; RUN: llc -march=mips64 < %s | FileCheck %s +; RUN: llc -march=mipsel < %s | FileCheck %s +; RUN: llc -march=mips64el < %s | FileCheck %s + +declare i8* @llvm.thread.pointer() nounwind readnone + +define i8* @thread_pointer() { +; CHECK: rdhwr $3, $29 + %1 = tail call i8* @llvm.thread.pointer() + ret i8* %1 +} |
