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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 2f760f65690..0e2b7c183c2 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -293,7 +293,10 @@ unsigned FunctionLoweringInfo::CreateRegForValue(const Value *V) {
NumElts >>= 1;
NumVectorRegs <<= 1;
}
- VT = getVectorType(EltTy, NumElts);
+ if (NumElts == 1)
+ VT = EltTy;
+ else
+ VT = getVectorType(EltTy, NumElts);
}
// The common case is that we will only create one register for this
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