summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--llvm/lib/Target/AArch64/AArch64FrameLowering.cpp4
-rw-r--r--llvm/test/CodeGen/AArch64/extra-callee-save.mir28
2 files changed, 30 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index 8c6e5cbd5c1..b5ec5a2fa54 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -2113,7 +2113,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
SavedRegs.set(AArch64::LR);
}
- LLVM_DEBUG(dbgs() << "*** determineCalleeSaves\nUsed CSRs:";
+ LLVM_DEBUG(dbgs() << "*** determineCalleeSaves\nSaved CSRs:";
for (unsigned Reg
: SavedRegs.set_bits()) dbgs()
<< ' ' << printReg(Reg, RegInfo);
@@ -2145,7 +2145,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
// store the pair.
if (produceCompactUnwindFrame(MF))
SavedRegs.set(UnspilledCSGPRPaired);
- ExtraCSSpill = UnspilledCSGPRPaired;
+ ExtraCSSpill = UnspilledCSGPR;
}
// If we didn't find an extra callee-saved register to spill, create
diff --git a/llvm/test/CodeGen/AArch64/extra-callee-save.mir b/llvm/test/CodeGen/AArch64/extra-callee-save.mir
new file mode 100644
index 00000000000..f03dec05938
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/extra-callee-save.mir
@@ -0,0 +1,28 @@
+#RUN: llc -mtriple=aarch64-- -run-pass prologepilog %s -o - | FileCheck %s
+# Check that we spill a scratch register, but not also an additional
+# emergency spill slot.
+---
+name: big_stack
+# CHECK-LABEL: name: big_stack
+# CHECK: frame-setup STPXi killed $x20, killed $x19
+# CHECK: $sp = frame-setup SUBXri $sp, 8, 12
+# CHECK-NOT: frame-setup SUBXri $sp, 16, 0
+tracksRegLiveness: true
+stack:
+ - { id: 0, name: '', size: 32761, alignment: 8 }
+body: |
+ bb.0:
+ $x19 = IMPLICIT_DEF
+ ; $x20 can be used as scratch register.
+ $x21 = IMPLICIT_DEF
+ $x22 = IMPLICIT_DEF
+ $x23 = IMPLICIT_DEF
+ $x24 = IMPLICIT_DEF
+ $x25 = IMPLICIT_DEF
+ $x26 = IMPLICIT_DEF
+ $x27 = IMPLICIT_DEF
+ $x28 = IMPLICIT_DEF
+ $lr = IMPLICIT_DEF
+ $fp = IMPLICIT_DEF
+ RET_ReallyLR
+...
OpenPOWER on IntegriCloud