diff options
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp | 12 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/narrow-switch.ll | 57 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/pr21651.ll | 6 |
3 files changed, 28 insertions, 47 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp index c25199db5c9..c0fb365cb88 100644 --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -2185,17 +2185,15 @@ Instruction *InstCombiner::visitSwitchInst(SwitchInst &SI) { unsigned NewWidth = BitWidth - std::max(LeadingKnownZeros, LeadingKnownOnes); - // Truncate the condition operand if the new type is equal to or larger than - // the largest legal integer type. We need to be conservative here since - // x86 generates redundant zero-extension instructions if the operand is - // truncated to i8 or i16. + // Shrink the condition operand if the new type is smaller than the old type. + // This may produce a non-standard type for the switch, but that's ok because + // the backend should extend back to a legal type for the target. bool TruncCond = false; - if (NewWidth > 0 && BitWidth > NewWidth && - NewWidth >= DL.getLargestLegalIntTypeSizeInBits()) { + if (NewWidth > 0 && NewWidth < BitWidth) { TruncCond = true; IntegerType *Ty = IntegerType::get(SI.getContext(), NewWidth); Builder->SetInsertPoint(&SI); - Value *NewCond = Builder->CreateTrunc(SI.getCondition(), Ty, "trunc"); + Value *NewCond = Builder->CreateTrunc(Cond, Ty, "trunc"); SI.setCondition(NewCond); for (auto &C : SI.cases()) diff --git a/llvm/test/Transforms/InstCombine/narrow-switch.ll b/llvm/test/Transforms/InstCombine/narrow-switch.ll index 085ee4eac08..7cbc5e9f60b 100644 --- a/llvm/test/Transforms/InstCombine/narrow-switch.ll +++ b/llvm/test/Transforms/InstCombine/narrow-switch.ll @@ -3,20 +3,16 @@ ; RUN: opt < %s -instcombine -S -default-data-layout=n32 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK32 ; RUN: opt < %s -instcombine -S -default-data-layout=n32:64 | FileCheck %s --check-prefix=ALL --check-prefix=CHECK64 +; In all cases, the data-layout is irrelevant. We should shrink as much as possible in InstCombine +; and allow the backend to expand as much as needed to ensure optimal codegen for any target. + define i32 @positive1(i64 %a) { -; CHECK32-LABEL: @positive1( -; CHECK32: switch i32 -; CHECK32-NEXT: i32 10, label %return -; CHECK32-NEXT: i32 100, label %sw.bb1 -; CHECK32-NEXT: i32 1001, label %sw.bb2 -; CHECK32-NEXT: ] -; -; CHECK64-LABEL: @positive1( -; CHECK64: switch i64 -; CHECK64-NEXT: i64 10, label %return -; CHECK64-NEXT: i64 100, label %sw.bb1 -; CHECK64-NEXT: i64 1001, label %sw.bb2 -; CHECK64-NEXT: ] +; ALL-LABEL: @positive1( +; ALL: switch i32 +; ALL-NEXT: i32 10, label %return +; ALL-NEXT: i32 100, label %sw.bb1 +; ALL-NEXT: i32 1001, label %sw.bb2 +; ALL-NEXT: ] ; entry: %and = and i64 %a, 4294967295 @@ -41,19 +37,12 @@ return: } define i32 @negative1(i64 %a) { -; CHECK32-LABEL: @negative1( -; CHECK32: switch i32 -; CHECK32-NEXT: i32 -10, label %return -; CHECK32-NEXT: i32 -100, label %sw.bb1 -; CHECK32-NEXT: i32 -1001, label %sw.bb2 -; CHECK32-NEXT: ] -; -; CHECK64-LABEL: @negative1( -; CHECK64: switch i64 -; CHECK64-NEXT: i64 -10, label %return -; CHECK64-NEXT: i64 -100, label %sw.bb1 -; CHECK64-NEXT: i64 -1001, label %sw.bb2 -; CHECK64-NEXT: ] +; ALL-LABEL: @negative1( +; ALL: switch i32 +; ALL-NEXT: i32 -10, label %return +; ALL-NEXT: i32 -100, label %sw.bb1 +; ALL-NEXT: i32 -1001, label %sw.bb2 +; ALL-NEXT: ] ; entry: %or = or i64 %a, -4294967296 @@ -115,17 +104,11 @@ return: ; to the recomputed condition. define void @trunc64to59(i64 %a) { -; CHECK32-LABEL: @trunc64to59( -; CHECK32: switch i59 -; CHECK32-NEXT: i59 0, label %sw.bb1 -; CHECK32-NEXT: i59 18717182647723699, label %sw.bb2 -; CHECK32-NEXT: ] -; -; CHECK64-LABEL: @trunc64to59( -; CHECK64: switch i64 -; CHECK64-NEXT: i64 0, label %sw.bb1 -; CHECK64-NEXT: i64 18717182647723699, label %sw.bb2 -; CHECK64-NEXT: ] +; ALL-LABEL: @trunc64to59( +; ALL: switch i59 +; ALL-NEXT: i59 0, label %sw.bb1 +; ALL-NEXT: i59 18717182647723699, label %sw.bb2 +; ALL-NEXT: ] ; entry: %tmp0 = and i64 %a, 15 diff --git a/llvm/test/Transforms/InstCombine/pr21651.ll b/llvm/test/Transforms/InstCombine/pr21651.ll index 932d8e0a3ed..bc8fe617726 100644 --- a/llvm/test/Transforms/InstCombine/pr21651.ll +++ b/llvm/test/Transforms/InstCombine/pr21651.ll @@ -6,9 +6,9 @@ target datalayout = "n8:16:32:64" define void @PR21651() { ; CHECK-LABEL: @PR21651( -; CHECK-NEXT: switch i2 0, label %out [ -; CHECK-NEXT: i2 0, label %out -; CHECK-NEXT: i2 1, label %out +; CHECK-NEXT: switch i1 false, label %out [ +; CHECK-NEXT: i1 false, label %out +; CHECK-NEXT: i1 true, label %out ; CHECK-NEXT: ] ; CHECK: out: ; CHECK-NEXT: ret void |
