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-rw-r--r--llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h9
-rw-r--r--llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp4
-rw-r--r--llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp4
-rw-r--r--llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp2
4 files changed, 16 insertions, 3 deletions
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index 41061fb6dbd..df52127087a 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -183,6 +183,15 @@ public:
/// \return The newly created instruction.
MachineInstr *buildBr(MachineBasicBlock &BB);
+ /// Build and insert \p Res<def> = COPY Op
+ ///
+ /// Register-to-register COPY sets \p Res to \p Op.
+ ///
+ /// \pre setBasicBlock or setMI must have been called.
+ ///
+ /// \return The newly created instruction.
+ MachineInstr *buildCopy(unsigned Res, unsigned Op);
+
/// Build and insert `Res0<def>, ... = G_EXTRACT Ty Src, Idx0, ...`.
///
/// If \p Ty has size N bits, G_EXTRACT sets \p Res[0] to bits `[Idxs[0],
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index c581439cc2b..9ce7fe4a2cc 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -102,8 +102,8 @@ bool IRTranslator::translateBr(const Instruction &Inst) {
bool IRTranslator::translateBitCast(const CastInst &CI) {
if (LLT{*CI.getDestTy()} == LLT{*CI.getSrcTy()}) {
- MIRBuilder.buildInstr(TargetOpcode::COPY, getOrCreateVReg(CI),
- getOrCreateVReg(*CI.getOperand(0)));
+ MIRBuilder.buildCopy(getOrCreateVReg(CI),
+ getOrCreateVReg(*CI.getOperand(0)));
return true;
}
return translateCast(TargetOpcode::G_BITCAST, CI);
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index fb9b296e8ac..a426776e177 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -90,6 +90,10 @@ MachineInstr *MachineIRBuilder::buildBr(MachineBasicBlock &Dest) {
return NewMI;
}
+MachineInstr *MachineIRBuilder::buildCopy(unsigned Res, unsigned Op) {
+ return buildInstr(TargetOpcode::COPY, Res, Op);
+}
+
MachineInstr *MachineIRBuilder::buildExtract(LLT Ty, ArrayRef<unsigned> Results,
unsigned Src,
ArrayRef<unsigned> Indexes) {
diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index e9e42b0102b..521bb795682 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -126,7 +126,7 @@ void RegBankSelect::repairReg(
"We are about to create several defs for Dst");
// Build the instruction used to repair, then clone it at the right places.
- MachineInstr *MI = MIRBuilder.buildInstr(TargetOpcode::COPY, Dst, Src);
+ MachineInstr *MI = MIRBuilder.buildCopy(Dst, Src);
MI->removeFromParent();
DEBUG(dbgs() << "Copy: " << PrintReg(Src) << " to: " << PrintReg(Dst)
<< '\n');
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