diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ca3e0896cf2..af88324a4c4 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30913,7 +30913,7 @@ static SDValue combineFneg(SDNode *N, SelectionDAG &DAG, } static SDValue lowerX86FPLogicOp(SDNode *N, SelectionDAG &DAG, - const X86Subtarget &Subtarget) { + const X86Subtarget &Subtarget) { EVT VT = N->getValueType(0); if (VT.is512BitVector() && !Subtarget.hasDQI()) { // VXORPS, VORPS, VANDPS, VANDNPS are supported only under DQ extention. |
