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-rw-r--r--llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h7
-rw-r--r--llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp9
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index cdd2c84f593..c990ebe49ac 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -144,7 +144,7 @@ public:
MachineInstrBuilder buildAdd(LLT Ty, unsigned Res, unsigned Op0,
unsigned Op1);
- /// Build and insert \p Res<def>, \p CarryOut = G_UADDE \p Ty \p Op0, \p Op1,
+ /// Build and insert \p Res<def>, \p CarryOut = G_UADDE \p Tys \p Op0, \p Op1,
/// \p CarryIn
///
/// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
@@ -154,8 +154,9 @@ public:
/// \pre setBasicBlock or setMI must have been called.
///
/// \return The newly created instruction.
- MachineInstrBuilder buildUAdde(LLT Ty, unsigned Res, unsigned CarryOut,
- unsigned Op0, unsigned Op1, unsigned CarryIn);
+ MachineInstrBuilder buildUAdde(ArrayRef<LLT> Tys, unsigned Res,
+ unsigned CarryOut, unsigned Op0, unsigned Op1,
+ unsigned CarryIn);
/// Build and insert \p Res<def> = G_ANYEXT \p { DstTy, SrcTy } \p Op0
///
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index 50896abbb0e..dfa252d0b62 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -141,11 +141,10 @@ MachineInstrBuilder MachineIRBuilder::buildStore(LLT VTy, LLT PTy,
.addMemOperand(&MMO);
}
-MachineInstrBuilder MachineIRBuilder::buildUAdde(LLT Ty, unsigned Res,
- unsigned CarryOut,
- unsigned Op0, unsigned Op1,
- unsigned CarryIn) {
- return buildInstr(TargetOpcode::G_UADDE, Ty)
+MachineInstrBuilder
+MachineIRBuilder::buildUAdde(ArrayRef<LLT> Tys, unsigned Res, unsigned CarryOut,
+ unsigned Op0, unsigned Op1, unsigned CarryIn) {
+ return buildInstr(TargetOpcode::G_UADDE, Tys)
.addDef(Res)
.addDef(CarryOut)
.addUse(Op0)
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