diff options
| -rw-r--r-- | llvm/lib/Target/Mips/Mips.td | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Mips/cpus.ll | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td index a0569ed1b6a..b8a69815cc1 100644 --- a/llvm/lib/Target/Mips/Mips.td +++ b/llvm/lib/Target/Mips/Mips.td @@ -232,6 +232,7 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl", class Proc<string Name, list<SubtargetFeature> Features> : ProcessorModel<Name, MipsGenericModel, Features>; +def : Proc<"generic", [FeatureMips32]>; def : Proc<"mips1", [FeatureMips1]>; def : Proc<"mips2", [FeatureMips2]>; def : Proc<"mips32", [FeatureMips32]>; diff --git a/llvm/test/CodeGen/Mips/cpus.ll b/llvm/test/CodeGen/Mips/cpus.ll index b8844c47990..d9377044dca 100644 --- a/llvm/test/CodeGen/Mips/cpus.ll +++ b/llvm/test/CodeGen/Mips/cpus.ll @@ -1,5 +1,9 @@ ; Check that the CPU names work. +; RUN: llc -mtriple=mips -mcpu=generic -filetype=obj < %s \ +; RUN: | llvm-readelf -A | FileCheck %s --check-prefix=GENERIC +; GENERIC: ISA: MIPS32 + ; RUN: llc -mtriple=mips -mcpu=mips2 -filetype=obj < %s \ ; RUN: | llvm-readelf -A | FileCheck %s --check-prefix=MIPS2 ; MIPS2: ISA: MIPS2 |
