diff options
729 files changed, 960 insertions, 964 deletions
diff --git a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll index cb90bf644d5..8a071086505 100644 --- a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll +++ b/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll @@ -4,7 +4,7 @@ ; it makes a ton of annoying overlapping live ranges. This code should not ; cause spills! ; -; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s ; CHECK-NOT: spilled diff --git a/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll b/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll index 5c40eeaa1ea..db2ad18d0ef 100644 --- a/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll +++ b/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i32 @test() { entry: diff --git a/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll b/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll index e0d4988abbf..16bbbce5eb7 100644 --- a/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll +++ b/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @X = global i1 true ; CHECK-NOT: .byte true diff --git a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll index bd3317a68b8..7fdb070081a 100644 --- a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll +++ b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s declare i8* @llvm.returnaddress(i32) diff --git a/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll b/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll index d7f7e262d89..aa68ade1dfe 100644 --- a/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll +++ b/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s target triple = "i686-unknown-unknown" diff --git a/llvm/test/CodeGen/X86/2004-02-22-Casts.ll b/llvm/test/CodeGen/X86/2004-02-22-Casts.ll index dabf7d3c15b..dafc1d59762 100644 --- a/llvm/test/CodeGen/X86/2004-02-22-Casts.ll +++ b/llvm/test/CodeGen/X86/2004-02-22-Casts.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i1 @test1(double %X) { %V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1] ret i1 %V diff --git a/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll b/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll index e22aa6a0939..aa5bf631b52 100644 --- a/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll +++ b/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s ; CHECK-NOT: {{j[lgbe]}} define i32 @max(i32 %A, i32 %B) nounwind { diff --git a/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll b/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll index f8ed016f99b..915dc4e4160 100644 --- a/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll +++ b/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define double @test(double %d) { %X = select i1 false, double %d, double %d ; <double> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll b/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll index 036aa6a77f4..88acc6ad9af 100644 --- a/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll +++ b/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i1 @T(double %X) { %V = fcmp oeq double %X, %X ; <i1> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll b/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll index db3af0139ce..2bd755d979d 100644 --- a/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll +++ b/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) { %E = icmp slt i32 %X, %Y ; <i1> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll index 7bb634d9713..1f9f2c6240d 100644 --- a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll @@ -3,7 +3,7 @@ ; is invalid code (there is no correct way to order the instruction). Check ; that we do not fold the load into the sub. -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @GLOBAL = external global i32 diff --git a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll index 1e3a0937d5b..16fea863b49 100644 --- a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll +++ b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @A = external global i32 ; <i32*> [#uses=1] @Y = global i32* getelementptr (i32, i32* @A, i32 -1) ; <i32**> [#uses=0] diff --git a/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll index 5266009c55a..47cd0da7a4d 100644 --- a/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll +++ b/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=generic +; RUN: llc < %s -mtriple=i686-- -mcpu=generic ; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes. define void @radfg_() { diff --git a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll index 6963b1d92f6..ece16192566 100644 --- a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll +++ b/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s ; CHECK: 7 asm-printer define i32 @g(i32 %a, i32 %b) nounwind { diff --git a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll index 3f67097ddc0..ddcc7e2a6d1 100644 --- a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll +++ b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -mcpu=yonah ; END. target datalayout = "e-p:32:32" diff --git a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll index 9f44bc348e3..c70cbd9c3e1 100644 --- a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin8 -relocation-model=static > %t +; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static > %t ; RUN: grep "movl _last" %t | count 1 ; RUN: grep "cmpl.*_last" %t | count 1 diff --git a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll index 583877e6658..6f2fadbe8ca 100644 --- a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll +++ b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | \ +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | \ ; RUN: not grep "Number of register spills" ; END. diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll index 3281c68e933..f5be3a3e2bf 100644 --- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll +++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -stats 2>&1 | \ +; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \ ; RUN: grep asm-printer | grep 13 define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(i8* %tmp435.i, i32* %tmp449.i.out) nounwind { diff --git a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll index b70d375bf51..6c100aa9266 100644 --- a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll +++ b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll @@ -1,7 +1,7 @@ ; Coalescing from R32 to a subset R32_. Once another register coalescer bug is ; fixed, the movb should go away as well. -; RUN: llc < %s -march=x86 -relocation-model=static | \ +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | \ ; RUN: grep movl @B = external global i32 ; <i32*> [#uses=2] diff --git a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll index cd46ecfef52..ffe1a9ce3e9 100644 --- a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | not grep "subl.*%esp" +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | not grep "subl.*%esp" @A = external global i16* ; <i16**> [#uses=1] @B = external global i32 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll index b1deb2c5f56..5008c122a14 100644 --- a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \ +; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \ ; RUN: grep "asm-printer" | grep 35 target datalayout = "e-p:32:32" diff --git a/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll b/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll index b36d61e0f31..7f022b6a607 100644 --- a/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll +++ b/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define <4 x float> @opRSQ(<4 x float> %a) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll index 3be77f5c309..bea11e91669 100644 --- a/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll +++ b/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=-sse | FileCheck %s -check-prefix=WITHNANS -; RUN: llc < %s -march=x86 -mattr=-sse -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s -check-prefix=NONANS +; RUN: llc < %s -mtriple=i686-- -mattr=-sse | FileCheck %s -check-prefix=WITHNANS +; RUN: llc < %s -mtriple=i686-- -mattr=-sse -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s -check-prefix=NONANS ; WITHNANS-LABEL: test: ; WITHNANS: setnp diff --git a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll index 6ff879760ea..987a229d427 100644 --- a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i32 @test() { br i1 false, label %cond_next33, label %cond_true12 diff --git a/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll index 4ea364d57e5..1c5b9d07eeb 100644 --- a/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll +++ b/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR825 define i64 @test() { diff --git a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll index 568fbbcc4f4..fe3c7cfa3d7 100644 --- a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll +++ b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR828 target datalayout = "e-p:32:32" diff --git a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll index 795e898df34..944fae68abc 100644 --- a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll +++ b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -mtriple=i686-- -no-integrated-as ; PR833 @G = weak global i32 0 ; <i32*> [#uses=3] diff --git a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll index deae086cf76..1c4c6478bc8 100644 --- a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll +++ b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep -- 4294967240 +; RUN: llc < %s -mtriple=i686-- | grep -- 4294967240 ; PR853 @X = global i32* inttoptr (i64 -56 to i32*) ; <i32**> [#uses=0] diff --git a/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll index 2a9c8324d36..baf4dfa2e43 100644 --- a/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll +++ b/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -1,5 +1,5 @@ ; PR850 -; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -no-integrated-as | FileCheck %s ; CHECK: {{movl 4[(]%eax[)],%ebp}} ; CHECK: {{movl 0[(]%eax[)], %ebx}} diff --git a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll index 397bc26dbec..66c79303fa4 100644 --- a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 %struct.foo = type opaque define fastcc i32 @test(%struct.foo* %v, %struct.foo* %vi) { diff --git a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll index 2c44adf6829..20a0163227b 100644 --- a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %struct.expr = type { %struct.rtx_def*, i32, %struct.expr*, %struct.occr*, %struct.occr*, %struct.rtx_def* } %struct.hash_table = type { %struct.expr**, i32, i32, i32 } %struct.occr = type { %struct.occr*, %struct.rtx_def*, i8, i8 } diff --git a/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll index 56d5f2f3040..1601d684e1f 100644 --- a/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll +++ b/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 | \ +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | \ ; RUN: not grep "movl %eax, %edx" define i32 @foo(i32 %t, i32 %C) { diff --git a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll index a7a10afaae1..3c32e1d7c6a 100644 --- a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8" %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll index e2c84ea569e..00726f9b820 100644 --- a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define void @_ZN13QFSFileEngine4readEPcx() { %tmp201 = load i32, i32* null ; <i32> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll index 43558258785..0b0fc05269d 100644 --- a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll +++ b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep shrl +; RUN: llc < %s -mtriple=i686-- | grep shrl ; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31 ; is then optimized away. @tree_code_type = external global [0 x i32] ; <[0 x i32]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll index 7a32ef7801d..8b9b91b31d2 100644 --- a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %struct.function = type opaque %struct.lang_decl = type opaque %struct.location_t = type { i8*, i32 } diff --git a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll index c45469d4e3e..9d2ec80b795 100644 --- a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll +++ b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- @str = external global [18 x i8] ; <[18 x i8]*> [#uses=1] define void @test() { diff --git a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll index 332816e22cd..0e589f2f2e3 100644 --- a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll +++ b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -asm-verbose | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -asm-verbose | FileCheck %s @str = internal constant [14 x i8] c"Hello world!\0A\00" ; <[14 x i8]*> [#uses=1] @str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <[13 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll index 9e1bf9edbbc..98d627b9ffe 100644 --- a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll +++ b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s target triple = "i686-pc-linux-gnu" @str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <[9 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll index c0bd6f72842..f110bd89a30 100644 --- a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll +++ b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: grep movb %t | count 1 ; RUN: grep "movzb[wl]" %t diff --git a/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll index ba83a8db839..87aba33fb7c 100644 --- a/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll +++ b/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; PR1016 ; CHECK: {{test.*1}} diff --git a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll index 080de1fb553..60bffdd908c 100644 --- a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll +++ b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR1049 target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll index 2c3c5c99c1b..de56a5280d1 100644 --- a/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll +++ b/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel +; RUN: llc < %s -x86-asm-syntax=intel ; PR1061 target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll index f83eea179d6..f8975e6c3b5 100644 --- a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll +++ b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: not grep ",%rsp)" %t ; PR1103 diff --git a/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll index e83e2e54e45..f16a8783d7d 100644 --- a/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll +++ b/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; Test 'ri' constraint. define void @run_init_process() { diff --git a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll index f05175259c8..660331cabd1 100644 --- a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll +++ b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ;; This example can't fold the or into an LEA. define i32 @test(float ** %tmp2, i32 %tmp12) nounwind { diff --git a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll index a9b85b94cd4..201de30abc0 100644 --- a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu -relocation-model=pic +; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic ; PR1027 %struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i32, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i32, i32, [40 x i8] } diff --git a/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll b/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll index cbc1bc47fb1..be4e1691744 100644 --- a/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll +++ b/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll @@ -1,5 +1,5 @@ ; PR1219 -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32 @test(i1 %X) { ; CHECK-LABEL: test: diff --git a/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll index 2e2b56d04a2..e22f0b4540d 100644 --- a/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll +++ b/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=pentium3 +; RUN: llc < %s -mtriple=i686-- -mcpu=pentium3 define internal fastcc double @ggc_rlimit_bound(double %limit) { ret double %limit diff --git a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll index 645221fe299..a9140f505c6 100644 --- a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll +++ b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-darwin | FileCheck %s +; RUN: llc < %s -mtriple=i686-darwin | FileCheck %s define void @foo(i8** %buf, i32 %size, i32 %col, i8* %p) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll index 61746814f9a..d04b0966b3a 100644 --- a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll +++ b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; ModuleID = 'a.bc' diff --git a/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll index 70936fbc928..4f5e0914612 100644 --- a/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR1259 define void @test() { diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll index 44d68dd0493..c7914037a00 100644 --- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll +++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i32 @test(i16 %tmp40414244) { %tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 ) diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll index 93fb344cbb1..da9a81c0739 100644 --- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll +++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax" +; RUN: llc < %s -no-integrated-as | grep "mov %gs:72, %eax" target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll index 6cf8bf90611..5713804aa03 100644 --- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll +++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s +; RUN: llc < %s -mcpu=yonah -no-integrated-as | FileCheck %s target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll index 3e1786bef79..9b9d819c1ef 100644 --- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll +++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" diff --git a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll index 9a3d4cb3bee..52001f5c21d 100644 --- a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- @data = external global [339 x i64] diff --git a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll index f48c13259c4..5bf669bb196 100644 --- a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll +++ b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -mcpu=yonah target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll index 648718cc722..b6074053d45 100644 --- a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll +++ b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; PR1348 ; CHECK-NOT: 4294967112 diff --git a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll index 0edf1398295..19b9224cdc0 100644 --- a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll +++ b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 -mattr=+sse +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 -mattr=+sse ; PR1371 @str = external global [18 x i8] ; <[18 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll index 9ce5f5ac63a..24044e7ebb9 100644 --- a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll +++ b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- %struct.XDesc = type <{ i32, %struct.OpaqueXDataStorageType** }> %struct.OpaqueXDataStorageType = type opaque diff --git a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll index 38fc5e18fe2..d5b5fa200da 100644 --- a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll +++ b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; CHECK-NOT: punpckhwd diff --git a/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll index 9d42c49317f..6b300d12b32 100644 --- a/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll +++ b/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 define void @test() { %tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) ) diff --git a/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll index d2d6388c078..dc74352988f 100644 --- a/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll +++ b/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define void @test() { entry: diff --git a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll index 87edab77ac1..bd8917cd763 100644 --- a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll +++ b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define void @test(<4 x float>* %arg) { %tmp89 = getelementptr <4 x float>, <4 x float>* %arg, i64 3 diff --git a/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll index 4f7ae327d1f..ac3dd78160c 100644 --- a/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll +++ b/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; CHECK-NOT: movl diff --git a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll index 85a144083ec..a798839fdb9 100644 --- a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll +++ b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "movsbl" +; RUN: llc < %s -mtriple=i686-- | grep "movsbl" @X = global i32 0 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll index 7eb018ce525..bcffac2cdd4 100644 --- a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll +++ b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep pushf +; RUN: llc < %s -mtriple=i686-- | not grep pushf %struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8*, i8* } %struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x %struct.gl_texture_image*], [1024 x i8], i32, i32, i32, i8, i8*, i8, void (%struct.gl_texture_object*, i32, float*, float*, float*, float*, i8*, i8*, i8*, i8*)*, %struct.gl_texture_object* } diff --git a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll index c535392ffdf..6658536bd34 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep movb +; RUN: llc < %s -mtriple=i686-- | not grep movb define signext i16 @f(i32* %bp, i32* %ss) { entry: diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll index c4d5cb970c3..14cff04e1e1 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep addss | not grep esp +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep addss | not grep esp define fastcc void @fht(float* %fz, i16 signext %n) { entry: diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll index 4b1c1d77f7a..2601b4d4c53 100644 --- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll +++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 | grep sarl | not grep esp +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | grep sarl | not grep esp define signext i16 @t(i16* %qmatrix, i16* %dct, i16* %acBaseTable, i16* %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, i32* %bitptr, i32* %source, i32 %markerPrefix, i8** %byteptr, i32 %scale, i32 %round, i32 %bits) { entry: diff --git a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index 30e1f575caf..a1bc764e22e 100644 --- a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s ; CHECK: inc ; CHECK-NOT: PTR diff --git a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll index 9f57df87fe4..f338ff065ab 100644 --- a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll +++ b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 1 +; RUN: llc < %s -mtriple=i686-- | grep mov | count 1 define signext i16 @t() { entry: diff --git a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll index d945d57fad7..10cb826944b 100644 --- a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll +++ b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i32 @unique(i8* %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) { entry: diff --git a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll index 3d52b6cf7b3..2a562458e85 100644 --- a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll +++ b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse2 +; RUN: llc < %s -mattr=sse2 ; ModuleID = 'yyy.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll index 019c6a8cc0d..d0c7a625902 100644 --- a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll +++ b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %"struct.K::JL" = type <{ i8 }> %struct.jv = type { i64 } diff --git a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll index d88b45f6839..3894029e592 100644 --- a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=generic -mattr=+sse2 | not grep lea +; RUN: llc < %s -mtriple=i686-- -mcpu=generic -mattr=+sse2 | not grep lea define float @foo(i32* %x, float* %y, i32 %c) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll index 06e0a779be1..9ecf0680f0d 100644 --- a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll +++ b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep imul +; RUN: llc < %s -mtriple=i686-- | not grep imul %struct.eebb = type { %struct.eebb*, i16* } %struct.hf = type { %struct.hf*, i16*, i8*, i32, i32, %struct.eebb*, i32, i32, i8*, i8*, i8*, i8*, i16*, i8*, i16*, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, i8* } diff --git a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll index 8e315f4d80f..1f8d829383c 100644 --- a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll +++ b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from ; kicking in. diff --git a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll index 26d18273dd4..35aa016ec58 100644 --- a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll +++ b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=generic | grep "(%esp)" | count 2 +; RUN: llc < %s -mtriple=i686-- -mcpu=generic | grep "(%esp)" | count 2 ; PR1872 %struct.c34007g__designated___XUB = type { i32, i32, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll index fa71bffaf8c..2246c989409 100644 --- a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+cmov -x86-cmov-converter=false | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+cmov -x86-cmov-converter=false | FileCheck %s ; ; Test scheduling a multi-use compare. We should neither spill flags ; nor clone the compare. diff --git a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll index 6e98f9cb219..eb8439fc179 100644 --- a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll +++ b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -regalloc=fast -optimize-regalloc=0 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0 define void @SolveCubic(double %a, double %b, double %c, double %d, i32* %solutions, double* %x) { entry: diff --git a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll index ffc5a1fb6d4..a08fc1cbd05 100644 --- a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll +++ b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep IMPLICIT_DEF +; RUN: llc < %s -mtriple=i686-- | not grep IMPLICIT_DEF %struct.node_t = type { double*, %struct.node_t*, %struct.node_t**, double**, double*, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll index ce233a9a554..a74e7fc6aa4 100644 --- a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll +++ b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR1975 @nodes = external global i64 ; <i64*> [#uses=2] diff --git a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll index 2b4d68ce5df..ba80086a151 100644 --- a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; CHECK: xorps {{.*}}{{LCPI0_0|__xmm@}} define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind { diff --git a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll index ef69bd01cb9..9f11ecd8bb0 100644 --- a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16 +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16 ; PR1909 @.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <[48 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll index 75f88b0e381..77ed1857e6c 100644 --- a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -march=x86 -mattr=+mmx | grep esi +; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -mtriple=i686-- -mattr=+mmx | grep esi ; PR2082 ; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of ; registers. diff --git a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll index 382fbed9b88..7614b40cf9a 100644 --- a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- %struct.XX = type <{ i8 }> %struct.YY = type { i64 } diff --git a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll index 11b55a6e5ac..2589dbcbbf5 100644 --- a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll +++ b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -no-integrated-as target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll index 857e6237d14..de13ebf8b66 100644 --- a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll +++ b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %struct.CompAtom = type <{ %struct.Position, float, i32 }> %struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll b/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll index d842967561a..a257bf07227 100644 --- a/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll +++ b/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll b/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll index 70a83b5c9f5..498d6baa858 100644 --- a/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll +++ b/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 ; PR2122 define float @func(float %a, float %b) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll index 409bcd51a13..e17e963ecc9 100644 --- a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 | not grep 255 +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | not grep 255 %struct.CONSTRAINT = type { i32, i32, i32, i32 } %struct.FIRST_UNION = type { %struct.anon } diff --git a/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll b/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll index 19d49b21f5b..4c14024223f 100644 --- a/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll +++ b/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define signext i16 @t(i32 %depth) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll index eaa883c963f..163b250c692 100644 --- a/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i32 @t() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll index 2d868e0f612..c7ba60a7174 100644 --- a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll +++ b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define void @t() { entry: diff --git a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll index f21a6f37f4b..55050706115 100644 --- a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll +++ b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep jmp +; RUN: llc < %s -mtriple=i686-- | not grep jmp %struct..0anon = type { i32 } %struct.binding_level = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.binding_level*, i8, i8, i8, i8, i8, i32, %struct.tree_node* } diff --git a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll index 1488034f2eb..b2106873af4 100644 --- a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define void @Hubba(i8* %saveunder, i32 %firstBlob, i32 %select) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll index 6389267aa4e..cd0f3a38568 100644 --- a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll +++ b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep 120 +; RUN: llc < %s -mtriple=i686-- | not grep 120 ; Don't accidentally add the offset twice for trailing bytes. %struct.S63 = type { [63 x i8] } diff --git a/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll b/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll index 6e8e98d865b..f819a4cd139 100644 --- a/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll +++ b/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i64 @t(i64 %maxIdleDuration) nounwind { call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind diff --git a/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll index 4160b203e36..42ccb21faf1 100644 --- a/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll +++ b/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jp +; RUN: llc < %s -enable-unsafe-fp-math -mtriple=i686-- | grep jp ; rdar://5902801 declare void @test2() diff --git a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll index 8ed1b2a759b..d1e458e3837 100644 --- a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, float*, float*, float*, float*, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll index 0e4ef1c3260..19faab66fa3 100644 --- a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define fastcc void @glgVectorFloatConversion() nounwind { %tmp12745 = load <4 x float>, <4 x float>* null, align 16 ; <<4 x float>> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll index c6709a86d85..4dc6c4e4917 100644 --- a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | grep mov | count 5 +; RUN: llc < %s -mtriple=i686-- -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | grep mov | count 5 ; PR2343 %llvm.dbg.anchor.type = type { i32, i32 } diff --git a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll index a91a422f55d..9c3ab06d8ca 100644 --- a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll +++ b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s define void @a(<4 x float>* %x) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll index 581fae26902..e2b2af2ebb0 100644 --- a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll +++ b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF -; RUN: llc < %s -march=x86 -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON +; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF +; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON ; These transforms are turned off for load volatiles and stores. ; Check that they weren't turned off for all loads and stores! ; CHECK-LABEL: f: diff --git a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll index 72d190758f8..7836316b0ad 100644 --- a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll +++ b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep pslldq +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | not grep pslldq define void @t() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll b/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll index ff2b05fb08e..ef159460392 100644 --- a/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll +++ b/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -o - | not grep shr +; RUN: llc < %s -mtriple=x86_64-- -o - | not grep shr define i128 @sl(i128 %x) { %t = shl i128 %x, 1 ret i128 %t diff --git a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll index 719baf5cc94..1d142e05b18 100644 --- a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll +++ b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 ; PR2566 @0 = external global i16 ; <i16*>:0 [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll b/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll index 684ca5c89fd..e0b7c004fc2 100644 --- a/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll +++ b/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=pentium +; RUN: llc < %s -mtriple=i686-- -mcpu=pentium ; PR2575 define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind { diff --git a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll index a030fbeed51..1b6bd7ec0a4 100644 --- a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll +++ b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s -o - | grep "cmpl \$[1], %" +; RUN: llc -mtriple=x86_64-- < %s -o - | grep "cmpl \$[1], %" @.str = internal constant [4 x i8] c"%d\0A\00" diff --git a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll index f9c5467713f..201be38d24e 100644 --- a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll +++ b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR2596 @data = external global [400 x i64] ; <[400 x i64]*> [#uses=5] diff --git a/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll b/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll index 53402c04511..703fba5247a 100644 --- a/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll +++ b/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- %struct.DrawHelper = type { void (i32, %struct.QT_FT_Span*, i8*)*, void (i32, %struct.QT_FT_Span*, i8*)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i8*, i32, i32, i32)*, void (%struct.QRasterBuffer*, i32, i32, i32, i32, i32)* } %struct.QBasicAtomic = type { i32 } diff --git a/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll b/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll index 84d373d70a2..34a5d9999a6 100644 --- a/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll +++ b/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2,+mmx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,+mmx | FileCheck %s ; originally from PR2687, but things don't work that way any more. ; there are no MMX instructions here; we use XMM. diff --git a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll index 8c46bb3ec8b..1822dbebb12 100644 --- a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR2783 @g_15 = external global i16 ; <i16*> [#uses=2] diff --git a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll index a9875521fb1..4d35d65431a 100644 --- a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll +++ b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED ; PR2748 diff --git a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll index 3edd72bdba9..1ba17254c3c 100644 --- a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll +++ b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s +; RUN: llc < %s | FileCheck %s +; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s ; %0 must not be put in EAX or EDX. ; In the first asm, $0 and $2 must not be put in EAX. diff --git a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll index 0058d979a2f..51f2dfbfdb5 100644 --- a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll +++ b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s -; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as | FileCheck %s -; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as | FileCheck %s +; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s +; RUN: llc < %s -regalloc=basic -no-integrated-as | FileCheck %s +; RUN: llc < %s -regalloc=greedy -no-integrated-as | FileCheck %s ; The 1st, 2nd, 3rd and 5th registers must all be different. The registers ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th diff --git a/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll b/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll index fc3e35ed1f9..9373c798619 100644 --- a/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll +++ b/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movs | count 2 -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fld | count 2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep movs | count 2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep fld | count 2 ; check 'inreg' attribute for sse_regparm define inreg double @foo1() nounwind { diff --git a/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll index 6ee8cf2f5e3..c90afa07dd7 100644 --- a/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll +++ b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep movz +; RUN: llc < %s -mtriple=i686-- | not grep movz ; PR2835 @g_407 = internal global i32 0 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll index a135cd49787..6a78a37c9b2 100644 --- a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll +++ b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll @@ -1,7 +1,7 @@ ; ModuleID = 'nan.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldl +; RUN: llc < %s -mattr=-sse2,-sse3,-sse | grep fldl ; This NaN should be shortened to a double (not a float). declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f) diff --git a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll index 34c9857b00e..e659eea4cfb 100644 --- a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll +++ b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll @@ -1,7 +1,7 @@ ; ModuleID = 'nan.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64" target triple = "i686-apple-darwin8" -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | grep fldt | count 3 +; RUN: llc < %s -mattr=-sse2,-sse3,-sse | grep fldt | count 3 ; it is not safe to shorten any of these NaNs. declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f) diff --git a/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll b/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll index 26e802ac05f..258c999d3f3 100644 --- a/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll +++ b/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2 define <4 x float> @f(float %w) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll index c285ae4fdd2..b8f2c1f47b0 100644 --- a/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR2775 define i32 @func_77(i8 zeroext %p_79) nounwind { diff --git a/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll b/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll index ac6fa0dc9b2..fef7d7de0d7 100644 --- a/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll +++ b/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 ; PR2762 define void @foo(<4 x i32>* %p, <4 x double>* %q) { %n = load <4 x i32>, <4 x i32>* %p diff --git a/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll index 2b2f704349b..29ed15fbd17 100644 --- a/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll +++ b/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -no-integrated-as -; RUN: llc < %s -march=x86-64 -no-integrated-as +; RUN: llc < %s -mtriple=i686-- -no-integrated-as +; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as define void @test(i64 %x) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll index e23dfe5a6a1..45d702ec368 100644 --- a/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll +++ b/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -no-integrated-as -; RUN: llc < %s -march=x86-64 -no-integrated-as +; RUN: llc < %s -mtriple=i686-- -no-integrated-as +; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as ; from gcc.c-torture/compile/920520-1.c diff --git a/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll b/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll index e504bc3e776..6c29bfaf33f 100644 --- a/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll +++ b/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -o - | not grep "ucomiss[^,]*esp" +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -o - | not grep "ucomiss[^,]*esp" define void @f(float %wt) { entry: diff --git a/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll b/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll index 7ad94f149e1..6a89fbd0485 100644 --- a/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll +++ b/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR2977 define i8* @ap_php_conv_p2(){ entry: diff --git a/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll b/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll index 97c046c8642..331b9dba984 100644 --- a/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll +++ b/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -o - | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -o - | FileCheck %s declare void @llvm.va_start(i8*) nounwind diff --git a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-1.ll b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-1.ll index 004adc08091..3c7227c87dd 100644 --- a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-1.ll +++ b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll index 6622bc26692..42846f05e26 100644 --- a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll +++ b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll index d5a676a7dbb..013732315be 100644 --- a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll +++ b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | grep add | count 2 -; RUN: llc < %s -march=x86 | grep sub | grep -v subsections | count 1 +; RUN: llc < %s | grep add | count 2 +; RUN: llc < %s | grep sub | grep -v subsections | count 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; this should be rearranged to have two +s and one - diff --git a/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll b/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll index 3080d085572..76141825ded 100644 --- a/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll +++ b/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll b/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll index 75773e0959c..884afae92d1 100644 --- a/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll +++ b/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "(%esp)" | count 2 +; RUN: llc < %s | grep "(%esp)" | count 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; -(-a) - a should be found and removed, leaving refs to only L and P diff --git a/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll b/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll index b80f4731f8a..902b3afcf29 100644 --- a/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll +++ b/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | grep "lea.*X.*esp" | count 2 +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | grep "lea.*X.*esp" | count 2 @X = external global [0 x i32] diff --git a/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll b/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll index bae928336ba..1f588934b4c 100644 --- a/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll +++ b/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "(%esp)" | count 4 +; RUN: llc < %s | grep "(%esp)" | count 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.5" ; a - a should be found and removed, leaving refs to only L and P diff --git a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll index 4feb764bec6..e8dd814b216 100644 --- a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll +++ b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-legalize-types-checking +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -enable-legalize-types-checking declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone diff --git a/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll b/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll index 2eab5f1773a..bc7df2a6032 100644 --- a/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll +++ b/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll index c655f2c374a..58bce75fc73 100644 --- a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll +++ b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=-sse,-sse2 | FileCheck %s +; RUN: llc < %s -mattr=-sse,-sse2 | FileCheck %s ; PR3402 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll b/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll index 117ff47657f..39ebec5b866 100644 --- a/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll +++ b/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -enable-legalize-types-checking +; RUN: llc < %s -mtriple=i686-- -enable-legalize-types-checking ; PR3393 define void @foo(i32 inreg %x) { diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll index 4eb0ec1485b..158839743d7 100644 --- a/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll +++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep and +; RUN: llc < %s -mtriple=i686-- | not grep and ; PR3401 define void @x(i288 %i) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll index 90d14e7b707..a6209280e4b 100644 --- a/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll +++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "mov.*56" +; RUN: llc < %s -mtriple=i686-- | grep "mov.*56" ; PR3449 define void @test(<8 x double>* %P, i64* %Q) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll index 1b531e37043..5d0405106eb 100644 --- a/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll +++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR3450 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll b/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll index e91208d5b3a..5084f6fe85a 100644 --- a/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll +++ b/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR3453 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll b/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll index 592a7e33b19..a18275a8fc8 100644 --- a/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll +++ b/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR3411 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll index 908cc08991d..c1a7823ad45 100644 --- a/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3486 define i32 @foo(i8 signext %p_26) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll index 8edaf3f1fa3..d144bfaab66 100644 --- a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll +++ b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll @@ -1,8 +1,7 @@ -; RUN: llc < %s -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin9 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -stack-symbol-ordering=0 -verify-machineinstrs | FileCheck %s ; PR3538 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9" define signext i8 @foo(i8* %s1) nounwind ssp { ; Make sure we generate: diff --git a/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll index 5004f04bf8f..5aef1f69f1a 100644 --- a/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll +++ b/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s +; RUN: llc < %s -no-integrated-as | FileCheck %s ; ModuleID = 'shant.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll index 4f8a5e7b3e3..acf2f6d6512 100644 --- a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll +++ b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin8 +; RUN: llc < %s -mtriple=i386-apple-darwin8 ; PR3561 define hidden void @__mulxc3({ x86_fp80, x86_fp80 }* noalias nocapture sret %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll index 5bec179534b..d555f127375 100644 --- a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll +++ b/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | FileCheck %s ; rdar://6608609 ; CHECK-NOT: commuted diff --git a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index 89cb71a52c0..0b392232b8d 100644 --- a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,6 +1,6 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm" -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s +; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "9 machinelicm" +; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s ; rdar://6627786 ; rdar://7792037 diff --git a/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll b/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll index d6d24cda295..12e667e0b25 100644 --- a/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll +++ b/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; rdar://6642541 %struct.HandleBlock = type { [30 x i32], [990 x i8*], %struct.HandleBlockTrailer } diff --git a/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll b/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll index 9deecebe945..3dff4f7bfc9 100644 --- a/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll +++ b/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3686 ; rdar://6661799 diff --git a/llvm/test/CodeGen/X86/2009-03-07-FPConstSelect.ll b/llvm/test/CodeGen/X86/2009-03-07-FPConstSelect.ll index 39caddcf934..298b81b90e4 100644 --- a/llvm/test/CodeGen/X86/2009-03-07-FPConstSelect.ll +++ b/llvm/test/CodeGen/X86/2009-03-07-FPConstSelect.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm +; RUN: llc < %s -mcpu=yonah | not grep xmm ; This should do a single load into the fp stack for the return, not diddle with xmm registers. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll b/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll index 3bff7dc7656..1c4d71e38a9 100644 --- a/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll +++ b/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- ; PR3763 %struct.__block_descriptor = type { i64, i64 } diff --git a/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll b/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll index 367a6d2a3b8..7293511eda4 100644 --- a/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll +++ b/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; rdar://6661955 ; CHECK-NOT: and diff --git a/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll b/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll index f4864793ba2..eb37665a41e 100644 --- a/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll +++ b/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define double @t(double %x) nounwind ssp noimplicitfloat { entry: diff --git a/llvm/test/CodeGen/X86/2009-04-12-picrel.ll b/llvm/test/CodeGen/X86/2009-04-12-picrel.ll index 037dee95717..697f14e223c 100644 --- a/llvm/test/CodeGen/X86/2009-04-12-picrel.ll +++ b/llvm/test/CodeGen/X86/2009-04-12-picrel.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small > %t +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small > %t ; RUN: grep leaq %t | count 1 @dst = external global [131072 x i32] diff --git a/llvm/test/CodeGen/X86/2009-04-24.ll b/llvm/test/CodeGen/X86/2009-04-24.ll index 7647dcc7feb..2f4cc588ccd 100644 --- a/llvm/test/CodeGen/X86/2009-04-24.ll +++ b/llvm/test/CodeGen/X86/2009-04-24.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s ; PR4004 ; CHECK: {{leaq.*TLSGD}} diff --git a/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll index 151f0ffc751..f6b5ecef6e3 100644 --- a/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll +++ b/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1 ; rdar://6806252 define i64 @test(i32* %tmp13) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-04-scale.ll b/llvm/test/CodeGen/X86/2009-04-scale.ll index 1fc5f2b234f..4238d6eb061 100644 --- a/llvm/test/CodeGen/X86/2009-04-scale.ll +++ b/llvm/test/CodeGen/X86/2009-04-scale.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-unknown-linux-gnu +; RUN: llc < %s -mtriple=i386-unknown-linux-gnu ; PR3995 %struct.vtable = type { i32 (...)** } diff --git a/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll b/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll index e9d15583e56..a7d9aea74c6 100644 --- a/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll +++ b/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR4188 ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll b/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll index 89cd24d7dcf..b2786ab6167 100644 --- a/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll +++ b/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- ; PR3886 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll b/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll index 019d5dfb1fe..80aafb2dba8 100644 --- a/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll +++ b/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- define fastcc void @S_next_symbol(i448* %P) nounwind ssp { entry: diff --git a/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll b/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll index e01fe9f8930..5aa8fe80494 100644 --- a/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll +++ b/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | not grep "movzbl %[abcd]h," +; RUN: llc < %s -mtriple=x86_64-- | not grep "movzbl %[abcd]h," define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind { newFuncRoot: diff --git a/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll index 29795492d89..baa99f15183 100644 --- a/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll +++ b/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- %0 = type { %struct.GAP } ; type %0 %1 = type { i16, i8, i8 } ; type %1 diff --git a/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll b/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll index 9c7eb6d633d..d1d05a19001 100644 --- a/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll +++ b/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=core2 | FileCheck %s define <4 x i16> @a(i32* %x1) nounwind { ; CHECK-LABEL: a: diff --git a/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll b/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll index e361804d61b..bc19edd23da 100644 --- a/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll +++ b/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse +; RUN: llc < %s -mtriple=i686-- -mattr=+sse ; PR2598 define <2 x float> @a(<2 x i32> %i) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll b/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll index 673e936e217..5989e69bdc6 100644 --- a/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll +++ b/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt -; RUN: llc < %s -tailcallopt -march=x86-64 -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm +; RUN: llc < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep fstpt +; RUN: llc < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | grep xmm ; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call ; calling convention out of sync with standard c calling convention on x86_64) diff --git a/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll b/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll index feb578098ca..a927b87cb86 100644 --- a/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll +++ b/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | not grep TAILCALL +; RUN: llc < %s -mtriple=i686-- -tailcallopt | not grep TAILCALL ; Bug 4396. This tail call can NOT be optimized. diff --git a/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll b/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll index 4c4552da16a..7cb1b1e95de 100644 --- a/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll +++ b/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse,-sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2 | FileCheck %s ; PR2484 define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind { diff --git a/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll b/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll index fcc71aef23a..494423d2302 100644 --- a/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll +++ b/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=x86_64-unknown-freebsd7.2 +; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2 ; PR4478 %struct.sockaddr = type <{ i8, i8, [14 x i8] }> diff --git a/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll index 366985678e5..bf683ba159f 100644 --- a/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll +++ b/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define void @test2(<2 x i32> %A, <2 x i32> %B, <2 x i32>* %C) nounwind { %D = icmp sgt <2 x i32> %A, %B diff --git a/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll b/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll index 0fdfdcb8a30..5614a9d4aa5 100644 --- a/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll +++ b/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3037 define void @entry(<4 x i8>* %dest) { diff --git a/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll b/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll index a0095ab2064..2f5c898ce22 100644 --- a/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll +++ b/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- ; PR4583 define i32 @atomic_cmpset_long(i64* %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat { diff --git a/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll b/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll index 045e89e1585..258ff35d30f 100644 --- a/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll +++ b/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- @bsBuff = internal global i32 0 ; <i32*> [#uses=1] @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 ()* @bsGetUInt32 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] diff --git a/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll b/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll index 5926ab4b5c7..058ffcf152e 100644 --- a/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll +++ b/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-pc-linux | FileCheck %s +; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s @a = external global i96, align 4 @b = external global i64, align 8 diff --git a/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll b/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll index 45e770f8121..0169de75800 100644 --- a/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll +++ b/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR4753 ; This function has a sub-register reuse undone. diff --git a/llvm/test/CodeGen/X86/20090313-signext.ll b/llvm/test/CodeGen/X86/20090313-signext.ll index 3ea13164112..4162ee66838 100644 --- a/llvm/test/CodeGen/X86/20090313-signext.ll +++ b/llvm/test/CodeGen/X86/20090313-signext.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -relocation-model=pic > %t +; RUN: llc < %s -mtriple=x86_64-- -relocation-model=pic > %t ; RUN: grep "movswl %ax, %edi" %t ; RUN: grep "movw (%rax), %ax" %t ; XFAIL: * diff --git a/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll b/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll index e7004e28752..73b9179919a 100644 --- a/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll +++ b/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s ; <rdar://problem/7499313> -target triple = "i686-apple-darwin8" +target triple = "x86_64-apple-darwin8" declare void @func2(i16 zeroext) diff --git a/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll b/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll index 6aba39e04bc..759bbcef709 100644 --- a/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll +++ b/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s ; ModuleID = 'bugpoint-reduced-simplified.bc' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll index ae60d57bbf4..60f441cff72 100644 --- a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll +++ b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -O0 < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s +; RUN: llc -mtriple=i686-- -O0 < %s -filetype=obj | llvm-dwarfdump - | FileCheck %s ; CHECK-LABEL: .debug_info contents: diff --git a/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll b/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll index d116ecc6bde..d8616f06c61 100644 --- a/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll +++ b/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- ; PR6086 define fastcc void @prepOutput() nounwind { bb: ; preds = %output.exit diff --git a/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll b/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll index 5d74db1160c..4734b3695cf 100644 --- a/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll +++ b/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s | FileCheck %s ; CHECK: movnt target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll index a8c87fa2074..f3847124614 100644 --- a/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll +++ b/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32* @t() nounwind optsize ssp { entry: diff --git a/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll b/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll index 5a4b389acb3..8805402b222 100644 --- a/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll +++ b/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll @@ -1,4 +1,4 @@ -; RUN: llc -fast-isel -march=x86 < %s | FileCheck %s +; RUN: llc -fast-isel -mtriple=i686-- < %s | FileCheck %s ; CHECK: %fs: define i32 @test1(i32 addrspace(257)* %arg) nounwind { diff --git a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll index 7cffdc545e0..96ceb198581 100644 --- a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll +++ b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s +; RUN: llc < %s -O0 -no-integrated-as | FileCheck %s ; PR7509 target triple = "i386-apple-darwin10" %asmtype = type { i32, i8*, i32, i32 } diff --git a/llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll b/llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll index 54a7763eb69..9e33d2bf6ac 100644 --- a/llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll +++ b/llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 | FileCheck %s +; RUN: llc < %s -mcpu=core2 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin10.4" diff --git a/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll b/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll index ee50cb13e63..153b6dc4e02 100644 --- a/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll +++ b/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s ; PR8297 ; ; On i386, i64 cmpxchg is lowered during legalize types to extract the diff --git a/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll b/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll index 4b937333c8e..6e2e3aed087 100644 --- a/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll +++ b/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -O0 +; RUN: llc < %s -O0 ; PR8211 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll b/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll index 331e83bb506..1764922dfd2 100644 --- a/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll +++ b/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+cmov | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+cmov | FileCheck %s ; Both values were being zero extended. @u = external global i8 @s = external global i8 diff --git a/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll b/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll index 7821f0537e7..dc7f613880b 100644 --- a/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll +++ b/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O2 -march=x86 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s +; RUN: llc < %s -O2 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s ; PR9237: Assertion in VirtRegRewriter.cpp, ResurrectConfirmedKill ; `KillOps[*SR] == KillOp && "invalid subreg kill flags"' diff --git a/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll b/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll index d25fbf7b71f..9ee19a7a0a9 100644 --- a/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll +++ b/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin11.0.0" diff --git a/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll b/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll index 38a9b3d4f5c..f829c05fc56 100644 --- a/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll +++ b/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; rdar://7983260 diff --git a/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll b/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll index a94a9812431..2212c5dc86e 100644 --- a/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll +++ b/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s ;CHECK-LABEL: test: ;CHECK-NOT: pshufd diff --git a/llvm/test/CodeGen/X86/2011-06-01-fildll.ll b/llvm/test/CodeGen/X86/2011-06-01-fildll.ll index 30c743441c3..54aa71c8ee9 100644 --- a/llvm/test/CodeGen/X86/2011-06-01-fildll.ll +++ b/llvm/test/CodeGen/X86/2011-06-01-fildll.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target triple = "i386-apple-macosx10.6.6" diff --git a/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll b/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll index c78e8e38a56..7ab93ff5fd6 100644 --- a/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll +++ b/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+sse | FileCheck %s define float @chainfail1(i64* nocapture %a, i64* nocapture %b, i32 %x, i32 %y, float* nocapture %f) nounwind uwtable noinline ssp { entry: diff --git a/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll b/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll index d9341489057..2899b8b51ef 100644 --- a/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll +++ b/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s +; RUN: llc -mtriple=x86_64-- < %s define i32 @signbitl(x86_fp80 %x) nounwind uwtable readnone { entry: %tmp4 = bitcast x86_fp80 %x to i80 diff --git a/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll index c9b3df83613..3ac21048dce 100644 --- a/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll +++ b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -stress-sched | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -stress-sched | FileCheck %s ; REQUIRES: asserts ; Test interference between physreg aliases during preRAsched. ; mul wants an operand in AL, but call clobbers it. diff --git a/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll b/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll index f38ebf1da85..f1b1a7077bd 100644 --- a/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll +++ b/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s -disable-fp-elim | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -disable-fp-elim | FileCheck %s ; This test is checking that we don't crash and we don't incorrectly fold ; a large displacement and a frame index into a single lea. diff --git a/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll b/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll index 12171ac8b67..3740c05ecb0 100644 --- a/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll +++ b/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -O2 < %s +; RUN: llc -mtriple=x86_64-- -O2 < %s define void @test(i64 %add127.tr.i2686) { entry: diff --git a/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll b/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll index 7a5a0f81490..3fd0936dd19 100644 --- a/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll +++ b/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=i686-- +; RUN: llc < %s -mtriple=x86_64-- %struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, void (i32, i32)*, i8 (i32, i32)* } diff --git a/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll b/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll index 83e4bcc6093..f98b19fe52a 100644 --- a/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll +++ b/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll b/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll index 812628bf0e7..28802fce5da 100644 --- a/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll +++ b/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-block-placement | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -disable-block-placement | FileCheck %s ; ; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg: ; while.body85.i: diff --git a/llvm/test/CodeGen/X86/2011-09-18-sse2cmp.ll b/llvm/test/CodeGen/X86/2011-09-18-sse2cmp.ll index 89de648ca96..7c75feb9375 100644 --- a/llvm/test/CodeGen/X86/2011-09-18-sse2cmp.ll +++ b/llvm/test/CodeGen/X86/2011-09-18-sse2cmp.ll @@ -1,4 +1,4 @@ -;RUN: llc < %s -march=x86 -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s +;RUN: llc < %s -mtriple=i686-- -mcpu=yonah -mattr=+sse2,-sse4.1 | FileCheck %s ;CHECK: @max ;CHECK: cmplepd diff --git a/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll b/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll index e61715a4813..235d5f04f05 100644 --- a/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll +++ b/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1 ; Make sure we are not crashing on this code. diff --git a/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll b/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll index c9dc050d0b4..0cfe89ce7eb 100644 --- a/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll +++ b/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -fast-isel -mattr=+sse < %s | FileCheck %s +; RUN: llc -fast-isel -mattr=+sse < %s | FileCheck %s ; <rdar://problem/10215997> target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" target triple = "i386-apple-macosx10.7" diff --git a/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll b/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll index bf1f029847e..2ae3d389d05 100644 --- a/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll +++ b/llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i8:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2011-10-27-tstore.ll b/llvm/test/CodeGen/X86/2011-10-27-tstore.ll index 290b4d0cb00..295e0093275 100644 --- a/llvm/test/CodeGen/X86/2011-10-27-tstore.ll +++ b/llvm/test/CodeGen/X86/2011-10-27-tstore.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 | FileCheck %s target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2011-10-30-padd.ll b/llvm/test/CodeGen/X86/2011-10-30-padd.ll index 1b8c12bc8e3..655b6f3c207 100644 --- a/llvm/test/CodeGen/X86/2011-10-30-padd.ll +++ b/llvm/test/CodeGen/X86/2011-10-30-padd.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s ;CHECK-LABEL: addXX_test: ;CHECK: padd diff --git a/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll b/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll index d3164707a35..2f085300202 100644 --- a/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll +++ b/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s ; We don't really care what this outputs; just make sure it's somewhat sane. ; CHECK: legalize_test diff --git a/llvm/test/CodeGen/X86/2011-11-30-or.ll b/llvm/test/CodeGen/X86/2011-11-30-or.ll index 5c324a42392..48cd86bfb23 100644 --- a/llvm/test/CodeGen/X86/2011-11-30-or.ll +++ b/llvm/test/CodeGen/X86/2011-11-30-or.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target triple = "x86_64-apple-macosx10.6.6" diff --git a/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll b/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll index 7a4126f4ae2..4ea59bb4c50 100644 --- a/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll +++ b/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; PR11495 ; CHECK: 1311768467463790320 diff --git a/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll b/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll index ab1b46c99d9..f8b6f3705d9 100644 --- a/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll +++ b/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -mattr=+avx +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=+avx ; Various missing patterns causing crashes. ; rdar://10538793 diff --git a/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll b/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll index 70783509bb7..c6454530b8a 100644 --- a/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll +++ b/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86-64 -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4 -; RUN: llc -march=x86-64 -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4 +; RUN: llc -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4 +; RUN: llc -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4 ; Test case for r146671 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.7" diff --git a/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll b/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll index 9eb59e41ef7..647f15730c5 100644 --- a/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll +++ b/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s ;CHECK-LABEL: vcast: define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) { diff --git a/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll b/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll index a55c77bd226..790bc1f329f 100644 --- a/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll +++ b/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mcpu=i686 -mattr=+mmx < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -mcpu=i686 -mattr=+mmx < %s | FileCheck %s ; <rdar://problem/10106006> define void @func() nounwind ssp { diff --git a/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll b/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll index e39df58877f..9ce9d14f42e 100644 --- a/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll +++ b/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx | FileCheck %s ; CHECK: ocl define void @ocl() { diff --git a/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll b/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll index 078f1b05c3f..2d72d2b2575 100644 --- a/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll +++ b/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 ; We don't care about the output, just that it doesn't crash define <1 x i1> @buildvec_promote() { diff --git a/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll b/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll index 7c8c2f28348..d3106c10e88 100644 --- a/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll +++ b/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx2 | FileCheck %s declare x86_fastcallcc i64 @barrier() diff --git a/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll b/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll index 46eca7644eb..0ac26c3b402 100644 --- a/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll +++ b/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+avx2 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+avx2 ; make sure that we are not crashing. define <16 x i32> @autogen_SD34717() { diff --git a/llvm/test/CodeGen/X86/2012-07-15-vshl.ll b/llvm/test/CodeGen/X86/2012-07-15-vshl.ll index cd0fef469e6..b8b6f06bc0b 100644 --- a/llvm/test/CodeGen/X86/2012-07-15-vshl.ll +++ b/llvm/test/CodeGen/X86/2012-07-15-vshl.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 -mattr=+avx +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx ; PR13352 declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone diff --git a/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll b/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll index 9e5cbd2f337..194d9e63b9f 100644 --- a/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll +++ b/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 define void @autogen_SD2543() { A: diff --git a/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll index 17533a1e164..7e78d70921f 100644 --- a/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll +++ b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 define void @autogen_SD3100() { BB: diff --git a/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll b/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll index 2de2f97d7d2..764ccfe66e8 100644 --- a/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll +++ b/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 define void @autogen_SD33189483() { BB: diff --git a/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll b/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll index 33fcb120e16..1838dc97dda 100644 --- a/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll +++ b/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 +; RUN: llc < %s -mcpu=corei7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll b/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll index 7b9bab97be6..010f0934b4a 100644 --- a/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll +++ b/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s +; RUN: llc -mcpu=corei7 < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.8.0" diff --git a/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll b/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll index fb29241035e..8b1fd74dba1 100644 --- a/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll +++ b/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll @@ -1,9 +1,9 @@ -; RUN: llc -march=x86-64 -mcpu=corei7 -disable-cgp-select2branch < %s +; RUN: llc -mcpu=corei7 -disable-cgp-select2branch < %s ; We should not crash on this test. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" -target triple = "i386-apple-darwin9.0.0" +target triple = "x86_64-apple-darwin9.0.0" @global = external constant [411 x i8], align 1 diff --git a/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll b/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll index 2e8206a7591..2bd755328ad 100644 --- a/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll +++ b/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s ; CHECK: merge_stores_can ; CHECK: callq foo diff --git a/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll b/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll index 9be8b5bbb42..887ac838cd8 100644 --- a/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll +++ b/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s ; CHECK: multiple_stores_on_chain ; CHECK: movabsq diff --git a/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll b/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll index 8cef2c8201c..8420d8871fe 100644 --- a/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll +++ b/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mtriple=i686-apple-ios -mcpu=yonah < %s +; RUN: llc -mtriple=i686-apple-ios -mcpu=yonah < %s ; rdar://12868039 define void @t() nounwind ssp { diff --git a/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll b/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll index c465527bd86..e9daa39c5ee 100644 --- a/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll +++ b/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 -mtriple=i686-pc-win32 +; RUN: llc < %s -mcpu=corei7 -mtriple=i686-pc-win32 ; Make sure we don't crash on this testcase. diff --git a/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll b/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll index 920341799d6..55b8a9956d2 100644 --- a/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll +++ b/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; Make sure this doesn't crash diff --git a/llvm/test/CodeGen/X86/2014-05-29-factorial.ll b/llvm/test/CodeGen/X86/2014-05-29-factorial.ll index 987a21d34ea..6d7bc3918f2 100644 --- a/llvm/test/CodeGen/X86/2014-05-29-factorial.ll +++ b/llvm/test/CodeGen/X86/2014-05-29-factorial.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: decq [[X:%rdi|%rcx]] ; CHECK-NOT: testq [[X]], [[X]] diff --git a/llvm/test/CodeGen/X86/3dnow-intrinsics.ll b/llvm/test/CodeGen/X86/3dnow-intrinsics.ll index fe8b95ec465..6817df4b1d1 100644 --- a/llvm/test/CodeGen/X86/3dnow-intrinsics.ll +++ b/llvm/test/CodeGen/X86/3dnow-intrinsics.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+3dnow | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+3dnow | FileCheck %s define <8 x i8> @test_pavgusb(x86_mmx %a.coerce, x86_mmx %b.coerce) nounwind readnone { ; CHECK: pavgusb diff --git a/llvm/test/CodeGen/X86/4char-promote.ll b/llvm/test/CodeGen/X86/4char-promote.ll index 4f1a859fd43..bfe025eaa91 100644 --- a/llvm/test/CodeGen/X86/4char-promote.ll +++ b/llvm/test/CodeGen/X86/4char-promote.ll @@ -1,5 +1,5 @@ ; A test for checking PR 9623 -; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s +; RUN: llc -mcpu=corei7 < %s | FileCheck %s target triple = "x86_64-apple-darwin" diff --git a/llvm/test/CodeGen/X86/AppendingLinkage.ll b/llvm/test/CodeGen/X86/AppendingLinkage.ll index 1a49287d1b3..5ab49a28e96 100644 --- a/llvm/test/CodeGen/X86/AppendingLinkage.ll +++ b/llvm/test/CodeGen/X86/AppendingLinkage.ll @@ -1,4 +1,4 @@ -; RUN: not llc < %s -march=x86 2>&1 | FileCheck %s +; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s ; CHECK: unknown special variable @foo = appending constant [1 x i32 ]zeroinitializer diff --git a/llvm/test/CodeGen/X86/Atomics-64.ll b/llvm/test/CodeGen/X86/Atomics-64.ll index 6d367a71d01..b5748730548 100644 --- a/llvm/test/CodeGen/X86/Atomics-64.ll +++ b/llvm/test/CodeGen/X86/Atomics-64.ll @@ -1,7 +1,6 @@ -; RUN: llc < %s -march=x86-64 > %t.x86-64 -; RUN: llc < %s -march=x86 -mattr=cx16 > %t.x86 +; RUN: llc < %s -mtriple=x86_64-apple-darwin8 > %t.x86-64 +; RUN: llc < %s -mtriple=i686-apple-darwin8 -mattr=cx16 > %t.x86 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-apple-darwin8" @sc = common global i8 0 @uc = common global i8 0 diff --git a/llvm/test/CodeGen/X86/DbgValueOtherTargets.test b/llvm/test/CodeGen/X86/DbgValueOtherTargets.test index 7b4d431c93b..02f56823fd1 100644 --- a/llvm/test/CodeGen/X86/DbgValueOtherTargets.test +++ b/llvm/test/CodeGen/X86/DbgValueOtherTargets.test @@ -1,2 +1,2 @@ -RUN: llc -O0 -march=x86 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll -RUN: llc -O0 -march=x86-64 -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll +RUN: llc -O0 -mtriple=i686-- -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll +RUN: llc -O0 -mtriple=x86_64-- -asm-verbose < %S/../Inputs/DbgValueOtherTargets.ll | FileCheck %S/../Inputs/DbgValueOtherTargets.ll diff --git a/llvm/test/CodeGen/X86/SwitchLowering.ll b/llvm/test/CodeGen/X86/SwitchLowering.ll index 5f17d9d8572..6ee5152c040 100644 --- a/llvm/test/CodeGen/X86/SwitchLowering.ll +++ b/llvm/test/CodeGen/X86/SwitchLowering.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep cmp | count 1 +; RUN: llc < %s -mtriple=i686-- | grep cmp | count 1 ; PR964 define i8* @FindChar(i8* %CurPtr) { diff --git a/llvm/test/CodeGen/X86/TruncAssertZext.ll b/llvm/test/CodeGen/X86/TruncAssertZext.ll index 8c664127f92..3d92cb045ae 100644 --- a/llvm/test/CodeGen/X86/TruncAssertZext.ll +++ b/llvm/test/CodeGen/X86/TruncAssertZext.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O2 -march=x86-64 | FileCheck %s +; RUN: llc < %s -O2 -mtriple=x86_64-- | FileCheck %s ; Checks that a zeroing mov is inserted for the trunc/zext pair even when ; the source of the zext is an AssertSext node ; PR20494 diff --git a/llvm/test/CodeGen/X86/abi-isel.ll b/llvm/test/CodeGen/X86/abi-isel.ll index 742041a974b..47f95fde57b 100644 --- a/llvm/test/CodeGen/X86/abi-isel.ll +++ b/llvm/test/CodeGen/X86/abi-isel.ll @@ -1,16 +1,16 @@ -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -march=x86-64 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin -march=x86 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -march=x86 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -march=x86 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=i686-apple-darwin9 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC -; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -march=x86-64 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC +; RUN: llc < %s -asm-verbose=0 -mcpu=generic -mtriple=x86_64-apple-darwin -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC @src = external global [131072 x i32] @dst = external global [131072 x i32] diff --git a/llvm/test/CodeGen/X86/add.ll b/llvm/test/CodeGen/X86/add.ll index df1bc9b6ee7..fcdf15f7976 100644 --- a/llvm/test/CodeGen/X86/add.ll +++ b/llvm/test/CodeGen/X86/add.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 diff --git a/llvm/test/CodeGen/X86/add_shl_constant.ll b/llvm/test/CodeGen/X86/add_shl_constant.ll index 33074e4780e..b783a51c2ee 100644 --- a/llvm/test/CodeGen/X86/add_shl_constant.ll +++ b/llvm/test/CodeGen/X86/add_shl_constant.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -mtriple=x86_64-apple-darwin < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s ; CHECK-LABEL: add_shl_add_constant_1_i32 ; CHECK: leal 984(%rsi,%rdi,8), %eax diff --git a/llvm/test/CodeGen/X86/addr-of-ret-addr.ll b/llvm/test/CodeGen/X86/addr-of-ret-addr.ll index 7423e7161c8..67ebb7f9d78 100644 --- a/llvm/test/CodeGen/X86/addr-of-ret-addr.ll +++ b/llvm/test/CodeGen/X86/addr-of-ret-addr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -disable-fp-elim -march=x86 | FileCheck %s --check-prefix=CHECK-X86 -; RUN: llc < %s -disable-fp-elim -march=x86-64 | FileCheck %s --check-prefix=CHECK-X64 +; RUN: llc < %s -disable-fp-elim -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-X86 +; RUN: llc < %s -disable-fp-elim -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-X64 define i8* @f() nounwind readnone optsize { entry: diff --git a/llvm/test/CodeGen/X86/aligned-comm.ll b/llvm/test/CodeGen/X86/aligned-comm.ll index eab02cc1f9d..1192b72c48d 100644 --- a/llvm/test/CodeGen/X86/aligned-comm.ll +++ b/llvm/test/CodeGen/X86/aligned-comm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; RUN: llc < %s -mtriple=i386-apple-darwin10 | grep "array,16512,7" ; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep "array,16512,7" diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll index 2b5a205086e..00217997053 100644 --- a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll +++ b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s declare void @bar(<2 x i64>* %n) diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding.ll b/llvm/test/CodeGen/X86/alloca-align-rounding.ll index 9d8b6cfa673..7bc485eb238 100644 --- a/llvm/test/CodeGen/X86/alloca-align-rounding.ll +++ b/llvm/test/CodeGen/X86/alloca-align-rounding.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mtriple=i686-pc-linux -enable-misched=false | FileCheck %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI +; RUN: llc < %s -mtriple=x86_64-pc-linux -enable-misched=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI declare void @bar(<2 x i64>* %n) diff --git a/llvm/test/CodeGen/X86/and-su.ll b/llvm/test/CodeGen/X86/and-su.ll index bdbab153501..7e87e7b4b40 100644 --- a/llvm/test/CodeGen/X86/and-su.ll +++ b/llvm/test/CodeGen/X86/and-su.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; Don't duplicate the load. diff --git a/llvm/test/CodeGen/X86/andimm8.ll b/llvm/test/CodeGen/X86/andimm8.ll index d9e676aa66c..36f634897f9 100644 --- a/llvm/test/CodeGen/X86/andimm8.ll +++ b/llvm/test/CodeGen/X86/andimm8.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s ; PR8365 ; CHECK: andl $-64, %edi # encoding: [0x83,0xe7,0xc0] diff --git a/llvm/test/CodeGen/X86/asm-global-imm.ll b/llvm/test/CodeGen/X86/asm-global-imm.ll index 82610114ad3..a971882a444 100644 --- a/llvm/test/CodeGen/X86/asm-global-imm.ll +++ b/llvm/test/CodeGen/X86/asm-global-imm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s +; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s ; PR882 target datalayout = "e-p:32:32" diff --git a/llvm/test/CodeGen/X86/asm-modifier-P.ll b/llvm/test/CodeGen/X86/asm-modifier-P.ll index 0aa55556d8f..ae7155034cc 100644 --- a/llvm/test/CodeGen/X86/asm-modifier-P.ll +++ b/llvm/test/CodeGen/X86/asm-modifier-P.ll @@ -1,12 +1,11 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32 -; RUN: llc < %s -march=x86 -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32 -; RUN: llc < %s -march=x86-64 -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64 -; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64 +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32 +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64 +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64 ; PR3379 ; XFAIL: * target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" @G = external global i32 ; <i32*> [#uses=1] declare void @bar(...) diff --git a/llvm/test/CodeGen/X86/atom-cmpb.ll b/llvm/test/CodeGen/X86/atom-cmpb.ll index baf0f5e87fc..e1894cb58d0 100644 --- a/llvm/test/CodeGen/X86/atom-cmpb.ll +++ b/llvm/test/CodeGen/X86/atom-cmpb.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s ; CHECK: movl ; CHECK: movb ; CHECK: movb diff --git a/llvm/test/CodeGen/X86/atom-sched.ll b/llvm/test/CodeGen/X86/atom-sched.ll index bddb015a0dd..19249ab684a 100644 --- a/llvm/test/CodeGen/X86/atom-sched.ll +++ b/llvm/test/CodeGen/X86/atom-sched.ll @@ -1,7 +1,7 @@ -; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s -; RUN: llc <%s -O2 -mcpu=slm -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s -; RUN: llc <%s -O2 -mcpu=goldmont -march=x86 -relocation-model=static | FileCheck -check-prefix=slm %s -; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s +; RUN: llc <%s -O2 -mcpu=atom -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=atom %s +; RUN: llc <%s -O2 -mcpu=slm -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s +; RUN: llc <%s -O2 -mcpu=goldmont -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s +; RUN: llc <%s -O2 -mcpu=core2 -mtriple=i686-- -relocation-model=static | FileCheck %s ; @a = common global i32 0, align 4 diff --git a/llvm/test/CodeGen/X86/atomic-dagsched.ll b/llvm/test/CodeGen/X86/atomic-dagsched.ll index 97bb1afa47a..15cf96f473c 100644 --- a/llvm/test/CodeGen/X86/atomic-dagsched.ll +++ b/llvm/test/CodeGen/X86/atomic-dagsched.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s define void @test(i8** %a, i64* %b, i64 %c, i64 %d) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll index df0af5f7f27..6940e8a7d40 100644 --- a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll +++ b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=corei7 -march=x86 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s ; 64-bit load/store on x86-32 ; FIXME: The generated code can be substantially improved. diff --git a/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll b/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll index 1a6fde371f0..12fc53642b6 100644 --- a/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll +++ b/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86 -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX -; RUN: llc -march=x86 -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC +; RUN: llc -mattr=+cmov,cx16 -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX +; RUN: llc -mattr=cx16 -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC @sc64 = external global i64 diff --git a/llvm/test/CodeGen/X86/atomic-or.ll b/llvm/test/CodeGen/X86/atomic-or.ll index 60e9968bdc7..690ddd19a1a 100644 --- a/llvm/test/CodeGen/X86/atomic-or.ll +++ b/llvm/test/CodeGen/X86/atomic-or.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s ; rdar://9692967 diff --git a/llvm/test/CodeGen/X86/atomic32.ll b/llvm/test/CodeGen/X86/atomic32.ll index d514ac7b311..6a18e6a41ca 100644 --- a/llvm/test/CodeGen/X86/atomic32.ll +++ b/llvm/test/CodeGen/X86/atomic32.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV -; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV -; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV +; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV +; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefix=WITH-CMOV +; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV @sc32 = external global i32 diff --git a/llvm/test/CodeGen/X86/atomic64.ll b/llvm/test/CodeGen/X86/atomic64.ll index c6b1c39d35d..3df34af9bd7 100644 --- a/llvm/test/CodeGen/X86/atomic64.ll +++ b/llvm/test/CodeGen/X86/atomic64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 +; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 @sc64 = external global i64 diff --git a/llvm/test/CodeGen/X86/atomic6432.ll b/llvm/test/CodeGen/X86/atomic6432.ll index 5a78934eb3f..37434ae7b19 100644 --- a/llvm/test/CodeGen/X86/atomic6432.ll +++ b/llvm/test/CodeGen/X86/atomic6432.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 +; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 @sc64 = external global i64 diff --git a/llvm/test/CodeGen/X86/atomic8.ll b/llvm/test/CodeGen/X86/atomic8.ll index 01123ae9b07..c78a919dcb3 100644 --- a/llvm/test/CodeGen/X86/atomic8.ll +++ b/llvm/test/CodeGen/X86/atomic8.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 -; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 +; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 +; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 @sc8 = external global i8 diff --git a/llvm/test/CodeGen/X86/atomic_add.ll b/llvm/test/CodeGen/X86/atomic_add.ll index f60212de533..86d950abc07 100644 --- a/llvm/test/CodeGen/X86/atomic_add.ll +++ b/llvm/test/CodeGen/X86/atomic_add.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s -; RUN: llc < %s -march=x86-64 -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC +; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC ; rdar://7103704 diff --git a/llvm/test/CodeGen/X86/atomic_idempotent.ll b/llvm/test/CodeGen/X86/atomic_idempotent.ll index 1afc535133d..cc5563a422a 100644 --- a/llvm/test/CodeGen/X86/atomic_idempotent.ll +++ b/llvm/test/CodeGen/X86/atomic_idempotent.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X64 -; RUN: llc < %s -march=x86 -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X64 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=X32 ; On x86, an atomic rmw operation that does not modify the value in memory ; (such as atomic add 0) can be replaced by an mfence followed by a mov. diff --git a/llvm/test/CodeGen/X86/atomic_op.ll b/llvm/test/CodeGen/X86/atomic_op.ll index aa895dedfe4..fe724a8f669 100644 --- a/llvm/test/CodeGen/X86/atomic_op.ll +++ b/llvm/test/CodeGen/X86/atomic_op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/avoid-loop-align-2.ll b/llvm/test/CodeGen/X86/avoid-loop-align-2.ll index e02f3569c89..7e5927e6ee3 100644 --- a/llvm/test/CodeGen/X86/avoid-loop-align-2.ll +++ b/llvm/test/CodeGen/X86/avoid-loop-align-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep align | count 4 +; RUN: llc < %s -mtriple=i686-- | grep align | count 4 ; TODO: Is it a good idea to align inner loops? It's hard to know without ; knowing what their trip counts are, or other dynamic information. For diff --git a/llvm/test/CodeGen/X86/avx-minmax.ll b/llvm/test/CodeGen/X86/avx-minmax.ll index c94962b74ed..002d99fd8eb 100644 --- a/llvm/test/CodeGen/X86/avx-minmax.ll +++ b/llvm/test/CodeGen/X86/avx-minmax.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s ; UNSAFE-LABEL: maxpd: ; UNSAFE: vmaxpd {{.+}}, %xmm diff --git a/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll b/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll index e66eefdb8e9..acb3f121c8d 100644 --- a/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll +++ b/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/avx512-build-vector.ll b/llvm/test/CodeGen/X86/avx512-build-vector.ll index 618507a08bb..509f65fc6d9 100644 --- a/llvm/test/CodeGen/X86/avx512-build-vector.ll +++ b/llvm/test/CodeGen/X86/avx512-build-vector.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s define <16 x i32> @test2(<16 x i32> %x) { ; CHECK-LABEL: test2: diff --git a/llvm/test/CodeGen/X86/avx512-inc-dec.ll b/llvm/test/CodeGen/X86/avx512-inc-dec.ll index 5183c9d0fb8..4fa4f27beb7 100644 --- a/llvm/test/CodeGen/X86/avx512-inc-dec.ll +++ b/llvm/test/CodeGen/X86/avx512-inc-dec.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s ;CHECK-LABEL: test ;CHECK-NOT: dec diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll index f75c329d10e..d26572fa316 100644 --- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll +++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=KNL %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_ONLY %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=avx512vbmi | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_VBMI %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck --check-prefix=CHECK --check-prefix=KNL %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_ONLY %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=avx512vbmi | FileCheck --check-prefix=CHECK --check-prefix=SKX --check-prefix=SKX_VBMI %s define <16 x float> @test1(<16 x float> %x, float* %br, float %y) nounwind { ; CHECK-LABEL: test1: diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll b/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll index e36fad345b1..e46da674c0a 100644 --- a/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll +++ b/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX --check-prefix=SKX_ONLY %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX --check-prefix=SKX_ONLY %s ; TODO - fix fail on KNL and move this test to avx512-insert-extract.ll diff --git a/llvm/test/CodeGen/X86/avx512-mask-op.ll b/llvm/test/CodeGen/X86/avx512-mask-op.ll index e71367cc6f0..d55d728a240 100644 --- a/llvm/test/CodeGen/X86/avx512-mask-op.ll +++ b/llvm/test/CodeGen/X86/avx512-mask-op.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=x86_64-apple-darwin -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ define i16 @mask16(i16 %x) { diff --git a/llvm/test/CodeGen/X86/avx512-mov.ll b/llvm/test/CodeGen/X86/avx512-mov.ll index df988185efc..732cc07496a 100644 --- a/llvm/test/CodeGen/X86/avx512-mov.ll +++ b/llvm/test/CodeGen/X86/avx512-mov.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s define i32 @test1(float %x) { ; CHECK-LABEL: test1: diff --git a/llvm/test/CodeGen/X86/avx512-nontemporal.ll b/llvm/test/CodeGen/X86/avx512-nontemporal.ll index adfaef25b7d..5603d408da2 100644 --- a/llvm/test/CodeGen/X86/avx512-nontemporal.ll +++ b/llvm/test/CodeGen/X86/avx512-nontemporal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+avx512f,+avx512bw | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s define void @f(<16 x float> %A, <16 x float> %AA, i8* %B, <8 x double> %C, <8 x double> %CC, <8 x i64> %E, <8 x i64> %EE, <16 x i32> %F, <16 x i32> %FF, <32 x i16> %G, <32 x i16> %GG, <64 x i8> %H, <64 x i8> %HH) { ; CHECK: vmovntps %z diff --git a/llvm/test/CodeGen/X86/avx512bw-mov.ll b/llvm/test/CodeGen/X86/avx512bw-mov.ll index 03d4314bd70..5080f977680 100644 --- a/llvm/test/CodeGen/X86/avx512bw-mov.ll +++ b/llvm/test/CodeGen/X86/avx512bw-mov.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s define <64 x i8> @test1(i8 * %addr) { ; CHECK-LABEL: test1: diff --git a/llvm/test/CodeGen/X86/avx512bwvl-mov.ll b/llvm/test/CodeGen/X86/avx512bwvl-mov.ll index 8ceeed799c6..16ae9a2b5a4 100644 --- a/llvm/test/CodeGen/X86/avx512bwvl-mov.ll +++ b/llvm/test/CodeGen/X86/avx512bwvl-mov.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s define <32 x i8> @test_256_1(i8 * %addr) { ; CHECK-LABEL: test_256_1: diff --git a/llvm/test/CodeGen/X86/avx512vl-mov.ll b/llvm/test/CodeGen/X86/avx512vl-mov.ll index af449d6628c..322fc55933b 100644 --- a/llvm/test/CodeGen/X86/avx512vl-mov.ll +++ b/llvm/test/CodeGen/X86/avx512vl-mov.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s define <8 x i32> @test_256_1(i8 * %addr) { ; CHECK-LABEL: test_256_1: diff --git a/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll b/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll index a55958a7345..066a49568bf 100644 --- a/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll +++ b/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s define void @f256(<8 x float> %A, <8 x float> %AA, i8* %B, <4 x double> %C, <4 x double> %CC, i32 %D, <4 x i64> %E, <4 x i64> %EE) { ; CHECK: vmovntps %ymm{{.*}} ## EVEX TO VEX Compression encoding: [0xc5 diff --git a/llvm/test/CodeGen/X86/barrier.ll b/llvm/test/CodeGen/X86/barrier.ll index 1f60131f33c..9031a0eb012 100644 --- a/llvm/test/CodeGen/X86/barrier.ll +++ b/llvm/test/CodeGen/X86/barrier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s define void @test() { ; CHECK: lock diff --git a/llvm/test/CodeGen/X86/basic-promote-integers.ll b/llvm/test/CodeGen/X86/basic-promote-integers.ll index fce6b7f5565..739727100a7 100644 --- a/llvm/test/CodeGen/X86/basic-promote-integers.ll +++ b/llvm/test/CodeGen/X86/basic-promote-integers.ll @@ -1,7 +1,7 @@ ; Test that vectors are scalarized/lowered correctly ; (with both legalization methods). -; RUN: llc -march=x86 < %s -; RUN: llc -march=x86 < %s +; RUN: llc -mtriple=i686-- < %s +; RUN: llc -mtriple=i686-- < %s ; A simple test to check copyToParts and copyFromParts. diff --git a/llvm/test/CodeGen/X86/bigstructret2.ll b/llvm/test/CodeGen/X86/bigstructret2.ll index 6a79139d9bc..be41cd335f6 100644 --- a/llvm/test/CodeGen/X86/bigstructret2.ll +++ b/llvm/test/CodeGen/X86/bigstructret2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s ; CHECK: .cfi_startproc ; CHECK: .cfi_def_cfa_offset 8 diff --git a/llvm/test/CodeGen/X86/bit-test-shift.ll b/llvm/test/CodeGen/X86/bit-test-shift.ll index 7497613f256..8970db4027e 100644 --- a/llvm/test/CodeGen/X86/bit-test-shift.ll +++ b/llvm/test/CodeGen/X86/bit-test-shift.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; <rdar://problem/8285015> define i32 @x(i32 %t) nounwind readnone ssp { diff --git a/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll b/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll index 4c25979dcd5..68f4033952a 100644 --- a/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll +++ b/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define i1 @foo(i64 %a) { diff --git a/llvm/test/CodeGen/X86/bitcast.ll b/llvm/test/CodeGen/X86/bitcast.ll index c34c6753bfe..0866a0b1b2b 100644 --- a/llvm/test/CodeGen/X86/bitcast.ll +++ b/llvm/test/CodeGen/X86/bitcast.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=i686-- +; RUN: llc < %s -mtriple=x86_64-- ; PR1033 define i64 @test1(double %t) { diff --git a/llvm/test/CodeGen/X86/bitcast2.ll b/llvm/test/CodeGen/X86/bitcast2.ll index b75db95869c..febd7ba12db 100644 --- a/llvm/test/CodeGen/X86/bitcast2.ll +++ b/llvm/test/CodeGen/X86/bitcast2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=-avx | grep movq | count 2 -; RUN: llc < %s -march=x86-64 -mattr=-avx | not grep rsp +; RUN: llc < %s -mtriple=x86_64-- -mattr=-avx | grep movq | count 2 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-avx | not grep rsp define i64 @test1(double %A) { %B = bitcast double %A to i64 diff --git a/llvm/test/CodeGen/X86/branchfolding-undef.mir b/llvm/test/CodeGen/X86/branchfolding-undef.mir index 1a7dfb94187..1062b343338 100644 --- a/llvm/test/CodeGen/X86/branchfolding-undef.mir +++ b/llvm/test/CodeGen/X86/branchfolding-undef.mir @@ -1,4 +1,4 @@ -# RUN: llc -o - %s -march=x86 -run-pass branch-folder | FileCheck %s +# RUN: llc -o - %s -mtriple=i686-- -run-pass branch-folder | FileCheck %s # Test that tail merging drops undef flags that aren't present on all # instructions to be merged. --- | diff --git a/llvm/test/CodeGen/X86/break-anti-dependencies.ll b/llvm/test/CodeGen/X86/break-anti-dependencies.ll index c54ac108819..e8e27092478 100644 --- a/llvm/test/CodeGen/X86/break-anti-dependencies.ll +++ b/llvm/test/CodeGen/X86/break-anti-dependencies.ll @@ -1,10 +1,10 @@ ; Without list-burr scheduling we may not see the difference in codegen here. ; Use a subtarget that has post-RA scheduling enabled because the anti-dependency ; breaker requires liveness information to be kept. -; RUN: llc < %s -march=x86-64 -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t +; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t ; RUN: grep "%xmm0" %t | count 14 ; RUN: not grep "%xmm1" %t -; RUN: llc < %s -march=x86-64 -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical > %t +; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical > %t ; RUN: grep "%xmm0" %t | count 7 ; RUN: grep "%xmm1" %t | count 7 diff --git a/llvm/test/CodeGen/X86/bss_pagealigned.ll b/llvm/test/CodeGen/X86/bss_pagealigned.ll index 4e9f9241011..0a3bd014937 100644 --- a/llvm/test/CodeGen/X86/bss_pagealigned.ll +++ b/llvm/test/CodeGen/X86/bss_pagealigned.ll @@ -1,4 +1,4 @@ -; RUN: llc --code-model=kernel -march=x86-64 <%s -asm-verbose=0 | FileCheck %s +; RUN: llc --code-model=kernel <%s -asm-verbose=0 | FileCheck %s ; PR4933 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/bswap.ll b/llvm/test/CodeGen/X86/bswap.ll index 48dc18e0ac1..336aca9a0dd 100644 --- a/llvm/test/CodeGen/X86/bswap.ll +++ b/llvm/test/CodeGen/X86/bswap.ll @@ -1,7 +1,7 @@ ; bswap should be constant folded when it is passed a constant argument -; RUN: llc < %s -march=x86 -mcpu=i686 | FileCheck %s -; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK64 +; RUN: llc < %s -mtriple=i686-- -mcpu=i686 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK64 declare i16 @llvm.bswap.i16(i16) diff --git a/llvm/test/CodeGen/X86/byval.ll b/llvm/test/CodeGen/X86/byval.ll index f29511a54c4..35966203857 100644 --- a/llvm/test/CodeGen/X86/byval.ll +++ b/llvm/test/CodeGen/X86/byval.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s ; Win64 has not supported byval yet. -; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s +; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s ; X86: movl 4(%esp), %eax ; X86: movl 8(%esp), %edx diff --git a/llvm/test/CodeGen/X86/byval2.ll b/llvm/test/CodeGen/X86/byval2.ll index 5eb8b590e8d..666caf19965 100644 --- a/llvm/test/CodeGen/X86/byval2.ll +++ b/llvm/test/CodeGen/X86/byval2.ll @@ -12,7 +12,7 @@ ; Win64 has not supported byval yet. -; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32 ; X32-NOT: movsl ; X32: rep ; X32-NOT: rep diff --git a/llvm/test/CodeGen/X86/byval3.ll b/llvm/test/CodeGen/X86/byval3.ll index 85ecdaf1c67..e1741d2e813 100644 --- a/llvm/test/CodeGen/X86/byval3.ll +++ b/llvm/test/CodeGen/X86/byval3.ll @@ -12,7 +12,7 @@ ; Win64 has not supported byval yet. -; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32 ; X32-NOT: movsl ; X32: rep ; X32-NOT: rep diff --git a/llvm/test/CodeGen/X86/byval4.ll b/llvm/test/CodeGen/X86/byval4.ll index 1e436f7903a..eaf7e60b192 100644 --- a/llvm/test/CodeGen/X86/byval4.ll +++ b/llvm/test/CodeGen/X86/byval4.ll @@ -12,7 +12,7 @@ ; Win64 has not supported byval yet. -; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32 ; X32-NOT: movsl ; X32: rep ; X32-NOT: rep diff --git a/llvm/test/CodeGen/X86/byval5.ll b/llvm/test/CodeGen/X86/byval5.ll index 6d734a44b3c..c93edac9787 100644 --- a/llvm/test/CodeGen/X86/byval5.ll +++ b/llvm/test/CodeGen/X86/byval5.ll @@ -12,7 +12,7 @@ ; Win64 has not supported byval yet. -; RUN: llc < %s -march=x86 -mattr=-avx | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X32 ; X32-NOT: movsl ; X32: rep ; X32-NOT: rep diff --git a/llvm/test/CodeGen/X86/byval6.ll b/llvm/test/CodeGen/X86/byval6.ll index c3e7b7ef435..d3bd1ff9a08 100644 --- a/llvm/test/CodeGen/X86/byval6.ll +++ b/llvm/test/CodeGen/X86/byval6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 | grep add | not grep 16 +; RUN: llc < %s -mcpu=generic -mtriple=i686-- | grep add | not grep 16 %struct.W = type { x86_fp80, x86_fp80 } @B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32 diff --git a/llvm/test/CodeGen/X86/byval7.ll b/llvm/test/CodeGen/X86/byval7.ll index 8d5dd8c5887..584a6a449ff 100644 --- a/llvm/test/CodeGen/X86/byval7.ll +++ b/llvm/test/CodeGen/X86/byval7.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s %struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, diff --git a/llvm/test/CodeGen/X86/call-imm.ll b/llvm/test/CodeGen/X86/call-imm.ll index 898b4ec203a..a91b582caff 100644 --- a/llvm/test/CodeGen/X86/call-imm.ll +++ b/llvm/test/CodeGen/X86/call-imm.ll @@ -6,7 +6,7 @@ ; Call to immediate is not safe on x86-64 unless we *know* that the ; call will be within 32-bits pcrel from the dest immediate. -; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix X64 %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix X64 %s ; PR3666 ; PR3773 diff --git a/llvm/test/CodeGen/X86/catchpad-weight.ll b/llvm/test/CodeGen/X86/catchpad-weight.ll index 6caf0c6012f..a4b6f6f0edb 100644 --- a/llvm/test/CodeGen/X86/catchpad-weight.ll +++ b/llvm/test/CodeGen/X86/catchpad-weight.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s +; RUN: llc -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s ; Check if the edge weight to the catchpad is calculated correctly. diff --git a/llvm/test/CodeGen/X86/change-compare-stride-1.ll b/llvm/test/CodeGen/X86/change-compare-stride-1.ll index c5480ba2b49..fe4fa1b026b 100644 --- a/llvm/test/CodeGen/X86/change-compare-stride-1.ll +++ b/llvm/test/CodeGen/X86/change-compare-stride-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -enable-lsr-nested | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -enable-lsr-nested | FileCheck %s ; ; Nested LSR is required to optimize this case. ; We do not expect to see this form of IR without -enable-iv-rewrite. diff --git a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll index 63733abc5f3..5f3c17b3279 100644 --- a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll +++ b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s ; The comparison happens after the relevant use, so the stride can easily ; be changed. The comparison can be done in a narrower mode than the diff --git a/llvm/test/CodeGen/X86/cmov-fp.ll b/llvm/test/CodeGen/X86/cmov-fp.ll index 768af943eb4..d32ccffe493 100644 --- a/llvm/test/CodeGen/X86/cmov-fp.ll +++ b/llvm/test/CodeGen/X86/cmov-fp.ll @@ -1,7 +1,7 @@ -; RUN: llc -march x86 -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE -; RUN: llc -march x86 -mcpu pentium3 < %s | FileCheck %s -check-prefix=NOSSE2 -; RUN: llc -march x86 -mcpu pentium2 < %s | FileCheck %s -check-prefix=NOSSE1 -; RUN: llc -march x86 -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV +; RUN: llc -mtriple=i686-- -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE +; RUN: llc -mtriple=i686-- -mcpu pentium3 < %s | FileCheck %s -check-prefix=NOSSE2 +; RUN: llc -mtriple=i686-- -mcpu pentium2 < %s | FileCheck %s -check-prefix=NOSSE1 +; RUN: llc -mtriple=i686-- -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV ; PR14035 define double @test1(i32 %a, i32 %b, double %x) nounwind { diff --git a/llvm/test/CodeGen/X86/cmpxchg16b.ll b/llvm/test/CodeGen/X86/cmpxchg16b.ll index d514c0a35f5..f070a4682ec 100644 --- a/llvm/test/CodeGen/X86/cmpxchg16b.ll +++ b/llvm/test/CodeGen/X86/cmpxchg16b.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s ; Basic 128-bit cmpxchg define void @t1(i128* nocapture %p) nounwind ssp { diff --git a/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll b/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll index 8a325c4cbdb..b500484a4c8 100644 --- a/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll +++ b/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -stackrealign -O2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -stackrealign -O2 | FileCheck %s ; PR28755 ; Check that register allocator is able to handle that diff --git a/llvm/test/CodeGen/X86/code_placement.ll b/llvm/test/CodeGen/X86/code_placement.ll index 7d235848005..7b5f4c34690 100644 --- a/llvm/test/CodeGen/X86/code_placement.ll +++ b/llvm/test/CodeGen/X86/code_placement.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s @Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5] @Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4] diff --git a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll index c5c2d64f63d..08371d8fa56 100644 --- a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll +++ b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s ; PR4297 ; RUN: opt -S < %s -codegenprepare | FileCheck %s diff --git a/llvm/test/CodeGen/X86/combine-lds.ll b/llvm/test/CodeGen/X86/combine-lds.ll index b49d081a64f..f2c81a4959b 100644 --- a/llvm/test/CodeGen/X86/combine-lds.ll +++ b/llvm/test/CodeGen/X86/combine-lds.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep fldl | count 1 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep fldl | count 1 define double @doload64(i64 %x) nounwind { %tmp717 = bitcast i64 %x to double diff --git a/llvm/test/CodeGen/X86/compare-add.ll b/llvm/test/CodeGen/X86/compare-add.ll index 358ee59c95a..51e47ea4a71 100644 --- a/llvm/test/CodeGen/X86/compare-add.ll +++ b/llvm/test/CodeGen/X86/compare-add.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep add +; RUN: llc < %s -mtriple=i686-- | not grep add define i1 @X(i32 %X) { %Y = add i32 %X, 14 ; <i32> [#uses=1] diff --git a/llvm/test/CodeGen/X86/compare-inf.ll b/llvm/test/CodeGen/X86/compare-inf.ll index 5eb0135277d..5beec4d76e2 100644 --- a/llvm/test/CodeGen/X86/compare-inf.ll +++ b/llvm/test/CodeGen/X86/compare-inf.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; Convert oeq and une to ole/oge/ule/uge when comparing with infinity ; and negative infinity, because those are more efficient on x86. diff --git a/llvm/test/CodeGen/X86/compare_folding.ll b/llvm/test/CodeGen/X86/compare_folding.ll index 84c152d7721..0f85d644a3e 100644 --- a/llvm/test/CodeGen/X86/compare_folding.ll +++ b/llvm/test/CodeGen/X86/compare_folding.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | \ +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | \ ; RUN: grep movsd | count 1 -; RUN: llc < %s -march=x86 -mcpu=yonah | \ +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | \ ; RUN: grep ucomisd declare i1 @llvm.isunordered.f64(double, double) diff --git a/llvm/test/CodeGen/X86/complex-fca.ll b/llvm/test/CodeGen/X86/complex-fca.ll index 78b27b7dc3f..d1da121213d 100644 --- a/llvm/test/CodeGen/X86/complex-fca.ll +++ b/llvm/test/CodeGen/X86/complex-fca.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/constant-hoisting-and.ll b/llvm/test/CodeGen/X86/constant-hoisting-and.ll index 611445f4a24..416a216d8fe 100644 --- a/llvm/test/CodeGen/X86/constant-hoisting-and.ll +++ b/llvm/test/CodeGen/X86/constant-hoisting-and.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s +; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s define i64 @foo(i1 %z, i64 %data1, i64 %data2) { ; If constant 4294967294 is hoisted to a variable, then we won't be able to use diff --git a/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll b/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll index 4e9e4948728..b90080003dd 100644 --- a/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll +++ b/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s +; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s define i64 @foo(i64 %data1, i64 %data2, i64 %data3) { ; If constant 4294967295 is hoisted to a variable, then we won't be able to diff --git a/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll b/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll index 65c26f818a6..e406de2af4a 100644 --- a/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll +++ b/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O3 -march=x86-64 |FileCheck %s +; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s define i64 @foo(i1 %z, i192* %p, i192* %q) { ; If const 128 is hoisted to a variable, then in basic block L_val2 we would diff --git a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll b/llvm/test/CodeGen/X86/constant-pool-remat-0.ll index e42a87c6acd..5722dcc93db 100644 --- a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll +++ b/llvm/test/CodeGen/X86/constant-pool-remat-0.ll @@ -10,7 +10,7 @@ ; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat ; X64stat: 6 asm-printer -; RUN: llc < %s -march=x86 -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat ; X32stat: 12 asm-printer declare float @qux(float %y) diff --git a/llvm/test/CodeGen/X86/constpool.ll b/llvm/test/CodeGen/X86/constpool.ll index 2aac486323a..5f81c75d4fa 100644 --- a/llvm/test/CodeGen/X86/constpool.ll +++ b/llvm/test/CodeGen/X86/constpool.ll @@ -1,11 +1,10 @@ -; RUN: llc < %s -; RUN: llc < %s -fast-isel -; RUN: llc < %s -march=x86-64 -; RUN: llc < %s -fast-isel -march=x86-64 +; RUN: llc < %s -mtriple=i386-apple-darwin9.7 +; RUN: llc < %s -mtriple=i386-apple-darwin9.7 -fast-isel +; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7 +; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7 -fast-isel ; PR4466 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9.7" define i32 @main() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/crash.ll b/llvm/test/CodeGen/X86/crash.ll index 4bdb2ddfab6..ea648e57b53 100644 --- a/llvm/test/CodeGen/X86/crash.ll +++ b/llvm/test/CodeGen/X86/crash.ll @@ -1,6 +1,6 @@ ; REQUIRES: asserts -; RUN: llc -march=x86 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness -; RUN: llc -march=x86-64 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness +; RUN: llc -mtriple=i686-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness +; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness ; PR6497 diff --git a/llvm/test/CodeGen/X86/cvt16.ll b/llvm/test/CodeGen/X86/cvt16.ll index 5ee399fc137..3679ebb6f9a 100644 --- a/llvm/test/CodeGen/X86/cvt16.ll +++ b/llvm/test/CodeGen/X86/cvt16.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c | FileCheck %s -check-prefix=CHECK -check-prefix=LIBCALL +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c | FileCheck %s -check-prefix=CHECK -check-prefix=F16C +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c,+soft-float | FileCheck %s -check-prefix=CHECK -check-prefix=SOFTFLOAT ; This is a test for float to half float conversions on x86-64. ; diff --git a/llvm/test/CodeGen/X86/dag-rauw-cse.ll b/llvm/test/CodeGen/X86/dag-rauw-cse.ll index 12a2e626687..5e6b6cf10e7 100644 --- a/llvm/test/CodeGen/X86/dag-rauw-cse.ll +++ b/llvm/test/CodeGen/X86/dag-rauw-cse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; PR3018 define i32 @test(i32 %A) nounwind { diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll index 7a19dd2a98d..395a3195929 100644 --- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86-64 -mtriple=x86_64-linux < %s | FileCheck %s -; RUN: opt -strip-debug < %s | llc -march=x86-64 -mtriple=x86_64-linux | FileCheck %s +; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s +; RUN: opt -strip-debug < %s | llc -mtriple=x86_64-linux | FileCheck %s ; http://llvm.org/PR19051. Minor code-motion difference with -g. ; Presence of debug info shouldn't affect the codegen. Make sure that ; we generated the same code sequence with and without debug info. diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll index bee86b4617c..3d01e07d79a 100644 --- a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; The Peephole optimizer should fold the load into the cmp even with debug info. ; CHECK-LABEL: _ZN3Foo3batEv diff --git a/llvm/test/CodeGen/X86/disable-tail-calls.ll b/llvm/test/CodeGen/X86/disable-tail-calls.ll index 80e8fd74e92..16f838e8fdc 100644 --- a/llvm/test/CodeGen/X86/disable-tail-calls.ll +++ b/llvm/test/CodeGen/X86/disable-tail-calls.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march x86-64 | FileCheck %s --check-prefix=NO-OPTION -; RUN: llc < %s -march x86-64 -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE -; RUN: llc < %s -march x86-64 -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION +; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE +; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE ; Check that command line option "-disable-tail-calls" overrides function ; attribute "disable-tail-calls". diff --git a/llvm/test/CodeGen/X86/discontiguous-loops.ll b/llvm/test/CodeGen/X86/discontiguous-loops.ll index 20db750d206..01ba4dffe33 100644 --- a/llvm/test/CodeGen/X86/discontiguous-loops.ll +++ b/llvm/test/CodeGen/X86/discontiguous-loops.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-loop-info -verify-dom-info -march=x86-64 < %s +; RUN: llc -verify-loop-info -verify-dom-info -mtriple=x86_64-- < %s ; PR5243 @.str96 = external constant [37 x i8], align 8 ; <[37 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/dollar-name.ll b/llvm/test/CodeGen/X86/dollar-name.ll index a31b806c031..78ca900c2b8 100644 --- a/llvm/test/CodeGen/X86/dollar-name.ll +++ b/llvm/test/CodeGen/X86/dollar-name.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux | FileCheck %s +; RUN: llc < %s -mtriple=i386-linux | FileCheck %s ; PR1339 @"$bar" = global i32 zeroinitializer diff --git a/llvm/test/CodeGen/X86/dont-trunc-store-double-to-float.ll b/llvm/test/CodeGen/X86/dont-trunc-store-double-to-float.ll index 05245d0d9e1..e9287b8b93d 100644 --- a/llvm/test/CodeGen/X86/dont-trunc-store-double-to-float.ll +++ b/llvm/test/CodeGen/X86/dont-trunc-store-double-to-float.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s ; CHECK-LABEL: @bar ; CHECK-DAG: movl $1074339512, diff --git a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll index b976a891867..37de41ea7db 100644 --- a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll +++ b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN +; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN ; rdar://11496434 ; no VLAs or dynamic alignment diff --git a/llvm/test/CodeGen/X86/empty-struct-return-type.ll b/llvm/test/CodeGen/X86/empty-struct-return-type.ll index 34cd5d92505..1bfc2f7f467 100644 --- a/llvm/test/CodeGen/X86/empty-struct-return-type.ll +++ b/llvm/test/CodeGen/X86/empty-struct-return-type.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep call +; RUN: llc < %s | grep call ; PR4688 ; Return types can be empty structs, which can be awkward. diff --git a/llvm/test/CodeGen/X86/emutls-pic.ll b/llvm/test/CodeGen/X86/emutls-pic.ll index 50dc72653ae..a83639d0f84 100644 --- a/llvm/test/CodeGen/X86/emutls-pic.ll +++ b/llvm/test/CodeGen/X86/emutls-pic.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s ; Use my_emutls_get_address like __emutls_get_address. @my_emutls_v_xyz = external global i8*, align 4 diff --git a/llvm/test/CodeGen/X86/emutls-pie.ll b/llvm/test/CodeGen/X86/emutls-pie.ll index 5db8c888a4e..3c312a92669 100644 --- a/llvm/test/CodeGen/X86/emutls-pie.ll +++ b/llvm/test/CodeGen/X86/emutls-pie.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X64 %s ; Use my_emutls_get_address like __emutls_get_address. diff --git a/llvm/test/CodeGen/X86/emutls.ll b/llvm/test/CodeGen/X86/emutls.ll index 9266fe962df..8c0ba903659 100644 --- a/llvm/test/CodeGen/X86/emutls.ll +++ b/llvm/test/CodeGen/X86/emutls.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86-linux-android | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s ; Copied from tls.ll; emulated TLS model is not implemented ; for *-pc-win32 and *-pc-winows targets yet. diff --git a/llvm/test/CodeGen/X86/emutls_generic.ll b/llvm/test/CodeGen/X86/emutls_generic.ll index 16d90001426..0c534f370ef 100644 --- a/llvm/test/CodeGen/X86/emutls_generic.ll +++ b/llvm/test/CodeGen/X86/emutls_generic.ll @@ -1,10 +1,10 @@ ; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X86_32 %s -; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -march=x86 -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X86_32 %s ; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X86_64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic \ ; RUN: | FileCheck %s ; Make sure that TLS symbols are emitted in expected order. diff --git a/llvm/test/CodeGen/X86/epilogue.ll b/llvm/test/CodeGen/X86/epilogue.ll index 090680e48fe..a4fa3e38dff 100644 --- a/llvm/test/CodeGen/X86/epilogue.ll +++ b/llvm/test/CodeGen/X86/epilogue.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s ; CHECK-NOT: lea{{.*}}(%esp) ; CHECK: {{(mov.* %ebp, %esp)|(lea.*\(%ebp\), %esp)}} diff --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir index 2295ddb5b2b..b8bc143a6ef 100755 --- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir +++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -run-pass x86-evex-to-vex-compress -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s +# RUN: llc -mtriple=x86_64-- -run-pass x86-evex-to-vex-compress -verify-machineinstrs -mcpu=skx -o - %s | FileCheck %s # This test verifies VEX encdoing for AVX-512 instructions that use registers of low inedexes and # do not use zmm or mask registers and have a corresponding AVX/AVX2 opcode diff --git a/llvm/test/CodeGen/X86/extend.ll b/llvm/test/CodeGen/X86/extend.ll index d349e782d5d..399d05eaa57 100644 --- a/llvm/test/CodeGen/X86/extend.ll +++ b/llvm/test/CodeGen/X86/extend.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movzx | count 1 -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep movsx | count 1 +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | grep movzx | count 1 +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | grep movsx | count 1 @G1 = internal global i8 0 ; <i8*> [#uses=1] @G2 = internal global i8 0 ; <i8*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/extended-fma-contraction.ll b/llvm/test/CodeGen/X86/extended-fma-contraction.ll index 858eabcb7dc..8ac47bd77f7 100644 --- a/llvm/test/CodeGen/X86/extended-fma-contraction.ll +++ b/llvm/test/CodeGen/X86/extended-fma-contraction.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma -mtriple=x86_64-apple-darwin < %s | FileCheck %s -; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA +; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s +; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA ; CHECK-LABEL: fmafunc define <3 x float> @fmafunc(<3 x float> %a, <3 x float> %b, <3 x float> %c) { diff --git a/llvm/test/CodeGen/X86/extmul128.ll b/llvm/test/CodeGen/X86/extmul128.ll index 9b598299e53..1ccdbb55059 100644 --- a/llvm/test/CodeGen/X86/extmul128.ll +++ b/llvm/test/CodeGen/X86/extmul128.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mul | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep mul | count 2 define i128 @i64_sext_i128(i64 %a, i64 %b) { %aa = sext i64 %a to i128 diff --git a/llvm/test/CodeGen/X86/extmul64.ll b/llvm/test/CodeGen/X86/extmul64.ll index 9e20ded1111..7e3d2fca74c 100644 --- a/llvm/test/CodeGen/X86/extmul64.ll +++ b/llvm/test/CodeGen/X86/extmul64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mul | count 2 +; RUN: llc < %s -mtriple=i686-- | grep mul | count 2 define i64 @i32_sext_i64(i32 %a, i32 %b) { %aa = sext i32 %a to i64 diff --git a/llvm/test/CodeGen/X86/extract-combine.ll b/llvm/test/CodeGen/X86/extract-combine.ll index 2040e872f7f..7b38a015780 100644 --- a/llvm/test/CodeGen/X86/extract-combine.ll +++ b/llvm/test/CodeGen/X86/extract-combine.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 -o %t +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -o %t ; RUN: not grep unpcklps %t define i32 @foo() nounwind { diff --git a/llvm/test/CodeGen/X86/extract-extract.ll b/llvm/test/CodeGen/X86/extract-extract.ll index 9f151635620..aeb3566cb1c 100644 --- a/llvm/test/CodeGen/X86/extract-extract.ll +++ b/llvm/test/CodeGen/X86/extract-extract.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 >/dev/null +; RUN: llc < %s -mtriple=i686-- >/dev/null ; PR4699 ; Handle this extractvalue-of-extractvalue case without getting in diff --git a/llvm/test/CodeGen/X86/extractelement-from-arg.ll b/llvm/test/CodeGen/X86/extractelement-from-arg.ll index 4ea37f0c46d..1f97d6b33f3 100644 --- a/llvm/test/CodeGen/X86/extractelement-from-arg.ll +++ b/llvm/test/CodeGen/X86/extractelement-from-arg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 define void @test(float* %R, <4 x float> %X) nounwind { %tmp = extractelement <4 x float> %X, i32 3 diff --git a/llvm/test/CodeGen/X86/extractps.ll b/llvm/test/CodeGen/X86/extractps.ll index 7d4c2cf619a..586099d7488 100644 --- a/llvm/test/CodeGen/X86/extractps.ll +++ b/llvm/test/CodeGen/X86/extractps.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=penryn > %t +; RUN: llc < %s -mtriple=i686-- -mcpu=penryn > %t ; RUN: not grep movd %t ; RUN: grep "movss %xmm" %t | count 1 ; RUN: grep "extractps \$1, %xmm0, " %t | count 1 diff --git a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll index 2c5b80ac4af..a0ec6ce25d7 100644 --- a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll +++ b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s ; Check that a fastcc function pops its stack variables before returning. diff --git a/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll index d9cfaa4c265..436be5b7a73 100644 --- a/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mcpu=generic -x86-asm-syntax=intel | FileCheck %s ; CHECK: add esp, 8 target triple = "i686-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll index ac898e69dfe..1fe2515bef8 100644 --- a/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll +++ b/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s ; check that fastcc is passing stuff in regs. declare x86_fastcallcc i64 @callee(i64 inreg) diff --git a/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll b/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll index ce0dff75cf0..d782ec4c51c 100644 --- a/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll +++ b/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s ; Make sure fast-isel doesn't screw up aggregate constants. ; (Failing out is okay, as long as we don't miscompile.) diff --git a/llvm/test/CodeGen/X86/fast-isel-atomic.ll b/llvm/test/CodeGen/X86/fast-isel-atomic.ll index 5f761ddb858..b2b63434ca6 100644 --- a/llvm/test/CodeGen/X86/fast-isel-atomic.ll +++ b/llvm/test/CodeGen/X86/fast-isel-atomic.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march=x86-64 +; RUN: llc < %s -O0 -mtriple=x86_64-- ; rdar://8204072 ; PR7652 diff --git a/llvm/test/CodeGen/X86/fast-isel-bail.ll b/llvm/test/CodeGen/X86/fast-isel-bail.ll index a485827be96..32a5ffdf5cc 100644 --- a/llvm/test/CodeGen/X86/fast-isel-bail.ll +++ b/llvm/test/CodeGen/X86/fast-isel-bail.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -O0 +; RUN: llc < %s -mtriple=i686-- -O0 ; This file is for regression tests for cases where FastISel needs ; to gracefully bail out and let SelectionDAGISel take over. diff --git a/llvm/test/CodeGen/X86/fast-isel-bc.ll b/llvm/test/CodeGen/X86/fast-isel-bc.ll index 8ac15cdbc03..fb3693d0b3f 100644 --- a/llvm/test/CodeGen/X86/fast-isel-bc.ll +++ b/llvm/test/CodeGen/X86/fast-isel-bc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s +; RUN: llc < %s -O0 -mattr=+mmx,+sse2 | FileCheck %s ; PR4684 target datalayout = diff --git a/llvm/test/CodeGen/X86/fast-isel-call.ll b/llvm/test/CodeGen/X86/fast-isel-call.ll index ee70404bced..3f394514e2c 100644 --- a/llvm/test/CodeGen/X86/fast-isel-call.ll +++ b/llvm/test/CodeGen/X86/fast-isel-call.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -O0 -fast-isel-abort=1 -march=x86 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s -; RUN: llc < %s -O0 -fast-isel-abort=1 -march=x86 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s +; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s +; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s %struct.s = type {i32, i32, i32} diff --git a/llvm/test/CodeGen/X86/fast-isel-constant.ll b/llvm/test/CodeGen/X86/fast-isel-constant.ll index 6f9240ac470..2c7cbc64da0 100644 --- a/llvm/test/CodeGen/X86/fast-isel-constant.ll +++ b/llvm/test/CodeGen/X86/fast-isel-constant.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s ; Make sure fast-isel doesn't reset the materialised constant map ; across an intrinsic call. diff --git a/llvm/test/CodeGen/X86/fast-isel-emutls.ll b/llvm/test/CodeGen/X86/fast-isel-emutls.ll index cb8012c0fa3..0a7f5d451ee 100644 --- a/llvm/test/CodeGen/X86/fast-isel-emutls.ll +++ b/llvm/test/CodeGen/X86/fast-isel-emutls.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -emulated-tls -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s +; RUN: llc < %s -emulated-tls -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s ; PR3654 @v = thread_local global i32 0 diff --git a/llvm/test/CodeGen/X86/fast-isel-expect.ll b/llvm/test/CodeGen/X86/fast-isel-expect.ll index c4be7f364f3..ce86041cecb 100644 --- a/llvm/test/CodeGen/X86/fast-isel-expect.ll +++ b/llvm/test/CodeGen/X86/fast-isel-expect.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -O0 -march=x86 | FileCheck %s +; RUN: llc < %s -O0 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" -target triple = "x86_64-unknown-linux-gnu" +target triple = "i686-unknown-linux-gnu" @glbl = extern_weak constant i8 diff --git a/llvm/test/CodeGen/X86/fast-isel-fneg.ll b/llvm/test/CodeGen/X86/fast-isel-fneg.ll index e3bc7faae3c..99c728a7366 100644 --- a/llvm/test/CodeGen/X86/fast-isel-fneg.ll +++ b/llvm/test/CodeGen/X86/fast-isel-fneg.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s -; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s +; RUN: llc < %s -fast-isel -mtriple=i686-- -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s ; SSE2: xor ; SSE2: xor diff --git a/llvm/test/CodeGen/X86/fast-isel-gep.ll b/llvm/test/CodeGen/X86/fast-isel-gep.ll index 1886d3379aa..88a22ca899d 100644 --- a/llvm/test/CodeGen/X86/fast-isel-gep.ll +++ b/llvm/test/CodeGen/X86/fast-isel-gep.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-windows-itanium -O0 | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=i686-- -O0 | FileCheck %s --check-prefix=X32 ; GEP indices are interpreted as signed integers, so they ; should be sign-extended to 64 bits on 64-bit targets. diff --git a/llvm/test/CodeGen/X86/fast-isel-tailcall.ll b/llvm/test/CodeGen/X86/fast-isel-tailcall.ll index 88ad05e8e1a..6f3e060ceca 100644 --- a/llvm/test/CodeGen/X86/fast-isel-tailcall.ll +++ b/llvm/test/CodeGen/X86/fast-isel-tailcall.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | FileCheck %s +; RUN: llc < %s -fast-isel -tailcallopt -mtriple=i686-- | FileCheck %s ; CHECK-NOT: add ; PR4154 diff --git a/llvm/test/CodeGen/X86/fast-isel-tls.ll b/llvm/test/CodeGen/X86/fast-isel-tls.ll index 0b7a5d9759d..95cc7842f6f 100644 --- a/llvm/test/CodeGen/X86/fast-isel-tls.ll +++ b/llvm/test/CodeGen/X86/fast-isel-tls.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s +; RUN: llc < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s ; PR3654 @v = thread_local global i32 0 diff --git a/llvm/test/CodeGen/X86/fast-isel.ll b/llvm/test/CodeGen/X86/fast-isel.ll index 375814c8afc..dbc13ba7ed7 100644 --- a/llvm/test/CodeGen/X86/fast-isel.ll +++ b/llvm/test/CodeGen/X86/fast-isel.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as +; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=i686-- -mattr=sse2 -no-integrated-as ; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as ; This tests very minimal fast-isel functionality. diff --git a/llvm/test/CodeGen/X86/fastcc-sret.ll b/llvm/test/CodeGen/X86/fastcc-sret.ll index 499aadda44f..2962f8ec1ff 100644 --- a/llvm/test/CodeGen/X86/fastcc-sret.ll +++ b/llvm/test/CodeGen/X86/fastcc-sret.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -tailcallopt=false | FileCheck %s %struct.foo = type { [4 x i32] } diff --git a/llvm/test/CodeGen/X86/fastcc3struct.ll b/llvm/test/CodeGen/X86/fastcc3struct.ll index 98dc2f5a1c7..b8e2631248a 100644 --- a/llvm/test/CodeGen/X86/fastcc3struct.ll +++ b/llvm/test/CodeGen/X86/fastcc3struct.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; CHECK: movl {{.}}12, %eax ; CHECK: movl {{.}}24, %edx diff --git a/llvm/test/CodeGen/X86/field-extract-use-trunc.ll b/llvm/test/CodeGen/X86/field-extract-use-trunc.ll index 735e1341f65..e7d2f41f0c2 100644 --- a/llvm/test/CodeGen/X86/field-extract-use-trunc.ll +++ b/llvm/test/CodeGen/X86/field-extract-use-trunc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | grep sar | count 1 -; RUN: llc < %s -march=x86-64 | not grep sar +; RUN: llc < %s -mtriple=i686-- | grep sar | count 1 +; RUN: llc < %s -mtriple=x86_64-- | not grep sar define i32 @test(i32 %f12) nounwind { %tmp7.25 = lshr i32 %f12, 16 diff --git a/llvm/test/CodeGen/X86/fildll.ll b/llvm/test/CodeGen/X86/fildll.ll index c5a3765c717..aeb753c062b 100644 --- a/llvm/test/CodeGen/X86/fildll.ll +++ b/llvm/test/CodeGen/X86/fildll.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2 +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -mattr=-sse2 | grep fildll | count 2 define fastcc double @sint64_to_fp(i64 %X) { %R = sitofp i64 %X to double ; <double> [#uses=1] diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.ll b/llvm/test/CodeGen/X86/fixup-bw-inst.ll index 6f83e6362d5..0e90921227b 100644 --- a/llvm/test/CodeGen/X86/fixup-bw-inst.ll +++ b/llvm/test/CodeGen/X86/fixup-bw-inst.ll @@ -1,6 +1,6 @@ -; RUN: llc -fixup-byte-word-insts=1 -march=x86-64 < %s | \ +; RUN: llc -fixup-byte-word-insts=1 < %s | \ ; RUN: FileCheck -check-prefix CHECK -check-prefix BWON %s -; RUN: llc -fixup-byte-word-insts=0 -march=x86-64 < %s | \ +; RUN: llc -fixup-byte-word-insts=0 < %s | \ ; RUN: FileCheck -check-prefix CHECK -check-prefix BWOFF %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" diff --git a/llvm/test/CodeGen/X86/fixup-lea.ll b/llvm/test/CodeGen/X86/fixup-lea.ll index 1ddc099ffd6..2d58d866b29 100644 --- a/llvm/test/CodeGen/X86/fixup-lea.ll +++ b/llvm/test/CodeGen/X86/fixup-lea.ll @@ -1,4 +1,4 @@ -;RUN: llc < %s -march=x86 | FileCheck %s +;RUN: llc < %s -mtriple=i686-- | FileCheck %s define void @foo(i32 inreg %dns) minsize { entry: diff --git a/llvm/test/CodeGen/X86/float-conv-elim.ll b/llvm/test/CodeGen/X86/float-conv-elim.ll index 7ccad2b80c8..9ec189b05e2 100644 --- a/llvm/test/CodeGen/X86/float-conv-elim.ll +++ b/llvm/test/CodeGen/X86/float-conv-elim.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i686-unknown-linux-gnu -march=x86-64 -mcpu=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck %s ; Make sure the float conversion is folded away as it should be. ; CHECK-LABEL: foo diff --git a/llvm/test/CodeGen/X86/floor-soft-float.ll b/llvm/test/CodeGen/X86/floor-soft-float.ll index 3b28ecc6379..ad98c34e464 100644 --- a/llvm/test/CodeGen/X86/floor-soft-float.ll +++ b/llvm/test/CodeGen/X86/floor-soft-float.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT -; RUN: llc < %s -march=x86-64 -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT +; RUN: llc < %s -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT +; RUN: llc < %s -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll b/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll index cf4c8933fca..fff3a49bea2 100644 --- a/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA -; RUN: llc < %s -mtriple=x86_64-pc-windows -march=x86-64 -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA-WIN -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA +; RUN: llc < %s -mtriple=x86_64-pc-windows -mcpu=core-avx2 -mattr=+fma,+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA-WIN +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=-fma4 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FMA diff --git a/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll b/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll index 34acdfe830f..78cf1a5a3b7 100644 --- a/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll +++ b/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s -; RUN: llc < %s -march=x86 -mcpu=bdver2 -mattr=-fma4 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=bdver2 -mattr=-fma4 | FileCheck %s ; Test FMA3 variant selection diff --git a/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll b/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll index 85de1ef5c9d..df4b48b769b 100644 --- a/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll +++ b/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma | FileCheck %s ; VFMADD diff --git a/llvm/test/CodeGen/X86/fmul-combines.ll b/llvm/test/CodeGen/X86/fmul-combines.ll index 564ce42fdb7..ff701aba43b 100644 --- a/llvm/test/CodeGen/X86/fmul-combines.ll +++ b/llvm/test/CodeGen/X86/fmul-combines.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s ; CHECK-LABEL: fmul2_f32: ; CHECK: addss %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/fmul-zero.ll b/llvm/test/CodeGen/X86/fmul-zero.ll index bc139f88534..32fe1b0d91e 100644 --- a/llvm/test/CodeGen/X86/fmul-zero.ll +++ b/llvm/test/CodeGen/X86/fmul-zero.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | not grep mulps -; RUN: llc < %s -march=x86-64 | grep mulps +; RUN: llc < %s -mtriple=x86_64-- -enable-unsafe-fp-math | not grep mulps +; RUN: llc < %s -mtriple=x86_64-- | grep mulps define void @test14(<4 x float>*) nounwind { load <4 x float>, <4 x float>* %0, align 1 diff --git a/llvm/test/CodeGen/X86/fold-add.ll b/llvm/test/CodeGen/X86/fold-add.ll index 7d274007408..e2d3b0588fe 100644 --- a/llvm/test/CodeGen/X86/fold-add.ll +++ b/llvm/test/CodeGen/X86/fold-add.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.6" diff --git a/llvm/test/CodeGen/X86/fold-and-shift.ll b/llvm/test/CodeGen/X86/fold-and-shift.ll index 00173efff69..5de4acf1019 100644 --- a/llvm/test/CodeGen/X86/fold-and-shift.ll +++ b/llvm/test/CodeGen/X86/fold-and-shift.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32 @t1(i8* %X, i32 %i) { ; CHECK-LABEL: t1: diff --git a/llvm/test/CodeGen/X86/fold-call.ll b/llvm/test/CodeGen/X86/fold-call.ll index 00839943f67..a50b4748168 100644 --- a/llvm/test/CodeGen/X86/fold-call.ll +++ b/llvm/test/CodeGen/X86/fold-call.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: test1 ; CHECK-NOT: mov diff --git a/llvm/test/CodeGen/X86/fold-imm.ll b/llvm/test/CodeGen/X86/fold-imm.ll index 16e4786979b..024c016c6c2 100644 --- a/llvm/test/CodeGen/X86/fold-imm.ll +++ b/llvm/test/CodeGen/X86/fold-imm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32 @test(i32 %X) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/fold-load-vec.ll b/llvm/test/CodeGen/X86/fold-load-vec.ll index 657b7bdd24f..db28156ab94 100644 --- a/llvm/test/CodeGen/X86/fold-load-vec.ll +++ b/llvm/test/CodeGen/X86/fold-load-vec.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s ; rdar://12721174 ; We should not fold movss into pshufd since pshufd expects m128 while movss diff --git a/llvm/test/CodeGen/X86/fold-load.ll b/llvm/test/CodeGen/X86/fold-load.ll index 8cdc58bb75e..5ae46e2c2e2 100644 --- a/llvm/test/CodeGen/X86/fold-load.ll +++ b/llvm/test/CodeGen/X86/fold-load.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 } @stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/fold-mul-lohi.ll b/llvm/test/CodeGen/X86/fold-mul-lohi.ll index 8d4c5ef9eb2..f0f6849a32f 100644 --- a/llvm/test/CodeGen/X86/fold-mul-lohi.ll +++ b/llvm/test/CodeGen/X86/fold-mul-lohi.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; CHECK-NOT: lea diff --git a/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll b/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll index 663e2afe22c..0666d890956 100644 --- a/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll +++ b/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s define <2 x double> @foo() nounwind { ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>) diff --git a/llvm/test/CodeGen/X86/fold-sext-trunc.ll b/llvm/test/CodeGen/X86/fold-sext-trunc.ll index df06e70b0c2..11863ffdbfb 100644 --- a/llvm/test/CodeGen/X86/fold-sext-trunc.ll +++ b/llvm/test/CodeGen/X86/fold-sext-trunc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movslq | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep movslq | count 1 ; PR4050 %0 = type { i64 } ; type %0 diff --git a/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll b/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll index 44c836195ab..203c750fc7b 100644 --- a/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll +++ b/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s -check-prefix=X64 ; DAGCombiner crashes during sext folding diff --git a/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll index 9f81e44074f..7837f2552e2 100644 --- a/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll +++ b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ;CHECK-LABEL: test define <2 x i256> @test() { diff --git a/llvm/test/CodeGen/X86/fp-elim.ll b/llvm/test/CodeGen/X86/fp-elim.ll index 2c50bd1be75..625c16ef703 100644 --- a/llvm/test/CodeGen/X86/fp-elim.ll +++ b/llvm/test/CodeGen/X86/fp-elim.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -asm-verbose=false | FileCheck %s -check-prefix=FP-ELIM -; RUN: llc < %s -march=x86 -asm-verbose=false -disable-fp-elim | FileCheck %s -check-prefix=NO-ELIM +; RUN: llc < %s -mtriple=i686-- -asm-verbose=false | FileCheck %s -check-prefix=FP-ELIM +; RUN: llc < %s -mtriple=i686-- -asm-verbose=false -disable-fp-elim | FileCheck %s -check-prefix=NO-ELIM ; Implement -momit-leaf-frame-pointer ; rdar://7886181 diff --git a/llvm/test/CodeGen/X86/fp-immediate-shorten.ll b/llvm/test/CodeGen/X86/fp-immediate-shorten.ll index dc59c5a44b4..49e3b1014be 100644 --- a/llvm/test/CodeGen/X86/fp-immediate-shorten.ll +++ b/llvm/test/CodeGen/X86/fp-immediate-shorten.ll @@ -1,6 +1,6 @@ ;; Test that this FP immediate is stored in the constant pool as a float. -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s ; CHECK: {{.long.1123418112}} diff --git a/llvm/test/CodeGen/X86/fp-stack-2results.ll b/llvm/test/CodeGen/X86/fp-stack-2results.ll index c8da9ea0251..0e8dbbf9b3b 100644 --- a/llvm/test/CodeGen/X86/fp-stack-2results.ll +++ b/llvm/test/CodeGen/X86/fp-stack-2results.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | grep fldz -; RUN: llc < %s -march=x86-64 | grep fld1 +; RUN: llc < %s -mtriple=i686-- | grep fldz +; RUN: llc < %s -mtriple=x86_64-- | grep fld1 %0 = type { x86_fp80, x86_fp80 } diff --git a/llvm/test/CodeGen/X86/fp-stack-compare-cmov.ll b/llvm/test/CodeGen/X86/fp-stack-compare-cmov.ll index 1d3548816b7..d0e816db3b6 100644 --- a/llvm/test/CodeGen/X86/fp-stack-compare-cmov.ll +++ b/llvm/test/CodeGen/X86/fp-stack-compare-cmov.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=pentiumpro | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=pentiumpro | FileCheck %s ; PR1012 define float @foo(float* %col.2.0) { diff --git a/llvm/test/CodeGen/X86/fp-stack-compare.ll b/llvm/test/CodeGen/X86/fp-stack-compare.ll index 96088d75923..8ff0dd442f9 100644 --- a/llvm/test/CodeGen/X86/fp-stack-compare.ll +++ b/llvm/test/CodeGen/X86/fp-stack-compare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=i386 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s ; PR6679 define float @foo(float* %col.2.0) { diff --git a/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll b/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll index 5a28bb50a34..b8bd22308c0 100644 --- a/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll +++ b/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | not grep fstp -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movsd +; RUN: llc < %s -mtriple=i686-- | not grep fstp +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep movsd declare double @foo() diff --git a/llvm/test/CodeGen/X86/fp-stack-ret.ll b/llvm/test/CodeGen/X86/fp-stack-ret.ll index 9635e2d2511..db54acc754c 100644 --- a/llvm/test/CodeGen/X86/fp-stack-ret.ll +++ b/llvm/test/CodeGen/X86/fp-stack-ret.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s ; These testcases shouldn't require loading into an XMM register then storing ; to memory, then reloading into an FPStack reg. diff --git a/llvm/test/CodeGen/X86/fp-stack-retcopy.ll b/llvm/test/CodeGen/X86/fp-stack-retcopy.ll index 67dcb1871df..bc77f79638e 100644 --- a/llvm/test/CodeGen/X86/fp-stack-retcopy.ll +++ b/llvm/test/CodeGen/X86/fp-stack-retcopy.ll @@ -1,5 +1,5 @@ ; This should not copy the result of foo into an xmm register. -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm +; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm ; rdar://5689903 declare double @foo() diff --git a/llvm/test/CodeGen/X86/fp-stack-set-st1.ll b/llvm/test/CodeGen/X86/fp-stack-set-st1.ll index 894897a2a5f..45597bb78f0 100644 --- a/llvm/test/CodeGen/X86/fp-stack-set-st1.ll +++ b/llvm/test/CodeGen/X86/fp-stack-set-st1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep fxch | count 2 +; RUN: llc < %s -mtriple=i686-- | grep fxch | count 2 define i32 @main() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/fp2sint.ll b/llvm/test/CodeGen/X86/fp2sint.ll index b41f56f9f41..de5fe4d8374 100644 --- a/llvm/test/CodeGen/X86/fp2sint.ll +++ b/llvm/test/CodeGen/X86/fp2sint.ll @@ -1,6 +1,6 @@ ;; LowerFP_TO_SINT should not create a stack object if it's not needed. -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep add +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | not grep add define i32 @main(i32 %argc, i8** %argv) { cond_false.i.i.i: ; preds = %bb.i5 diff --git a/llvm/test/CodeGen/X86/fp_constant_op.ll b/llvm/test/CodeGen/X86/fp_constant_op.ll index 9a1337ab6cd..1c015dccb09 100644 --- a/llvm/test/CodeGen/X86/fp_constant_op.ll +++ b/llvm/test/CodeGen/X86/fp_constant_op.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s ; Test that the load of the constant is folded into the operation. diff --git a/llvm/test/CodeGen/X86/fp_load_cast_fold.ll b/llvm/test/CodeGen/X86/fp_load_cast_fold.ll index 5fd22e3fa6e..771196674b1 100644 --- a/llvm/test/CodeGen/X86/fp_load_cast_fold.ll +++ b/llvm/test/CodeGen/X86/fp_load_cast_fold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define double @short(i16* %P) { %V = load i16, i16* %P ; <i16> [#uses=1] diff --git a/llvm/test/CodeGen/X86/fp_load_fold.ll b/llvm/test/CodeGen/X86/fp_load_fold.ll index 57497454792..4600c4ebe9c 100644 --- a/llvm/test/CodeGen/X86/fp_load_fold.ll +++ b/llvm/test/CodeGen/X86/fp_load_fold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \ ; RUN: grep -i ST | not grep "fadd\|fsub\|fdiv\|fmul" ; Test that the load of the memory location is folded into the operation. diff --git a/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll b/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll index dac468e5cbf..f96bf65e44b 100644 --- a/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll +++ b/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=pentium -mtriple=x86-linux-gnu -float-abi=soft | FileCheck %s +; RUN: llc < %s -mcpu=pentium -mtriple=i686-linux-gnu -float-abi=soft | FileCheck %s define i1 @test1(double %d) #0 { entry: diff --git a/llvm/test/CodeGen/X86/frameaddr.ll b/llvm/test/CodeGen/X86/frameaddr.ll index 1ed2b5d0af5..71dcf1ffe16 100644 --- a/llvm/test/CodeGen/X86/frameaddr.ll +++ b/llvm/test/CodeGen/X86/frameaddr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 -; RUN: llc < %s -march=x86 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32 +; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32 ; RUN: llc < %s -mtriple=x86_64-pc-win32 -fast-isel | FileCheck %s --check-prefix=CHECK-W64 ; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK-64 ; RUN: llc < %s -mtriple=x86_64-unknown -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-64 diff --git a/llvm/test/CodeGen/X86/fsgsbase.ll b/llvm/test/CodeGen/X86/fsgsbase.ll index 0c22e3c7db2..cea8f35108f 100644 --- a/llvm/test/CodeGen/X86/fsgsbase.ll +++ b/llvm/test/CodeGen/X86/fsgsbase.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=core-avx-i -mattr=fsgsbase | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx-i -mattr=fsgsbase | FileCheck %s define i32 @test_x86_rdfsbase_32() { ; CHECK: rdfsbasel diff --git a/llvm/test/CodeGen/X86/fsxor-alignment.ll b/llvm/test/CodeGen/X86/fsxor-alignment.ll index 6a8dbcfaa7c..6f9738f50fb 100644 --- a/llvm/test/CodeGen/X86/fsxor-alignment.ll +++ b/llvm/test/CodeGen/X86/fsxor-alignment.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -enable-unsafe-fp-math | \ +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -enable-unsafe-fp-math | \ ; RUN: grep -v sp | grep xorps | count 2 ; Don't fold the incoming stack arguments into the xorps instructions used diff --git a/llvm/test/CodeGen/X86/full-lsr.ll b/llvm/test/CodeGen/X86/full-lsr.ll index 85b2b41fa19..9778ce031cc 100644 --- a/llvm/test/CodeGen/X86/full-lsr.ll +++ b/llvm/test/CodeGen/X86/full-lsr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s -; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck -check-prefix=ATOM %s +; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck -check-prefix=ATOM %s define void @foo(float* nocapture %A, float* nocapture %B, float* nocapture %C, i32 %N) nounwind { ; ATOM: foo diff --git a/llvm/test/CodeGen/X86/function-subtarget-features-2.ll b/llvm/test/CodeGen/X86/function-subtarget-features-2.ll index d7c7c2fdb6f..df1efab6edf 100644 --- a/llvm/test/CodeGen/X86/function-subtarget-features-2.ll +++ b/llvm/test/CodeGen/X86/function-subtarget-features-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -filetype=obj -o - | llvm-objdump -d - | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -filetype=obj -o - | llvm-objdump -d - | FileCheck %s ; This test verifies that we assemble code for different architectures ; based on target-cpu and target-features attributes. diff --git a/llvm/test/CodeGen/X86/function-subtarget-features.ll b/llvm/test/CodeGen/X86/function-subtarget-features.ll index b1e2585be00..d15988eb0be 100644 --- a/llvm/test/CodeGen/X86/function-subtarget-features.ll +++ b/llvm/test/CodeGen/X86/function-subtarget-features.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -o - | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -o - | FileCheck %s ; This test verifies that we produce different code for different architectures ; based on target-cpu and target-features attributes. diff --git a/llvm/test/CodeGen/X86/getelementptr.ll b/llvm/test/CodeGen/X86/getelementptr.ll index e260e7d7b74..68caf7a65f8 100644 --- a/llvm/test/CodeGen/X86/getelementptr.ll +++ b/llvm/test/CodeGen/X86/getelementptr.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -O0 -march=x86 -; RUN: llc < %s -O0 -march=x86-64 -; RUN: llc < %s -O2 -march=x86 -; RUN: llc < %s -O2 -march=x86-64 +; RUN: llc < %s -O0 -mtriple=i686-- +; RUN: llc < %s -O0 -mtriple=x86_64-- +; RUN: llc < %s -O2 -mtriple=i686-- +; RUN: llc < %s -O2 -mtriple=x86_64-- ; Test big index trunc to pointer size: diff --git a/llvm/test/CodeGen/X86/global-access-pie-copyrelocs.ll b/llvm/test/CodeGen/X86/global-access-pie-copyrelocs.ll index 5c4a87c969c..b0ecf3e942e 100644 --- a/llvm/test/CodeGen/X86/global-access-pie-copyrelocs.ll +++ b/llvm/test/CodeGen/X86/global-access-pie-copyrelocs.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -pie-copy-relocations \ +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -pie-copy-relocations \ ; RUN: | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -pie-copy-relocations \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -pie-copy-relocations \ ; RUN: | FileCheck -check-prefix=X32 %s ; External Linkage diff --git a/llvm/test/CodeGen/X86/global-access-pie.ll b/llvm/test/CodeGen/X86/global-access-pie.ll index 0e29d605476..98dbcce9b77 100644 --- a/llvm/test/CodeGen/X86/global-access-pie.ll +++ b/llvm/test/CodeGen/X86/global-access-pie.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \ +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -emulated-tls -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \ +; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \ ; RUN: | FileCheck -check-prefix=X32 %s ; External Linkage diff --git a/llvm/test/CodeGen/X86/h-register-addressing-32.ll b/llvm/test/CodeGen/X86/h-register-addressing-32.ll index d0214137b0e..8a86a421737 100644 --- a/llvm/test/CodeGen/X86/h-register-addressing-32.ll +++ b/llvm/test/CodeGen/X86/h-register-addressing-32.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s ; Use h-register extract and zero-extend. diff --git a/llvm/test/CodeGen/X86/h-register-addressing-64.ll b/llvm/test/CodeGen/X86/h-register-addressing-64.ll index b3159f4896a..8d8b44ce282 100644 --- a/llvm/test/CodeGen/X86/h-register-addressing-64.ll +++ b/llvm/test/CodeGen/X86/h-register-addressing-64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=-bmi | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s ; Use h-register extract and zero-extend. diff --git a/llvm/test/CodeGen/X86/h-register-store.ll b/llvm/test/CodeGen/X86/h-register-store.ll index 0e6a0236d2c..dbf97827612 100644 --- a/llvm/test/CodeGen/X86/h-register-store.ll +++ b/llvm/test/CodeGen/X86/h-register-store.ll @@ -25,7 +25,7 @@ ; W64: movb %ch, (%rdx) ; W64-NOT: mov -; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X86 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X86 ; X86-NOT: mov ; X86: movb %ah, (%e ; X86-NOT: mov diff --git a/llvm/test/CodeGen/X86/h-registers-0.ll b/llvm/test/CodeGen/X86/h-registers-0.ll index 9b72916ea74..5f459c3c459 100644 --- a/llvm/test/CodeGen/X86/h-registers-0.ll +++ b/llvm/test/CodeGen/X86/h-registers-0.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64 -; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32 +; RUN: llc < %s -mattr=-bmi -mtriple=i686-- | FileCheck %s -check-prefix=X86-32 ; Use h registers. On x86-64, codegen doesn't support general allocation ; of h registers yet, due to x86 encoding complications. diff --git a/llvm/test/CodeGen/X86/h-registers-2.ll b/llvm/test/CodeGen/X86/h-registers-2.ll index d244ab48a2c..e7aeb4adf2b 100644 --- a/llvm/test/CodeGen/X86/h-registers-2.ll +++ b/llvm/test/CodeGen/X86/h-registers-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; Use an h register, but don't omit the explicit shift for ; non-address use(s). diff --git a/llvm/test/CodeGen/X86/handle-move.ll b/llvm/test/CodeGen/X86/handle-move.ll index ba96275569b..dcad6c83aaa 100644 --- a/llvm/test/CodeGen/X86/handle-move.ll +++ b/llvm/test/CodeGen/X86/handle-move.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s -; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s +; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s +; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s ; REQUIRES: asserts ; ; Test the LiveIntervals::handleMove() function. diff --git a/llvm/test/CodeGen/X86/i128-and-beyond.ll b/llvm/test/CodeGen/X86/i128-and-beyond.ll index b741681ac17..5018900d0c7 100644 --- a/llvm/test/CodeGen/X86/i128-and-beyond.ll +++ b/llvm/test/CodeGen/X86/i128-and-beyond.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-linux-gnu | grep -- -1 | count 14 +; RUN: llc < %s -mtriple=i686-pc-linux-gnu | grep -- -1 | count 14 ; These static initializers are too big to hand off to assemblers ; as monolithic blobs. diff --git a/llvm/test/CodeGen/X86/i128-immediate.ll b/llvm/test/CodeGen/X86/i128-immediate.ll index c47569e700f..999076cddd6 100644 --- a/llvm/test/CodeGen/X86/i128-immediate.ll +++ b/llvm/test/CodeGen/X86/i128-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movq | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep movq | count 2 define i128 @__addvti3() { ret i128 -1 diff --git a/llvm/test/CodeGen/X86/i128-mul.ll b/llvm/test/CodeGen/X86/i128-mul.ll index 21bca028888..585d65b678f 100644 --- a/llvm/test/CodeGen/X86/i128-mul.ll +++ b/llvm/test/CodeGen/X86/i128-mul.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s ; PR1198 define i64 @foo(i64 %x, i64 %y) { diff --git a/llvm/test/CodeGen/X86/i128-sdiv.ll b/llvm/test/CodeGen/X86/i128-sdiv.ll index 89cd495aa8b..82b75b334b3 100644 --- a/llvm/test/CodeGen/X86/i128-sdiv.ll +++ b/llvm/test/CodeGen/X86/i128-sdiv.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; Make sure none of these crash, and that the power-of-two transformations ; trigger correctly. diff --git a/llvm/test/CodeGen/X86/i16lshr8pat.ll b/llvm/test/CodeGen/X86/i16lshr8pat.ll index 7f2da8e2953..425680f9d05 100644 --- a/llvm/test/CodeGen/X86/i16lshr8pat.ll +++ b/llvm/test/CodeGen/X86/i16lshr8pat.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -stop-after expand-isel-pseudos <%s 2>&1 | FileCheck %s +; RUN: llc -stop-after expand-isel-pseudos <%s 2>&1 | FileCheck %s target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128" target triple = "i386-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/i2k.ll b/llvm/test/CodeGen/X86/i2k.ll index 83c10a58a3a..ec5178a541a 100644 --- a/llvm/test/CodeGen/X86/i2k.ll +++ b/llvm/test/CodeGen/X86/i2k.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define void @foo(i2011* %x, i2011* %y, i2011* %p) nounwind { %a = load i2011, i2011* %x diff --git a/llvm/test/CodeGen/X86/i486-fence-loop.ll b/llvm/test/CodeGen/X86/i486-fence-loop.ll index 936e54eddaf..9bf75b2ee7c 100644 --- a/llvm/test/CodeGen/X86/i486-fence-loop.ll +++ b/llvm/test/CodeGen/X86/i486-fence-loop.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mcpu=i486 -o - %s | FileCheck %s +; RUN: llc -mtriple=i686-- -mcpu=i486 -o - %s | FileCheck %s ; Main test here was that ISelDAG could cope with a MachineNode in the chain ; from the first load to the "X86ISD::SUB". Previously it thought that meant no diff --git a/llvm/test/CodeGen/X86/iabs.ll b/llvm/test/CodeGen/X86/iabs.ll index f47bd7b2def..5df74794e86 100644 --- a/llvm/test/CodeGen/X86/iabs.ll +++ b/llvm/test/CodeGen/X86/iabs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ;; Integer absolute value, should produce something at least as good as: ;; movl %edi, %eax diff --git a/llvm/test/CodeGen/X86/illegal-insert.ll b/llvm/test/CodeGen/X86/illegal-insert.ll index dbf1b14684c..9898a41da11 100644 --- a/llvm/test/CodeGen/X86/illegal-insert.ll +++ b/llvm/test/CodeGen/X86/illegal-insert.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- define <4 x double> @foo0(<4 x double> %t) { %r = insertelement <4 x double> %t, double 2.3, i32 0 diff --git a/llvm/test/CodeGen/X86/illegal-vector-args-return.ll b/llvm/test/CodeGen/X86/illegal-vector-args-return.ll index d783d4fa1b4..ec7547f5f71 100644 --- a/llvm/test/CodeGen/X86/illegal-vector-args-return.ll +++ b/llvm/test/CodeGen/X86/illegal-vector-args-return.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1" -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0" -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1" -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0" +; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm3, %xmm1" +; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "mulpd %xmm2, %xmm0" +; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm3, %xmm1" +; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | grep "addps %xmm2, %xmm0" target triple = "i686-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/imul-lea-2.ll b/llvm/test/CodeGen/X86/imul-lea-2.ll index 7b79d0678be..56a42fc658b 100644 --- a/llvm/test/CodeGen/X86/imul-lea-2.ll +++ b/llvm/test/CodeGen/X86/imul-lea-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK-NOT: imul diff --git a/llvm/test/CodeGen/X86/imul-lea.ll b/llvm/test/CodeGen/X86/imul-lea.ll index d55ece7996e..0ad7ea66e85 100644 --- a/llvm/test/CodeGen/X86/imul-lea.ll +++ b/llvm/test/CodeGen/X86/imul-lea.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s declare i32 @foo() diff --git a/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll index d17e04dd794..218638c0e65 100644 --- a/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll +++ b/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc < %s | FileCheck %s ; 7282062 ; ModuleID = '<stdin>' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll index 140c2544f19..408dcb75da4 100644 --- a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll +++ b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s -; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s +; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s +; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) { ; CHECK: vmovhlps %xmm1, %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll index 4600d4e5b99..5b792d145ed 100644 --- a/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll +++ b/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s +; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s define <16 x float> @testZMM_1(<16 x float> %_zmm0, <16 x float> %_zmm1) { entry: diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll index 3453fb1be5d..42910cb10ba 100644 --- a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll +++ b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march x86-64 -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s +; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s define <4 x float> @testXMM_1(<4 x float> %_xmm0, i64 %_l) { entry: diff --git a/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll b/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll index 91b1ffed4e0..967477d076d 100644 --- a/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll +++ b/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll @@ -1,4 +1,4 @@ -; RUN: not llc -march=x86 -no-integrated-as < %s 2>&1 | FileCheck %s +; RUN: not llc -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s @x = global i32 0, align 4 diff --git a/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll index 2ef54749739..0228f45ce96 100644 --- a/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll +++ b/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s +; RUN: llc < %s -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s ; CHECK-LABEL: test1: ; CHECK: movl (%rdi), %eax diff --git a/llvm/test/CodeGen/X86/inline-asm-error.ll b/llvm/test/CodeGen/X86/inline-asm-error.ll index 31fb190daf8..a757365e348 100644 --- a/llvm/test/CodeGen/X86/inline-asm-error.ll +++ b/llvm/test/CodeGen/X86/inline-asm-error.ll @@ -1,6 +1,6 @@ -; RUN: not llc -march x86 -regalloc=fast -optimize-regalloc=0 < %s 2> %t1 -; RUN: not llc -march x86 -regalloc=basic < %s 2> %t2 -; RUN: not llc -march x86 -regalloc=greedy < %s 2> %t3 +; RUN: not llc -mtriple=i686-- -regalloc=fast -optimize-regalloc=0 < %s 2> %t1 +; RUN: not llc -mtriple=i686-- -regalloc=basic < %s 2> %t2 +; RUN: not llc -mtriple=i686-- -regalloc=greedy < %s 2> %t3 ; RUN: FileCheck %s < %t1 ; RUN: FileCheck %s < %t2 ; RUN: FileCheck %s < %t3 diff --git a/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll b/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll index 0874b51af6a..e47e636d9e7 100644 --- a/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll +++ b/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s | FileCheck %s ; PR3701 define i64 @t(i64* %arg) nounwind { diff --git a/llvm/test/CodeGen/X86/inline-asm-modifier-n.ll b/llvm/test/CodeGen/X86/inline-asm-modifier-n.ll index 072c7c41953..7e48dd2dda5 100644 --- a/llvm/test/CodeGen/X86/inline-asm-modifier-n.ll +++ b/llvm/test/CodeGen/X86/inline-asm-modifier-n.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37" +; RUN: llc < %s -mtriple=i686-- -no-integrated-as | grep " 37" ; rdar://7008959 define void @bork() nounwind { diff --git a/llvm/test/CodeGen/X86/inline-asm-modifier-q.ll b/llvm/test/CodeGen/X86/inline-asm-modifier-q.ll index 8063d48a2ca..f375c45b175 100644 --- a/llvm/test/CodeGen/X86/inline-asm-modifier-q.ll +++ b/llvm/test/CodeGen/X86/inline-asm-modifier-q.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck %s ; If the target does not have 64-bit integer registers, emit 32-bit register ; names. diff --git a/llvm/test/CodeGen/X86/inline-asm-mrv.ll b/llvm/test/CodeGen/X86/inline-asm-mrv.ll index a96e7b81807..41a97e3dc1d 100644 --- a/llvm/test/CodeGen/X86/inline-asm-mrv.ll +++ b/llvm/test/CodeGen/X86/inline-asm-mrv.ll @@ -1,8 +1,8 @@ ; PR2094 -; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq -; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps -; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd -; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq +; RUN: llc < %s -no-integrated-as | grep movslq +; RUN: llc < %s -no-integrated-as | grep addps +; RUN: llc < %s -no-integrated-as | grep paddd +; RUN: llc < %s -no-integrated-as | not grep movq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin8" diff --git a/llvm/test/CodeGen/X86/inline-asm-q-regs.ll b/llvm/test/CodeGen/X86/inline-asm-q-regs.ll index 53a56aee2cb..dd67bd645ee 100644 --- a/llvm/test/CodeGen/X86/inline-asm-q-regs.ll +++ b/llvm/test/CodeGen/X86/inline-asm-q-regs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -no-integrated-as ; rdar://7066579 %0 = type { i64, i64, i64, i64, i64 } ; type %0 diff --git a/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll b/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll index be0c6f51112..29034a63ed9 100644 --- a/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll +++ b/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -no-integrated-as < %s | FileCheck %s declare void @bar(i32* %junk) diff --git a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll index 64a7fe82647..a33734af93f 100644 --- a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll +++ b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -no-integrated-as define void @test1() { tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000) diff --git a/llvm/test/CodeGen/X86/inline-asm.ll b/llvm/test/CodeGen/X86/inline-asm.ll index 5ec4f469df8..e4442388b08 100644 --- a/llvm/test/CodeGen/X86/inline-asm.ll +++ b/llvm/test/CodeGen/X86/inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -mtriple=i686-- -no-integrated-as define i32 @test1() nounwind { ; Dest is AX, dest type = i32. diff --git a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll index 08de0c02d29..3eb5fb0eb46 100644 --- a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll +++ b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll @@ -1,5 +1,5 @@ ; PR13504 -; RUN: llc -march=x86 -mcpu=atom <%s | FileCheck %s +; RUN: llc -mtriple=i686-- -mcpu=atom <%s | FileCheck %s ; CHECK: bsfl ; CHECK-NOT: movl diff --git a/llvm/test/CodeGen/X86/ins_split_regalloc.ll b/llvm/test/CodeGen/X86/ins_split_regalloc.ll index f04d088ce68..99398b0ccd1 100644 --- a/llvm/test/CodeGen/X86/ins_split_regalloc.ll +++ b/llvm/test/CodeGen/X86/ins_split_regalloc.ll @@ -1,4 +1,4 @@ -; RUN: llc -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx -march x86-64 < %s -o - | FileCheck %s +; RUN: llc -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx < %s -o - | FileCheck %s ; Check that last chance split (RAGreedy::tryInstructonSplit) just split ; when this is beneficial, otherwise we end up with uncoalesced copies. ; <rdar://problem/15570057> diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll index 4a5d8dfaf68..19ca7cb17a4 100644 --- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll +++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=-bmi | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s define fastcc i32 @t() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll index f2c9cc72719..ff8190c45c0 100644 --- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll +++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | not grep movw +; RUN: llc < %s -mtriple=x86_64-- | not grep movw define i16 @test5(i16 %f12) nounwind { %f11 = shl i16 %f12, 2 ; <i16> [#uses=1] diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll index 71890bc23b6..31f554d4afd 100644 --- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll +++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 3 +; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 3 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/llvm/test/CodeGen/X86/insert-positions.ll b/llvm/test/CodeGen/X86/insert-positions.ll index aa68579d22e..e36d1646abb 100644 --- a/llvm/test/CodeGen/X86/insert-positions.ll +++ b/llvm/test/CodeGen/X86/insert-positions.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 >/dev/null +; RUN: llc < %s -mtriple=x86_64-- >/dev/null target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/llvm/test/CodeGen/X86/insertelement-copytoregs.ll b/llvm/test/CodeGen/X86/insertelement-copytoregs.ll index 88ff4dafad7..83f0bd2bac6 100644 --- a/llvm/test/CodeGen/X86/insertelement-copytoregs.ll +++ b/llvm/test/CodeGen/X86/insertelement-copytoregs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK-NOT: IMPLICIT_DEF define void @foo(<2 x float>* %p) { diff --git a/llvm/test/CodeGen/X86/insertelement-legalize.ll b/llvm/test/CodeGen/X86/insertelement-legalize.ll index 3805cbbaaaf..8adc3f7e2d6 100644 --- a/llvm/test/CodeGen/X86/insertelement-legalize.ll +++ b/llvm/test/CodeGen/X86/insertelement-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; Test to check that we properly legalize an insert vector element define void @test(<2 x i64> %val, <2 x i64>* %dst, i64 %x) nounwind { diff --git a/llvm/test/CodeGen/X86/int-intrinsic.ll b/llvm/test/CodeGen/X86/int-intrinsic.ll index b253e6c5f3b..ca7ceb24b42 100644 --- a/llvm/test/CodeGen/X86/int-intrinsic.ll +++ b/llvm/test/CodeGen/X86/int-intrinsic.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s declare void @llvm.x86.int(i8) nounwind diff --git a/llvm/test/CodeGen/X86/invalid-liveness.mir b/llvm/test/CodeGen/X86/invalid-liveness.mir index c1da65e0be6..28f8135c585 100644 --- a/llvm/test/CodeGen/X86/invalid-liveness.mir +++ b/llvm/test/CodeGen/X86/invalid-liveness.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86 -run-pass liveintervals -o - %s 2>&1 | FileCheck %s +# RUN: not llc -mtriple=i686-- -run-pass liveintervals -o - %s 2>&1 | FileCheck %s # REQUIRES: asserts --- | diff --git a/llvm/test/CodeGen/X86/invalid-shift-immediate.ll b/llvm/test/CodeGen/X86/invalid-shift-immediate.ll index 1fb80c7dba7..05802660f06 100644 --- a/llvm/test/CodeGen/X86/invalid-shift-immediate.ll +++ b/llvm/test/CodeGen/X86/invalid-shift-immediate.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR2098 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/isel-optnone.ll b/llvm/test/CodeGen/X86/isel-optnone.ll index 831ad3837d9..d78b5eb8fe1 100644 --- a/llvm/test/CodeGen/X86/isel-optnone.ll +++ b/llvm/test/CodeGen/X86/isel-optnone.ll @@ -1,4 +1,4 @@ -; RUN: llc -O2 -march=x86 < %s | FileCheck %s +; RUN: llc -O2 -mtriple=i686-- < %s | FileCheck %s define i32* @fooOptnone(i32* %p, i32* %q, i32** %z) #0 { entry: diff --git a/llvm/test/CodeGen/X86/isel-sink.ll b/llvm/test/CodeGen/X86/isel-sink.ll index 2f32097a09b..ead3414d63d 100644 --- a/llvm/test/CodeGen/X86/isel-sink.ll +++ b/llvm/test/CodeGen/X86/isel-sink.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32 @test(i32* %X, i32 %B) { ; CHECK-LABEL: test: diff --git a/llvm/test/CodeGen/X86/isel-sink2.ll b/llvm/test/CodeGen/X86/isel-sink2.ll index 65f1994b9fe..e7236336bcd 100644 --- a/llvm/test/CodeGen/X86/isel-sink2.ll +++ b/llvm/test/CodeGen/X86/isel-sink2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 > %t +; RUN: llc < %s -mtriple=i686-- > %t ; RUN: grep "movb.7(%...)" %t ; RUN: not grep leal %t diff --git a/llvm/test/CodeGen/X86/isnan.ll b/llvm/test/CodeGen/X86/isnan.ll index 4d465c0c7aa..98766838f14 100644 --- a/llvm/test/CodeGen/X86/isnan.ll +++ b/llvm/test/CodeGen/X86/isnan.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep call +; RUN: llc < %s -mtriple=i686-- | not grep call declare i1 @llvm.isunordered.f64(double) diff --git a/llvm/test/CodeGen/X86/isnan2.ll b/llvm/test/CodeGen/X86/isnan2.ll index 7753346fd94..e28f8450a3c 100644 --- a/llvm/test/CodeGen/X86/isnan2.ll +++ b/llvm/test/CodeGen/X86/isnan2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep pxor +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep pxor ; This should not need to materialize 0.0 to evaluate the condition. diff --git a/llvm/test/CodeGen/X86/ispositive.ll b/llvm/test/CodeGen/X86/ispositive.ll index b1d1a20c8eb..ac9bd438371 100644 --- a/llvm/test/CodeGen/X86/ispositive.ll +++ b/llvm/test/CodeGen/X86/ispositive.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "shrl.*31" +; RUN: llc < %s -mtriple=i686-- | grep "shrl.*31" define i32 @test1(i32 %X) { entry: diff --git a/llvm/test/CodeGen/X86/lakemont.ll b/llvm/test/CodeGen/X86/lakemont.ll index ddd24525f27..49946890822 100644 --- a/llvm/test/CodeGen/X86/lakemont.ll +++ b/llvm/test/CodeGen/X86/lakemont.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=lakemont | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=lakemont | FileCheck %s ; Make sure -mcpu=lakemont implies soft floats. define float @test(float %a, float %b) nounwind readnone { diff --git a/llvm/test/CodeGen/X86/large-code-model-isel.ll b/llvm/test/CodeGen/X86/large-code-model-isel.ll index 9edabcd0520..086fc8ed079 100644 --- a/llvm/test/CodeGen/X86/large-code-model-isel.ll +++ b/llvm/test/CodeGen/X86/large-code-model-isel.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -code-model=large -mcpu=core2 -march=x86-64 -O0 | FileCheck %s +; RUN: llc < %s -code-model=large -mcpu=core2 -mtriple=x86_64-- -O0 | FileCheck %s target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" diff --git a/llvm/test/CodeGen/X86/large-gep-chain.ll b/llvm/test/CodeGen/X86/large-gep-chain.ll index 8df282983f5..f0f06c12232 100644 --- a/llvm/test/CodeGen/X86/large-gep-chain.ll +++ b/llvm/test/CodeGen/X86/large-gep-chain.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O0 -march x86 -o /dev/null +; RUN: llc < %s -O0 -mtriple=i686-- -o /dev/null ; <rdar://problem/12445434> %0 = type { i32, float* } diff --git a/llvm/test/CodeGen/X86/large-gep-scale.ll b/llvm/test/CodeGen/X86/large-gep-scale.ll index 8e6e4d23a81..10ef094e4be 100644 --- a/llvm/test/CodeGen/X86/large-gep-scale.ll +++ b/llvm/test/CodeGen/X86/large-gep-scale.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; PR5281 ; After scaling, this type doesn't fit in memory. Codegen should generate diff --git a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll index 630df25d400..6ad55d42868 100644 --- a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll +++ b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-pc-win32 | FileCheck %s +; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s ; PR26575 ; Assertion `(Disp->isImm() || Disp->isGlobal()) && (Other.Disp->isImm() || Other.Disp->isGlobal()) && "Address displacement operand is always an immediate or a global"' failed. diff --git a/llvm/test/CodeGen/X86/lea-recursion.ll b/llvm/test/CodeGen/X86/lea-recursion.ll index 55bcd7819c3..5bba1141e3a 100644 --- a/llvm/test/CodeGen/X86/lea-recursion.ll +++ b/llvm/test/CodeGen/X86/lea-recursion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep lea | count 13 +; RUN: llc < %s -mtriple=x86_64-- | grep lea | count 13 ; This testcase was written to demonstrate an instruction-selection problem, ; however it also happens to expose a limitation in the DAGCombiner's diff --git a/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll b/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll index 6a8c154a1bb..0906773145b 100644 --- a/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll +++ b/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -enable-legalize-types-checking < %s +; RUN: llc -mtriple=x86_64-- -enable-legalize-types-checking < %s ; PR5092 define <4 x float> @bug(float %a) nounwind { diff --git a/llvm/test/CodeGen/X86/legalize-libcalls.ll b/llvm/test/CodeGen/X86/legalize-libcalls.ll index 879dc98ab20..f05ab61814a 100644 --- a/llvm/test/CodeGen/X86/legalize-libcalls.ll +++ b/llvm/test/CodeGen/X86/legalize-libcalls.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86 < %s -; RUN: llc -march=x86-64 < %s +; RUN: llc -mtriple=i686-- < %s +; RUN: llc -mtriple=x86_64-- < %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" diff --git a/llvm/test/CodeGen/X86/legalizedag_vec.ll b/llvm/test/CodeGen/X86/legalizedag_vec.ll index dff693120fb..e15e39c5c0b 100644 --- a/llvm/test/CodeGen/X86/legalizedag_vec.ll +++ b/llvm/test/CodeGen/X86/legalizedag_vec.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s ; Test case for r63760 where we generate a legalization assert that an illegal diff --git a/llvm/test/CodeGen/X86/licm-nested.ll b/llvm/test/CodeGen/X86/licm-nested.ll index 63e3c5c3b6b..c029508bb7a 100644 --- a/llvm/test/CodeGen/X86/licm-nested.ll +++ b/llvm/test/CodeGen/X86/licm-nested.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc -mtriple=x86_64-apple-darwin -march=x86-64 < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 5 +; RUN: llc -mtriple=x86_64-apple-darwin < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 5 ; MachineLICM should be able to hoist the symbolic addresses out of ; the inner loops. diff --git a/llvm/test/CodeGen/X86/limited-prec.ll b/llvm/test/CodeGen/X86/limited-prec.ll index 7bf4ac28fdf..07291f85466 100644 --- a/llvm/test/CodeGen/X86/limited-prec.ll +++ b/llvm/test/CodeGen/X86/limited-prec.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -limit-float-precision=6 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=6 -mtriple=i686-- | \ ; RUN: not grep exp | not grep log | not grep pow -; RUN: llc < %s -limit-float-precision=12 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=12 -mtriple=i686-- | \ ; RUN: not grep exp | not grep log | not grep pow -; RUN: llc < %s -limit-float-precision=18 -march=x86 | \ +; RUN: llc < %s -limit-float-precision=18 -mtriple=i686-- | \ ; RUN: not grep exp | not grep log | not grep pow define float @f1(float %x) nounwind noinline { diff --git a/llvm/test/CodeGen/X86/live-out-reg-info.ll b/llvm/test/CodeGen/X86/live-out-reg-info.ll index 283ee3ae71a..7ddff938c8f 100644 --- a/llvm/test/CodeGen/X86/live-out-reg-info.ll +++ b/llvm/test/CodeGen/X86/live-out-reg-info.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep testb +; RUN: llc < %s -mtriple=x86_64-- | grep testb ; Make sure dagcombine doesn't eliminate the comparison due ; to an off-by-one bug with computeKnownBits information. diff --git a/llvm/test/CodeGen/X86/live-range-nosubreg.ll b/llvm/test/CodeGen/X86/live-range-nosubreg.ll index 899a375221c..d5226e67ee4 100644 --- a/llvm/test/CodeGen/X86/live-range-nosubreg.ll +++ b/llvm/test/CodeGen/X86/live-range-nosubreg.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s +; RUN: llc < %s ; This testcase used to crash. See PR29132. diff --git a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll index 19a5ed59186..293ceee3be9 100644 --- a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll +++ b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march x86-64 -mcpu=broadwell | FileCheck %s -; RUN: llc < %s -march x86-64 -mattr=+avx2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s ; Check that llc can overide function attributes target-cpu and target-features ; using command line options -mcpu and -mattr. diff --git a/llvm/test/CodeGen/X86/long-setcc.ll b/llvm/test/CodeGen/X86/long-setcc.ll index 13046d8b3de..9436891e9cc 100644 --- a/llvm/test/CodeGen/X86/long-setcc.ll +++ b/llvm/test/CodeGen/X86/long-setcc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i1 @t1(i64 %x) nounwind { %B = icmp slt i64 %x, 0 diff --git a/llvm/test/CodeGen/X86/loop-blocks.ll b/llvm/test/CodeGen/X86/loop-blocks.ll index fc6a357523f..f39c8a8eab9 100644 --- a/llvm/test/CodeGen/X86/loop-blocks.ll +++ b/llvm/test/CodeGen/X86/loop-blocks.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s ; These tests check for loop branching structure, and that the loop align ; directive is placed in the expected place. diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll index 06281902141..6c903a85c43 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -relocation-model=pic | FileCheck %s -check-prefix=PIC -; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s -check-prefix=STATIC +; RUN: llc < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s -check-prefix=PIC +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -check-prefix=STATIC ; ; Make sure the common loop invariant A is hoisted up to preheader, ; since too many registers are needed to subsume it into the addressing modes. diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce.ll b/llvm/test/CodeGen/X86/loop-strength-reduce.ll index 2f80e0bb78b..d8222b8c3e5 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s ; CHECK: align ; CHECK: movl $4, -4(%ecx) diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce5.ll b/llvm/test/CodeGen/X86/loop-strength-reduce5.ll index d50a66805db..2e4a5838792 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce5.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep inc | count 1 +; RUN: llc < %s -mtriple=i686-- | grep inc | count 1 @X = weak global i16 0 ; <i16*> [#uses=1] @Y = weak global i16 0 ; <i16*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce6.ll b/llvm/test/CodeGen/X86/loop-strength-reduce6.ll index 919f836841f..326a7394979 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce6.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | not grep inc +; RUN: llc < %s -mtriple=x86_64-- | not grep inc define fastcc i32 @decodeMP3(i32 %isize, i32* %done) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll index 92ec485e775..7a467d3118f 100644 --- a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll +++ b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep imul +; RUN: llc < %s | not grep imul target triple = "i386-apple-darwin9.6" %struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] } diff --git a/llvm/test/CodeGen/X86/lsr-delayed-fold.ll b/llvm/test/CodeGen/X86/lsr-delayed-fold.ll index eaa52dec283..f580e404d17 100644 --- a/llvm/test/CodeGen/X86/lsr-delayed-fold.ll +++ b/llvm/test/CodeGen/X86/lsr-delayed-fold.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s > /dev/null +; RUN: llc < %s > /dev/null ; ScalarEvolution misses an opportunity to fold ((trunc x) + (trunc -x) + y), ; but LSR should tolerate this. diff --git a/llvm/test/CodeGen/X86/lsr-i386.ll b/llvm/test/CodeGen/X86/lsr-i386.ll index 9338939fafd..c6fba85c9ec 100644 --- a/llvm/test/CodeGen/X86/lsr-i386.ll +++ b/llvm/test/CodeGen/X86/lsr-i386.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i386-pc-linux-gnu" ; PR7651 diff --git a/llvm/test/CodeGen/X86/lsr-interesting-step.ll b/llvm/test/CodeGen/X86/lsr-interesting-step.ll index fe8337e2981..53f7fb2460c 100644 --- a/llvm/test/CodeGen/X86/lsr-interesting-step.ll +++ b/llvm/test/CodeGen/X86/lsr-interesting-step.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -relocation-model=static -mtriple=x86_64-unknown-linux-gnu -asm-verbose=0 | FileCheck %s +; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown-linux-gnu -asm-verbose=0 | FileCheck %s ; The inner loop should require only one add (and no leas either). ; rdar://8100380 diff --git a/llvm/test/CodeGen/X86/lsr-negative-stride.ll b/llvm/test/CodeGen/X86/lsr-negative-stride.ll index b08356c8d30..19d3422f45b 100644 --- a/llvm/test/CodeGen/X86/lsr-negative-stride.ll +++ b/llvm/test/CodeGen/X86/lsr-negative-stride.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 > %t +; RUN: llc < %s -mtriple=i686-- > %t ; RUN: not grep neg %t ; RUN: not grep sub.*esp %t ; RUN: not grep esi %t diff --git a/llvm/test/CodeGen/X86/lsr-nonaffine.ll b/llvm/test/CodeGen/X86/lsr-nonaffine.ll index d825b5a76c0..6b82b9112eb 100644 --- a/llvm/test/CodeGen/X86/lsr-nonaffine.ll +++ b/llvm/test/CodeGen/X86/lsr-nonaffine.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -march=x86-64 -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s +; RUN: llc -asm-verbose=false -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s ; LSR should leave non-affine expressions alone because it currently ; doesn't know how to do anything with them, and when it tries, it diff --git a/llvm/test/CodeGen/X86/lsr-normalization.ll b/llvm/test/CodeGen/X86/lsr-normalization.ll index 09c892c9fc8..a8e3ab1ae99 100644 --- a/llvm/test/CodeGen/X86/lsr-normalization.ll +++ b/llvm/test/CodeGen/X86/lsr-normalization.ll @@ -1,6 +1,6 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=ASM -; RUN: llc -debug -o /dev/null < %s -march=x86-64 2>&1 | FileCheck %s --check-prefix=DBG +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=ASM +; RUN: llc -debug -o /dev/null < %s -mtriple=x86_64-- 2>&1 | FileCheck %s --check-prefix=DBG ; rdar://8168938 ; This testcase involves SCEV normalization with the exit value from diff --git a/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll b/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll index 29a8da2ef3a..874dbd71981 100644 --- a/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll +++ b/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s +; RUN: llc -mtriple=x86_64-- < %s define void @dw2102_i2c_transfer() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll b/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll index 31a1859e3b2..6aeaa97bdac 100644 --- a/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll +++ b/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s ; rdar://9081094 ; LSR shouldn't create lots of redundant address computations. diff --git a/llvm/test/CodeGen/X86/lsr-reuse.ll b/llvm/test/CodeGen/X86/lsr-reuse.ll index dd1e40f6a1e..85e0517978e 100644 --- a/llvm/test/CodeGen/X86/lsr-reuse.ll +++ b/llvm/test/CodeGen/X86/lsr-reuse.ll @@ -1,6 +1,6 @@ ; XFAIL: * ; ...should pass. See PR12324: misched bringup -; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s +; RUN: llc < %s -O3 -asm-verbose=false | FileCheck %s target datalayout = "e-p:64:64:64" target triple = "x86_64-unknown-unknown" diff --git a/llvm/test/CodeGen/X86/lsr-sort.ll b/llvm/test/CodeGen/X86/lsr-sort.ll index b85ddeb13b8..5aca606c1e1 100644 --- a/llvm/test/CodeGen/X86/lsr-sort.ll +++ b/llvm/test/CodeGen/X86/lsr-sort.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: grep inc %t | count 1 ; RUN: not grep incw %t diff --git a/llvm/test/CodeGen/X86/lsr-static-addr.ll b/llvm/test/CodeGen/X86/lsr-static-addr.ll index 3980bee9a30..1d4cb3c04e9 100644 --- a/llvm/test/CodeGen/X86/lsr-static-addr.ll +++ b/llvm/test/CodeGen/X86/lsr-static-addr.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86-64 -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s -; RUN: llc -march=x86-64 -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s +; RUN: llc -mcpu=generic -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck %s +; RUN: llc -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -asm-verbose=false < %s | FileCheck -check-prefix=ATOM %s ; CHECK: xorl %eax, %eax ; CHECK: movsd .LCPI0_0(%rip), %xmm0 diff --git a/llvm/test/CodeGen/X86/lsr-wrap.ll b/llvm/test/CodeGen/X86/lsr-wrap.ll index adf95447779..45139278d88 100644 --- a/llvm/test/CodeGen/X86/lsr-wrap.ll +++ b/llvm/test/CodeGen/X86/lsr-wrap.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s ; LSR would like to use a single IV for both of these, however it's ; not safe due to wraparound. diff --git a/llvm/test/CodeGen/X86/lzcnt.ll b/llvm/test/CodeGen/X86/lzcnt.ll index ff83f854094..1f0c6b3da2b 100644 --- a/llvm/test/CodeGen/X86/lzcnt.ll +++ b/llvm/test/CodeGen/X86/lzcnt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+lzcnt | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone diff --git a/llvm/test/CodeGen/X86/machine-copy-prop.mir b/llvm/test/CodeGen/X86/machine-copy-prop.mir index 225a43061c9..05454584d9a 100644 --- a/llvm/test/CodeGen/X86/machine-copy-prop.mir +++ b/llvm/test/CodeGen/X86/machine-copy-prop.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s +# RUN: llc -mtriple=i686-- -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s --- | declare void @foo() diff --git a/llvm/test/CodeGen/X86/masked-iv-safe.ll b/llvm/test/CodeGen/X86/masked-iv-safe.ll index 8c0a4d4f175..f40121e7b11 100644 --- a/llvm/test/CodeGen/X86/masked-iv-safe.ll +++ b/llvm/test/CodeGen/X86/masked-iv-safe.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86-64 | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-- | FileCheck %s ; Optimize away zext-inreg and sext-inreg on the loop induction ; variable using trip-count information. diff --git a/llvm/test/CodeGen/X86/masked-iv-unsafe.ll b/llvm/test/CodeGen/X86/masked-iv-unsafe.ll index 974a1cfb90d..53a1f0619ff 100644 --- a/llvm/test/CodeGen/X86/masked-iv-unsafe.ll +++ b/llvm/test/CodeGen/X86/masked-iv-unsafe.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: grep and %t | count 6 ; RUN: grep movzb %t | count 6 ; RUN: grep sar %t | count 12 diff --git a/llvm/test/CodeGen/X86/maskmovdqu.ll b/llvm/test/CodeGen/X86/maskmovdqu.ll index 0b3334d19f8..54d950abad8 100644 --- a/llvm/test/CodeGen/X86/maskmovdqu.ll +++ b/llvm/test/CodeGen/X86/maskmovdqu.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | grep -i EDI -; RUN: llc < %s -march=x86-64 -mattr=+sse2,-avx | grep -i RDI -; RUN: llc < %s -march=x86 -mattr=+avx | grep -i EDI -; RUN: llc < %s -march=x86-64 -mattr=+avx | grep -i RDI +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | grep -i EDI +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | grep -i RDI +; RUN: llc < %s -mtriple=i686-- -mattr=+avx | grep -i EDI +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | grep -i RDI ; rdar://6573467 define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind { diff --git a/llvm/test/CodeGen/X86/mature-mc-support.ll b/llvm/test/CodeGen/X86/mature-mc-support.ll index 3d6f0f66c18..fefd456966c 100644 --- a/llvm/test/CodeGen/X86/mature-mc-support.ll +++ b/llvm/test/CodeGen/X86/mature-mc-support.ll @@ -1,16 +1,16 @@ ; Test that inline assembly is parsed by the MC layer when MC support is mature ; (even when the output is assembly). -; RUN: not llc -march=x86 < %s > /dev/null 2> %t1 +; RUN: not llc -mtriple=i686-- < %s > /dev/null 2> %t1 ; RUN: FileCheck %s < %t1 -; RUN: not llc -march=x86 -filetype=obj < %s > /dev/null 2> %t2 +; RUN: not llc -mtriple=i686-- -filetype=obj < %s > /dev/null 2> %t2 ; RUN: FileCheck %s < %t2 -; RUN: not llc -march=x86-64 < %s > /dev/null 2> %t3 +; RUN: not llc -mtriple=x86_64-- < %s > /dev/null 2> %t3 ; RUN: FileCheck %s < %t3 -; RUN: not llc -march=x86-64 -filetype=obj < %s > /dev/null 2> %t4 +; RUN: not llc -mtriple=x86_64-- -filetype=obj < %s > /dev/null 2> %t4 ; RUN: FileCheck %s < %t4 module asm " .this_directive_is_very_unlikely_to_exist" diff --git a/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll b/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll index bc8b0de3eef..f18ae43ff59 100644 --- a/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll +++ b/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s define void @test(i1 %cnd) !prof !{!"function_entry_count", i64 1024} { ; CHECK-LABEL: @test diff --git a/llvm/test/CodeGen/X86/mem-promote-integers.ll b/llvm/test/CodeGen/X86/mem-promote-integers.ll index 3023cf2e900..688173e2acc 100644 --- a/llvm/test/CodeGen/X86/mem-promote-integers.ll +++ b/llvm/test/CodeGen/X86/mem-promote-integers.ll @@ -1,8 +1,8 @@ ; Test the basic functionality of integer element promotions of different types. ; This tests checks passing of arguments, loading and storing to memory and ; basic arithmetic. -; RUN: llc -march=x86 < %s > /dev/null -; RUN: llc -march=x86-64 < %s > /dev/null +; RUN: llc -mtriple=i686-- < %s > /dev/null +; RUN: llc -mtriple=x86_64-- < %s > /dev/null define <1 x i8> @test_1xi8(<1 x i8> %x, <1 x i8>* %b) { %bb = load <1 x i8>, <1 x i8>* %b diff --git a/llvm/test/CodeGen/X86/membarrier.ll b/llvm/test/CodeGen/X86/membarrier.ll index 5e569aabcad..45827ae73ec 100644 --- a/llvm/test/CodeGen/X86/membarrier.ll +++ b/llvm/test/CodeGen/X86/membarrier.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=-sse -O0 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0 ; PR9675 define i32 @t() { diff --git a/llvm/test/CodeGen/X86/memset.ll b/llvm/test/CodeGen/X86/memset.ll index 56f67c2ed7b..21cf30d35ec 100644 --- a/llvm/test/CodeGen/X86/memset.ll +++ b/llvm/test/CodeGen/X86/memset.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86 -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86 -; RUN: llc < %s -march=x86 -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM -; RUN: llc < %s -march=x86 -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM +; RUN: llc < %s -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM +; RUN: llc < %s -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM %struct.x = type { i16, i16 } diff --git a/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll b/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll index a7f5c214227..89aa7790371 100644 --- a/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll +++ b/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s +; RUN: llc -mtriple=x86_64-- < %s ; Ensure that MergeConsecutiveStores doesn't crash when dealing with ; i1 operands. diff --git a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll index 6ca964be957..1e7da98c8d7 100644 --- a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll +++ b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll @@ -1,6 +1,6 @@ ; REQUIRES: asserts -; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s -; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s 2>&1 | FileCheck -check-prefix=DBGDAG %s +; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s 2>&1 | FileCheck -check-prefix=DBGDAG %s ; It's OK to merge the load / store of the first 2 components, but ; they must not be placed on the same chain after merging. diff --git a/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll b/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll index 4d7badb2be2..15f341f4d6e 100644 --- a/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll +++ b/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s ; Both functions should produce the same code. The presence of debug values ; should not affect the scheduling strategy. ; Generated from: diff --git a/llvm/test/CodeGen/X86/misched-copy.ll b/llvm/test/CodeGen/X86/misched-copy.ll index 7abd157f147..f123490d124 100644 --- a/llvm/test/CodeGen/X86/misched-copy.ll +++ b/llvm/test/CodeGen/X86/misched-copy.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -verify-machineinstrs -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s ; ; Test scheduling of copy instructions. ; diff --git a/llvm/test/CodeGen/X86/misched-fusion.ll b/llvm/test/CodeGen/X86/misched-fusion.ll index 0975faacb9e..1559a37343a 100644 --- a/llvm/test/CodeGen/X86/misched-fusion.ll +++ b/llvm/test/CodeGen/X86/misched-fusion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s ; Verify that TEST+JE are scheduled together. ; CHECK: test_je diff --git a/llvm/test/CodeGen/X86/misched-matmul.ll b/llvm/test/CodeGen/X86/misched-matmul.ll index 384344691f9..be3f086809d 100644 --- a/llvm/test/CodeGen/X86/misched-matmul.ll +++ b/llvm/test/CodeGen/X86/misched-matmul.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s ; ; Verify that register pressure heuristics are working in MachineScheduler. ; diff --git a/llvm/test/CodeGen/X86/misched-matrix.ll b/llvm/test/CodeGen/X86/misched-matrix.ll index 94bbe75702c..495ca711e98 100644 --- a/llvm/test/CodeGen/X86/misched-matrix.ll +++ b/llvm/test/CodeGen/X86/misched-matrix.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \ +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \ ; RUN: -misched-topdown -verify-machineinstrs \ ; RUN: | FileCheck %s -check-prefix=TOPDOWN -; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \ +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \ ; RUN: -misched=ilpmin -verify-machineinstrs \ ; RUN: | FileCheck %s -check-prefix=ILPMIN -; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched \ +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched \ ; RUN: -misched=ilpmax -verify-machineinstrs \ ; RUN: | FileCheck %s -check-prefix=ILPMAX ; diff --git a/llvm/test/CodeGen/X86/misched-new.ll b/llvm/test/CodeGen/X86/misched-new.ll index 410a7f32064..4e42c931454 100644 --- a/llvm/test/CodeGen/X86/misched-new.ll +++ b/llvm/test/CodeGen/X86/misched-new.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86-64 -mcpu=core2 -x86-early-ifcvt -enable-misched \ +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \ ; RUN: -misched=shuffle -misched-bottomup -verify-machineinstrs \ ; RUN: | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=core2 -x86-early-ifcvt -enable-misched \ +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \ ; RUN: -misched=shuffle -misched-topdown -verify-machineinstrs \ ; RUN: | FileCheck %s --check-prefix TOPDOWN ; REQUIRES: asserts diff --git a/llvm/test/CodeGen/X86/mmx-arith.ll b/llvm/test/CodeGen/X86/mmx-arith.ll index 114d2535d60..7664ec2684f 100644 --- a/llvm/test/CodeGen/X86/mmx-arith.ll +++ b/llvm/test/CodeGen/X86/mmx-arith.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 | FileCheck -check-prefix=X64 %s ;; A basic sanity check to make sure that MMX arithmetic actually compiles. ;; First is a straight translation of the original with bitcasts as needed. diff --git a/llvm/test/CodeGen/X86/mmx-copy-gprs.ll b/llvm/test/CodeGen/X86/mmx-copy-gprs.ll index 6d39713833e..02b94e7e632 100644 --- a/llvm/test/CodeGen/X86/mmx-copy-gprs.ll +++ b/llvm/test/CodeGen/X86/mmx-copy-gprs.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=-sse2 | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs, ; increases the places that need to use emms. diff --git a/llvm/test/CodeGen/X86/mmx-intrinsics.ll b/llvm/test/CodeGen/X86/mmx-intrinsics.ll index 7647fccb580..b9655830619 100644 --- a/llvm/test/CodeGen/X86/mmx-intrinsics.ll +++ b/llvm/test/CodeGen/X86/mmx-intrinsics.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X86 -; RUN: llc < %s -march=x86 -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X86 -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X64 -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X64 +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X86 +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+ssse3,-avx | FileCheck %s --check-prefix=ALL --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+avx | FileCheck %s --check-prefix=ALL --check-prefix=X64 declare x86_mmx @llvm.x86.ssse3.phadd.w(x86_mmx, x86_mmx) nounwind readnone diff --git a/llvm/test/CodeGen/X86/mmx-only.ll b/llvm/test/CodeGen/X86/mmx-only.ll index 35598d5f6e1..eab67e08b95 100644 --- a/llvm/test/CodeGen/X86/mmx-only.ll +++ b/llvm/test/CodeGen/X86/mmx-only.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=+mmx,-sse | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,-sse | FileCheck %s ; Test that turning off sse doesn't turn off mmx. diff --git a/llvm/test/CodeGen/X86/movfs.ll b/llvm/test/CodeGen/X86/movfs.ll index 75b2404ec56..e6ac21d2614 100644 --- a/llvm/test/CodeGen/X86/movfs.ll +++ b/llvm/test/CodeGen/X86/movfs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep fs +; RUN: llc < %s -mtriple=i686-- | grep fs define i32 @foo() nounwind readonly { entry: diff --git a/llvm/test/CodeGen/X86/movgs.ll b/llvm/test/CodeGen/X86/movgs.ll index 8e964bf1689..f7426188977 100644 --- a/llvm/test/CodeGen/X86/movgs.ll +++ b/llvm/test/CodeGen/X86/movgs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32 ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64 diff --git a/llvm/test/CodeGen/X86/ms-inline-asm.ll b/llvm/test/CodeGen/X86/ms-inline-asm.ll index ec0630a4ce0..62525b072bb 100644 --- a/llvm/test/CodeGen/X86/ms-inline-asm.ll +++ b/llvm/test/CodeGen/X86/ms-inline-asm.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=core2 -no-integrated-as | FileCheck %s define i32 @t1() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/mul-legalize.ll b/llvm/test/CodeGen/X86/mul-legalize.ll index 339de310433..372186f0e55 100644 --- a/llvm/test/CodeGen/X86/mul-legalize.ll +++ b/llvm/test/CodeGen/X86/mul-legalize.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s ; PR2135 ; CHECK: 24576 diff --git a/llvm/test/CodeGen/X86/mul-remat.ll b/llvm/test/CodeGen/X86/mul-remat.ll index 3fa005079de..87921324f05 100644 --- a/llvm/test/CodeGen/X86/mul-remat.ll +++ b/llvm/test/CodeGen/X86/mul-remat.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 1 +; RUN: llc < %s -mtriple=i686-- | grep mov | count 1 ; PR1874 define i32 @test(i32 %a, i32 %b) { diff --git a/llvm/test/CodeGen/X86/mul-shift-reassoc.ll b/llvm/test/CodeGen/X86/mul-shift-reassoc.ll index 3777d8b8cfb..c1139b01fb6 100644 --- a/llvm/test/CodeGen/X86/mul-shift-reassoc.ll +++ b/llvm/test/CodeGen/X86/mul-shift-reassoc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | grep lea -; RUN: llc < %s -march=x86 | not grep add +; RUN: llc < %s -mtriple=i686-- | grep lea +; RUN: llc < %s -mtriple=i686-- | not grep add define i32 @test(i32 %X, i32 %Y) { ; Push the shl through the mul to allow an LEA to be formed, instead diff --git a/llvm/test/CodeGen/X86/mul128_sext_loop.ll b/llvm/test/CodeGen/X86/mul128_sext_loop.ll index efb7e02720b..3bbcccda81a 100644 --- a/llvm/test/CodeGen/X86/mul128_sext_loop.ll +++ b/llvm/test/CodeGen/X86/mul128_sext_loop.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s define void @test(i64* nocapture %arr, i64 %arrsize, i64 %factor) nounwind uwtable { %1 = icmp sgt i64 %arrsize, 0 diff --git a/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll b/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll index 9ebdf55d0e0..e55a3a2d35b 100644 --- a/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll +++ b/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -no-integrated-as +; RUN: llc < %s -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i686" diff --git a/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll b/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll index a87655e5eef..026d0a636e8 100644 --- a/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll +++ b/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -no-integrated-as +; RUN: llc < %s -no-integrated-as ; ModuleID = 'mult-alt-generic.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64" diff --git a/llvm/test/CodeGen/X86/mult-alt-x86.ll b/llvm/test/CodeGen/X86/mult-alt-x86.ll index 1c83fedad3c..18e245e80dc 100644 --- a/llvm/test/CodeGen/X86/mult-alt-x86.ll +++ b/llvm/test/CodeGen/X86/mult-alt-x86.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse2 -no-integrated-as +; RUN: llc < %s -mattr=+mmx,+sse2 -no-integrated-as ; ModuleID = 'mult-alt-x86.c' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target triple = "i686-pc-win32" diff --git a/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll b/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll index be778da5733..d54aea160c7 100644 --- a/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll +++ b/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s +; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -mtriple=x86_64-- -mcpu=nehalem -no-integrated-as < %s | FileCheck %s ; rdar://7236213 ; ; The scheduler's 2-address hack has been disabled, so there is diff --git a/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll b/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll index b0cb0611134..b55e3b24a58 100644 --- a/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll +++ b/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- declare {x86_fp80, x86_fp80} @test() diff --git a/llvm/test/CodeGen/X86/musttail-thiscall.ll b/llvm/test/CodeGen/X86/musttail-thiscall.ll index 1402f10b091..454c66cd675 100644 --- a/llvm/test/CodeGen/X86/musttail-thiscall.ll +++ b/llvm/test/CodeGen/X86/musttail-thiscall.ll @@ -1,5 +1,5 @@ -; RUN: llc -march=x86 < %s | FileCheck %s -; RUN: llc -march=x86 -O0 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -O0 < %s | FileCheck %s ; CHECK-LABEL: t1: ; CHECK: jmp {{_?}}t1_callee diff --git a/llvm/test/CodeGen/X86/musttail.ll b/llvm/test/CodeGen/X86/musttail.ll index ca5d3119cf1..927322b5723 100644 --- a/llvm/test/CodeGen/X86/musttail.ll +++ b/llvm/test/CodeGen/X86/musttail.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=x86 < %s | FileCheck %s -; RUN: llc -march=x86 -O0 < %s | FileCheck %s -; RUN: llc -march=x86 -disable-tail-calls < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -O0 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -disable-tail-calls < %s | FileCheck %s declare void @t1_callee(i8*) define void @t1(i32* %a) { diff --git a/llvm/test/CodeGen/X86/narrow-shl-cst.ll b/llvm/test/CodeGen/X86/narrow-shl-cst.ll index c9e9a3d2a97..20d1641015a 100644 --- a/llvm/test/CodeGen/X86/narrow-shl-cst.ll +++ b/llvm/test/CodeGen/X86/narrow-shl-cst.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; PR5039 define i32 @test1(i32 %x) nounwind { diff --git a/llvm/test/CodeGen/X86/narrow-shl-load.ll b/llvm/test/CodeGen/X86/narrow-shl-load.ll index 9dc0d749cb2..542944c3fe3 100644 --- a/llvm/test/CodeGen/X86/narrow-shl-load.ll +++ b/llvm/test/CodeGen/X86/narrow-shl-load.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/narrow_op-1.ll b/llvm/test/CodeGen/X86/narrow_op-1.ll index 592ff94c57b..96751abde28 100644 --- a/llvm/test/CodeGen/X86/narrow_op-1.ll +++ b/llvm/test/CodeGen/X86/narrow_op-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s %struct.bf = type { i64, i16, i16, i32 } @bfi = common global %struct.bf zeroinitializer, align 16 diff --git a/llvm/test/CodeGen/X86/neg-shl-add.ll b/llvm/test/CodeGen/X86/neg-shl-add.ll index 7aebc383dde..71d65074f84 100644 --- a/llvm/test/CodeGen/X86/neg-shl-add.ll +++ b/llvm/test/CodeGen/X86/neg-shl-add.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | not grep negq +; RUN: llc -mtriple=x86_64-- < %s | not grep negq ; These sequences don't need neg instructions; they can be done with ; a single shift and sub each. diff --git a/llvm/test/CodeGen/X86/neg_fp.ll b/llvm/test/CodeGen/X86/neg_fp.ll index efb02f8832e..9cfe686b277 100644 --- a/llvm/test/CodeGen/X86/neg_fp.ll +++ b/llvm/test/CodeGen/X86/neg_fp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse4.1 -o %t +; RUN: llc < %s -mtriple=i686-- -mattr=+sse4.1 -o %t ; RUN: grep xorps %t | count 1 ; Test that when we don't -enable-unsafe-fp-math, we don't do the optimization diff --git a/llvm/test/CodeGen/X86/negate-add-zero.ll b/llvm/test/CodeGen/X86/negate-add-zero.ll index 5911312053d..64f20a6f81b 100644 --- a/llvm/test/CodeGen/X86/negate-add-zero.ll +++ b/llvm/test/CodeGen/X86/negate-add-zero.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | not grep xor +; RUN: llc < %s -enable-unsafe-fp-math | not grep xor ; PR3374 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll b/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll index 332e0b9cc6e..d42b3444424 100644 --- a/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll +++ b/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep cvtsi2sd +; RUN: llc < %s -mtriple=x86_64-- | grep cvtsi2sd ; LSR previously eliminated the sitofp by introducing an induction ; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically diff --git a/llvm/test/CodeGen/X86/negative-subscript.ll b/llvm/test/CodeGen/X86/negative-subscript.ll index f69157551b7..f5dac9c5db1 100644 --- a/llvm/test/CodeGen/X86/negative-subscript.ll +++ b/llvm/test/CodeGen/X86/negative-subscript.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; rdar://6559995 @a = external global [255 x i8*], align 32 diff --git a/llvm/test/CodeGen/X86/negative_zero.ll b/llvm/test/CodeGen/X86/negative_zero.ll index c8c2cd753e0..534cfc67eea 100644 --- a/llvm/test/CodeGen/X86/negative_zero.ll +++ b/llvm/test/CodeGen/X86/negative_zero.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s ; CHECK: fchs diff --git a/llvm/test/CodeGen/X86/no-cmov.ll b/llvm/test/CodeGen/X86/no-cmov.ll index 8fc0f7075c0..5a40f9d5ad6 100644 --- a/llvm/test/CodeGen/X86/no-cmov.ll +++ b/llvm/test/CodeGen/X86/no-cmov.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -mcpu=i486 < %s | FileCheck %s define i32 @test1(i32 %g, i32* %j) { %tobool = icmp eq i32 %g, 0 diff --git a/llvm/test/CodeGen/X86/nobt.ll b/llvm/test/CodeGen/X86/nobt.ll index 35090e37291..b60723e9cfa 100644 --- a/llvm/test/CodeGen/X86/nobt.ll +++ b/llvm/test/CodeGen/X86/nobt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep btl +; RUN: llc < %s -mtriple=i686-- | not grep btl ; This tests some cases where BT must not be generated. See also bt.ll. ; Fixes 20040709-[12].c in gcc testsuite. diff --git a/llvm/test/CodeGen/X86/nocx16.ll b/llvm/test/CodeGen/X86/nocx16.ll index 8b995dafa75..f9a18b7022b 100644 --- a/llvm/test/CodeGen/X86/nocx16.ll +++ b/llvm/test/CodeGen/X86/nocx16.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=-cx16 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=-cx16 | FileCheck %s define void @test(i128* %a) nounwind { entry: ; CHECK: __sync_val_compare_and_swap_16 diff --git a/llvm/test/CodeGen/X86/nonconst-static-ev.ll b/llvm/test/CodeGen/X86/nonconst-static-ev.ll index 5449791f3fa..a0aa6152bd4 100644 --- a/llvm/test/CodeGen/X86/nonconst-static-ev.ll +++ b/llvm/test/CodeGen/X86/nonconst-static-ev.ll @@ -1,4 +1,4 @@ -; RUN: not llc -march=x86 -mtriple=x86_64-linux-gnu < %s 2> %t +; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @0 = global i8 extractvalue ([1 x i8] select (i1 ptrtoint (i32* @1 to i1), [1 x i8] [ i8 1 ], [1 x i8] [ i8 2 ]), 0) diff --git a/llvm/test/CodeGen/X86/nonconst-static-iv.ll b/llvm/test/CodeGen/X86/nonconst-static-iv.ll index 30613ef383a..b1a03cf8b2e 100644 --- a/llvm/test/CodeGen/X86/nonconst-static-iv.ll +++ b/llvm/test/CodeGen/X86/nonconst-static-iv.ll @@ -1,4 +1,4 @@ -; RUN: not llc -march=x86 -mtriple=x86_64-linux-gnu < %s 2> %t +; RUN: not llc -mtriple=i686-linux-gnu < %s 2> %t ; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s @0 = global i8 insertvalue( { i8 } select (i1 ptrtoint (i32* @1 to i1), { i8 } { i8 1 }, { i8 } { i8 2 }), i8 0, 0) diff --git a/llvm/test/CodeGen/X86/nosse-error1.ll b/llvm/test/CodeGen/X86/nosse-error1.ll index 7617d59f4a0..9a2242fde24 100644 --- a/llvm/test/CodeGen/X86/nosse-error1.ll +++ b/llvm/test/CodeGen/X86/nosse-error1.ll @@ -1,5 +1,5 @@ -; RUN: not llc < %s -march=x86-64 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: not llc < %s -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s +; RUN: llc < %s | FileCheck %s ; NOSSE: {{SSE register return with SSE disabled}} diff --git a/llvm/test/CodeGen/X86/nosse-error2.ll b/llvm/test/CodeGen/X86/nosse-error2.ll index 3da80aae686..b88ddf85e0e 100644 --- a/llvm/test/CodeGen/X86/nosse-error2.ll +++ b/llvm/test/CodeGen/X86/nosse-error2.ll @@ -1,5 +1,5 @@ -; RUN: not llc < %s -march=x86 -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s -; RUN: llc < %s -march=x86 -mcpu=i686 -mattr=+sse | FileCheck %s +; RUN: not llc < %s -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s +; RUN: llc < %s -mcpu=i686 -mattr=+sse | FileCheck %s ; NOSSE: {{SSE register return with SSE disabled}} diff --git a/llvm/test/CodeGen/X86/nosse-varargs.ll b/llvm/test/CodeGen/X86/nosse-varargs.ll index 8a81d0e7195..5b6da24bba7 100644 --- a/llvm/test/CodeGen/X86/nosse-varargs.ll +++ b/llvm/test/CodeGen/X86/nosse-varargs.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=-sse | FileCheck %s -check-prefix=NOSSE -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=YESSSE +; RUN: llc < %s -mattr=-sse | FileCheck %s -check-prefix=NOSSE +; RUN: llc < %s | FileCheck %s -check-prefix=YESSSE ; PR3403 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/null-streamer.ll b/llvm/test/CodeGen/X86/null-streamer.ll index 3571d37ed42..152f8b14a13 100644 --- a/llvm/test/CodeGen/X86/null-streamer.ll +++ b/llvm/test/CodeGen/X86/null-streamer.ll @@ -1,6 +1,6 @@ ; Check the MCNullStreamer operates correctly, at least on a minimal test case. ; -; RUN: llc -filetype=null -o %t -march=x86 %s +; RUN: llc -filetype=null -o %t -mtriple=i686-- %s ; RUN: llc -filetype=null -o %t -mtriple=i686-cygwin %s source_filename = "test/CodeGen/X86/null-streamer.ll" diff --git a/llvm/test/CodeGen/X86/object-size.ll b/llvm/test/CodeGen/X86/object-size.ll index 9f42af4aea9..b795e0fda8b 100644 --- a/llvm/test/CodeGen/X86/object-size.ll +++ b/llvm/test/CodeGen/X86/object-size.ll @@ -1,4 +1,4 @@ -; RUN: llc -O0 < %s -march=x86-64 | FileCheck %s +; RUN: llc -O0 < %s | FileCheck %s ; ModuleID = 'ts.c' target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/llvm/test/CodeGen/X86/opt-ext-uses.ll b/llvm/test/CodeGen/X86/opt-ext-uses.ll index b654a81c11c..49429b258a2 100644 --- a/llvm/test/CodeGen/X86/opt-ext-uses.ll +++ b/llvm/test/CodeGen/X86/opt-ext-uses.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; This test should get one and only one register to register mov. ; CHECK-LABEL: t: diff --git a/llvm/test/CodeGen/X86/optimize-max-0.ll b/llvm/test/CodeGen/X86/optimize-max-0.ll index 006592aaade..2dde95738d1 100644 --- a/llvm/test/CodeGen/X86/optimize-max-0.ll +++ b/llvm/test/CodeGen/X86/optimize-max-0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep cmov +; RUN: llc < %s | not grep cmov ; LSR should be able to eliminate the max computations by ; making the loops use slt/ult comparisons instead of ne comparisons. diff --git a/llvm/test/CodeGen/X86/overlap-shift.ll b/llvm/test/CodeGen/X86/overlap-shift.ll index e987495f2c0..c1e15f9894a 100644 --- a/llvm/test/CodeGen/X86/overlap-shift.ll +++ b/llvm/test/CodeGen/X86/overlap-shift.ll @@ -6,7 +6,7 @@ ; Check that the shift gets turned into an LEA. -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \ ; RUN: not grep "mov E.X, E.X" @G = external global i32 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/packed_struct.ll b/llvm/test/CodeGen/X86/packed_struct.ll index c9aeb7deb4f..e00a772ecb0 100644 --- a/llvm/test/CodeGen/X86/packed_struct.ll +++ b/llvm/test/CodeGen/X86/packed_struct.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 > %t +; RUN: llc < %s > %t ; RUN: grep foos+5 %t ; RUN: grep foos+1 %t ; RUN: grep foos+9 %t diff --git a/llvm/test/CodeGen/X86/peep-test-0.ll b/llvm/test/CodeGen/X86/peep-test-0.ll index 1772f008b94..2d5e7a1484c 100644 --- a/llvm/test/CodeGen/X86/peep-test-0.ll +++ b/llvm/test/CodeGen/X86/peep-test-0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: not grep cmp %t ; RUN: not grep test %t diff --git a/llvm/test/CodeGen/X86/peep-test-1.ll b/llvm/test/CodeGen/X86/peep-test-1.ll index 7448da3894d..e3d34d30f7f 100644 --- a/llvm/test/CodeGen/X86/peep-test-1.ll +++ b/llvm/test/CodeGen/X86/peep-test-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 > %t +; RUN: llc < %s -mtriple=i686-- > %t ; RUN: grep dec %t | count 1 ; RUN: not grep test %t ; RUN: not grep cmp %t diff --git a/llvm/test/CodeGen/X86/peep-test-2.ll b/llvm/test/CodeGen/X86/peep-test-2.ll index e43b8ef54cf..276e57551c1 100644 --- a/llvm/test/CodeGen/X86/peep-test-2.ll +++ b/llvm/test/CodeGen/X86/peep-test-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -verify-machineinstrs -march=x86 | FileCheck %s +; RUN: llc < %s -verify-machineinstrs | FileCheck %s ; CHECK: testl diff --git a/llvm/test/CodeGen/X86/peep-test-3.ll b/llvm/test/CodeGen/X86/peep-test-3.ll index b3d4f585f45..9f8806a379b 100644 --- a/llvm/test/CodeGen/X86/peep-test-3.ll +++ b/llvm/test/CodeGen/X86/peep-test-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -post-RA-scheduler=false | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s ; rdar://7226797 ; LLVM should omit the testl and use the flags result from the orl. diff --git a/llvm/test/CodeGen/X86/peephole-multiple-folds.ll b/llvm/test/CodeGen/X86/peephole-multiple-folds.ll index 9fcc1a20798..848f9fe2412 100644 --- a/llvm/test/CodeGen/X86/peephole-multiple-folds.ll +++ b/llvm/test/CodeGen/X86/peephole-multiple-folds.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -mcpu=core-avx2 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- -mcpu=core-avx2 < %s | FileCheck %s ; ; Test multiple peephole-time folds in a single basic block. ; <rdar://problem/16478629> diff --git a/llvm/test/CodeGen/X86/phi-bit-propagation.ll b/llvm/test/CodeGen/X86/phi-bit-propagation.ll index 37f3f096556..5d382344c21 100644 --- a/llvm/test/CodeGen/X86/phi-bit-propagation.ll +++ b/llvm/test/CodeGen/X86/phi-bit-propagation.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s %"class.std::bitset" = type { [8 x i8] } diff --git a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll b/llvm/test/CodeGen/X86/phi-immediate-factoring.ll index 8405ca436fd..e90f66df871 100644 --- a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll +++ b/llvm/test/CodeGen/X86/phi-immediate-factoring.ll @@ -1,7 +1,7 @@ ; REQUIRES: asserts -; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3 -; RUN: llc < %s -disable-preheader-prot=true -march=x86 -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6 -; RUN: llc < %s -disable-preheader-prot=false -march=x86 -stats 2>&1 | grep "Number of blocks eliminated" | grep 3 +; RUN: llc < %s -disable-preheader-prot=true -stats 2>&1 | grep "Number of blocks eliminated" | grep 3 +; RUN: llc < %s -disable-preheader-prot=true -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6 +; RUN: llc < %s -disable-preheader-prot=false -stats 2>&1 | grep "Number of blocks eliminated" | grep 3 ; PR1296 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" diff --git a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll index 8b370d93afd..a5453b9e1f8 100644 --- a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll +++ b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s -; RUN: llc -O0 < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s -; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s +; RUN: llc -O0 < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s ; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling. @.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll index 13605b789bf..9c329018a13 100644 --- a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll +++ b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; RUN: llc -no-phi-elim-live-out-early-exit -terminal-rule < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s +; RUN: llc -no-phi-elim-live-out-early-exit -terminal-rule < %s -mtriple=i686-- | FileCheck %s ; PR2659 define i32 @binomial(i32 %n, i32 %k) nounwind { diff --git a/llvm/test/CodeGen/X86/pmovext.ll b/llvm/test/CodeGen/X86/pmovext.ll index 6c76949fb78..795bf27af92 100644 --- a/llvm/test/CodeGen/X86/pmovext.ll +++ b/llvm/test/CodeGen/X86/pmovext.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s ; rdar://11897677 diff --git a/llvm/test/CodeGen/X86/postalloc-coalescing.ll b/llvm/test/CodeGen/X86/postalloc-coalescing.ll index fe6f521f4d3..83c435e5e2d 100644 --- a/llvm/test/CodeGen/X86/postalloc-coalescing.ll +++ b/llvm/test/CodeGen/X86/postalloc-coalescing.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 3 +; RUN: llc < %s -mtriple=i686-- | grep mov | count 3 define fastcc i32 @_Z18yy_get_next_bufferv() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/pr10068.ll b/llvm/test/CodeGen/X86/pr10068.ll index 8829c5dbbf7..7a3da26b236 100644 --- a/llvm/test/CodeGen/X86/pr10068.ll +++ b/llvm/test/CodeGen/X86/pr10068.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- define void @foobar() { entry: diff --git a/llvm/test/CodeGen/X86/pr10523.ll b/llvm/test/CodeGen/X86/pr10523.ll index 0ec22a08e44..c5013017ce8 100644 --- a/llvm/test/CodeGen/X86/pr10523.ll +++ b/llvm/test/CodeGen/X86/pr10523.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1 ; No check in a crash test diff --git a/llvm/test/CodeGen/X86/pr10524.ll b/llvm/test/CodeGen/X86/pr10524.ll index 12bdba9fa59..5bb4aeddb89 100644 --- a/llvm/test/CodeGen/X86/pr10524.ll +++ b/llvm/test/CodeGen/X86/pr10524.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1 ; No check in a crash test diff --git a/llvm/test/CodeGen/X86/pr10525.ll b/llvm/test/CodeGen/X86/pr10525.ll index 436d89caabe..34e87809841 100644 --- a/llvm/test/CodeGen/X86/pr10525.ll +++ b/llvm/test/CodeGen/X86/pr10525.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1 ; No check in a crash test diff --git a/llvm/test/CodeGen/X86/pr10526.ll b/llvm/test/CodeGen/X86/pr10526.ll index 9fa83ce17b5..822f18cdca2 100644 --- a/llvm/test/CodeGen/X86/pr10526.ll +++ b/llvm/test/CodeGen/X86/pr10526.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2,+sse4.1 +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1 ; No check in a crash test diff --git a/llvm/test/CodeGen/X86/pr11468.ll b/llvm/test/CodeGen/X86/pr11468.ll index 7a2cc5b1a60..d2bd4d8d8b0 100644 --- a/llvm/test/CodeGen/X86/pr11468.ll +++ b/llvm/test/CodeGen/X86/pr11468.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s +; RUN: llc < %s -stackrealign -stack-alignment=32 -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s ; PR11468 define void @f(i64 %sz) uwtable { diff --git a/llvm/test/CodeGen/X86/pr11998.ll b/llvm/test/CodeGen/X86/pr11998.ll index 1baf07924d3..caaf2710fba 100644 --- a/llvm/test/CodeGen/X86/pr11998.ll +++ b/llvm/test/CodeGen/X86/pr11998.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=corei7-avx -march=x86-64 -mattr=+avx +; RUN: llc < %s -mcpu=corei7-avx -mtriple=x86_64-- -mattr=+avx define void @autogen_51367_5000(i8) { BB: diff --git a/llvm/test/CodeGen/X86/pr12889.ll b/llvm/test/CodeGen/X86/pr12889.ll index 8234fcc67e0..29e0c0416e6 100644 --- a/llvm/test/CodeGen/X86/pr12889.ll +++ b/llvm/test/CodeGen/X86/pr12889.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" -target triple = "x86_64-unknown-linux-gnu" +target triple = "i686-unknown-linux-gnu" @c0 = common global i8 0, align 1 diff --git a/llvm/test/CodeGen/X86/pr13220.ll b/llvm/test/CodeGen/X86/pr13220.ll index b9ac4b63ecf..d9e915a0974 100644 --- a/llvm/test/CodeGen/X86/pr13220.ll +++ b/llvm/test/CodeGen/X86/pr13220.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s +; RUN: llc -mtriple=i686-- < %s ; PR13220 define <8 x i32> @foo(<8 x i96> %x) { diff --git a/llvm/test/CodeGen/X86/pr14562.ll b/llvm/test/CodeGen/X86/pr14562.ll index 31674546423..1ba962c9417 100644 --- a/llvm/test/CodeGen/X86/pr14562.ll +++ b/llvm/test/CodeGen/X86/pr14562.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @temp1 = global i64 -77129852189294865, align 8 diff --git a/llvm/test/CodeGen/X86/pr20088.ll b/llvm/test/CodeGen/X86/pr20088.ll index 3a829622424..75d1959a5af 100644 --- a/llvm/test/CodeGen/X86/pr20088.ll +++ b/llvm/test/CodeGen/X86/pr20088.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>) diff --git a/llvm/test/CodeGen/X86/pr21099.ll b/llvm/test/CodeGen/X86/pr21099.ll index cd8205dbc81..36f531db609 100644 --- a/llvm/test/CodeGen/X86/pr21099.ll +++ b/llvm/test/CodeGen/X86/pr21099.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -O2 -march=x86-64 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -O2 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s define void @pr21099(i64* %p) { ; CHECK-LABEL: pr21099 diff --git a/llvm/test/CodeGen/X86/pr2326.ll b/llvm/test/CodeGen/X86/pr2326.ll index 88c7bb58670..ec2844c4269 100644 --- a/llvm/test/CodeGen/X86/pr2326.ll +++ b/llvm/test/CodeGen/X86/pr2326.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep sete +; RUN: llc < %s -mtriple=i686-- | grep sete ; PR2326 define i32 @func_59(i32 %p_60) nounwind { diff --git a/llvm/test/CodeGen/X86/pr23273.ll b/llvm/test/CodeGen/X86/pr23273.ll index 2702eb820f2..5311e9400d9 100644 --- a/llvm/test/CodeGen/X86/pr23273.ll +++ b/llvm/test/CodeGen/X86/pr23273.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -march=x86 -mattr=-sse2 -fast-isel < %s +; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -mattr=-sse2 -fast-isel < %s ; Verify that the backend doesn't crash during fast-isel with an assertion ; failure when selecting a int-to-double conversion. The fast selection routine diff --git a/llvm/test/CodeGen/X86/pr2656.ll b/llvm/test/CodeGen/X86/pr2656.ll index c54ae3d3502..f712fcb6a29 100644 --- a/llvm/test/CodeGen/X86/pr2656.ll +++ b/llvm/test/CodeGen/X86/pr2656.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mattr=+sse2 | FileCheck %s ; PR2656 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/pr2659.ll b/llvm/test/CodeGen/X86/pr2659.ll index cc8f8475cac..05acbc8e901 100644 --- a/llvm/test/CodeGen/X86/pr2659.ll +++ b/llvm/test/CodeGen/X86/pr2659.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s ; PR2659 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/pr26652.ll b/llvm/test/CodeGen/X86/pr26652.ll index c47128a51e9..81a2657fc4a 100644 --- a/llvm/test/CodeGen/X86/pr26652.ll +++ b/llvm/test/CodeGen/X86/pr26652.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR26652 define <2 x i32> @test(<4 x i32> %a, <4 x i32> %b) { diff --git a/llvm/test/CodeGen/X86/pr2982.ll b/llvm/test/CodeGen/X86/pr2982.ll index b7902b8cc3a..3fc6f0559bc 100644 --- a/llvm/test/CodeGen/X86/pr2982.ll +++ b/llvm/test/CodeGen/X86/pr2982.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s ; PR2982 target datalayout = diff --git a/llvm/test/CodeGen/X86/pr3216.ll b/llvm/test/CodeGen/X86/pr3216.ll index 23dcf5693cd..237ed7c4d60 100644 --- a/llvm/test/CodeGen/X86/pr3216.ll +++ b/llvm/test/CodeGen/X86/pr3216.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @foo = global i8 127 diff --git a/llvm/test/CodeGen/X86/pr3241.ll b/llvm/test/CodeGen/X86/pr3241.ll index f89634d5b82..a324cf2ffa9 100644 --- a/llvm/test/CodeGen/X86/pr3241.ll +++ b/llvm/test/CodeGen/X86/pr3241.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3241 @g_620 = external global i32 diff --git a/llvm/test/CodeGen/X86/pr3243.ll b/llvm/test/CodeGen/X86/pr3243.ll index 483b5bf3a2a..f5fad20bf7d 100644 --- a/llvm/test/CodeGen/X86/pr3243.ll +++ b/llvm/test/CodeGen/X86/pr3243.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3243 declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize diff --git a/llvm/test/CodeGen/X86/pr3244.ll b/llvm/test/CodeGen/X86/pr3244.ll index c6419d8ce76..166ca90d799 100644 --- a/llvm/test/CodeGen/X86/pr3244.ll +++ b/llvm/test/CodeGen/X86/pr3244.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3244 @g_62 = external global i16 ; <i16*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/pr3250.ll b/llvm/test/CodeGen/X86/pr3250.ll index 4ab989eaf77..ab6af4ef531 100644 --- a/llvm/test/CodeGen/X86/pr3250.ll +++ b/llvm/test/CodeGen/X86/pr3250.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3250 declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind diff --git a/llvm/test/CodeGen/X86/pr3317.ll b/llvm/test/CodeGen/X86/pr3317.ll index cab8ae6b73f..9c4ba39c02b 100644 --- a/llvm/test/CodeGen/X86/pr3317.ll +++ b/llvm/test/CodeGen/X86/pr3317.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- ; PR3317 %VT = type [0 x i32 (...)*] diff --git a/llvm/test/CodeGen/X86/pr3366.ll b/llvm/test/CodeGen/X86/pr3366.ll index b89a69ab7d4..f72a35185b4 100644 --- a/llvm/test/CodeGen/X86/pr3366.ll +++ b/llvm/test/CodeGen/X86/pr3366.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-cgp-branch-opts | grep movzbl +; RUN: llc < %s -mtriple=i686-- -disable-cgp-branch-opts | grep movzbl ; PR3366 define void @_ada_c34002a() nounwind { diff --git a/llvm/test/CodeGen/X86/pr3522.ll b/llvm/test/CodeGen/X86/pr3522.ll index 9e048d59d4e..d7a332b1fed 100644 --- a/llvm/test/CodeGen/X86/pr3522.ll +++ b/llvm/test/CodeGen/X86/pr3522.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -stats 2>&1 | not grep "instructions sunk" +; RUN: llc < %s -stats 2>&1 | not grep "instructions sunk" ; PR3522 target triple = "i386-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/pr5145.ll b/llvm/test/CodeGen/X86/pr5145.ll index 259d55b030e..7da7c299791 100644 --- a/llvm/test/CodeGen/X86/pr5145.ll +++ b/llvm/test/CodeGen/X86/pr5145.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s @sc8 = external global i8 define void @atomic_maxmin_i8() { diff --git a/llvm/test/CodeGen/X86/pr7882.ll b/llvm/test/CodeGen/X86/pr7882.ll index 88404dbe125..13cece8a336 100644 --- a/llvm/test/CodeGen/X86/pr7882.ll +++ b/llvm/test/CodeGen/X86/pr7882.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin -pre-RA-sched=fast \ +; RUN: llc < %s -mtriple=i686-apple-darwin -pre-RA-sched=fast \ ; RUN: | FileCheck %s ; make sure scheduler honors the flags clobber. PR 7882. diff --git a/llvm/test/CodeGen/X86/prefetch.ll b/llvm/test/CodeGen/X86/prefetch.ll index d6571acbbb7..17a9ac994a7 100644 --- a/llvm/test/CodeGen/X86/prefetch.ll +++ b/llvm/test/CodeGen/X86/prefetch.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW -; RUN: llc < %s -march=x86 -mcpu=slm | FileCheck %s -check-prefix=SLM -; RUN: llc < %s -march=x86 -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW -; RUN: llc < %s -march=x86 -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW +; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW +; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=SLM +; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=PRFCHW +; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=NOPRFCHW ; rdar://10538297 diff --git a/llvm/test/CodeGen/X86/promote-trunc.ll b/llvm/test/CodeGen/X86/promote-trunc.ll index a20557a1fef..d42108e5b50 100644 --- a/llvm/test/CodeGen/X86/promote-trunc.ll +++ b/llvm/test/CodeGen/X86/promote-trunc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- define<4 x i8> @func_8_64() { %F = load <4 x i64>, <4 x i64>* undef diff --git a/llvm/test/CodeGen/X86/promote.ll b/llvm/test/CodeGen/X86/promote.ll index 38cdc14b380..37dfc881a59 100644 --- a/llvm/test/CodeGen/X86/promote.ll +++ b/llvm/test/CodeGen/X86/promote.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mcpu=corei7 | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i8:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" diff --git a/llvm/test/CodeGen/X86/pshufd-combine-crash.ll b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll index 84c69e32bcc..3f181b43c78 100644 --- a/llvm/test/CodeGen/X86/pshufd-combine-crash.ll +++ b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 -debug +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -debug ; REQUIRES: asserts diff --git a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll index 972372151bc..c49d5c91f61 100644 --- a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll +++ b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s %struct.obj = type { i64 } diff --git a/llvm/test/CodeGen/X86/rdpmc.ll b/llvm/test/CodeGen/X86/rdpmc.ll index 7f1ca469c0b..8c2e0711218 100644 --- a/llvm/test/CodeGen/X86/rdpmc.ll +++ b/llvm/test/CodeGen/X86/rdpmc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64 -; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64 +; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86 ; Verify that we correctly lower the "Read Performance-Monitoring Counters" ; x86 builtin. diff --git a/llvm/test/CodeGen/X86/rdtsc.ll b/llvm/test/CodeGen/X86/rdtsc.ll index dba614ad104..7b885a6248e 100644 --- a/llvm/test/CodeGen/X86/rdtsc.ll +++ b/llvm/test/CodeGen/X86/rdtsc.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mcpu=generic | FileCheck %s -; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=X86 ; Verify that we correctly lower ISD::READCYCLECOUNTER. diff --git a/llvm/test/CodeGen/X86/regpressure.ll b/llvm/test/CodeGen/X86/regpressure.ll index 8f352b8fbb5..eabcbe95b77 100644 --- a/llvm/test/CodeGen/X86/regpressure.ll +++ b/llvm/test/CodeGen/X86/regpressure.ll @@ -2,7 +2,7 @@ ;; Both functions in this testcase should codegen to the same function, and ;; neither of them should require spilling anything to the stack. -; RUN: llc < %s -march=x86 -stats 2>&1 | \ +; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \ ; RUN: not grep "Number of register spills" ;; This can be compiled to use three registers if the loads are not diff --git a/llvm/test/CodeGen/X86/rem_crash.ll b/llvm/test/CodeGen/X86/rem_crash.ll index a5529a769a0..05a613c8adb 100644 --- a/llvm/test/CodeGen/X86/rem_crash.ll +++ b/llvm/test/CodeGen/X86/rem_crash.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=i686-- +; RUN: llc < %s -mtriple=x86_64-- define i8 @test_minsize_uu8(i8 %x) minsize optsize { entry: diff --git a/llvm/test/CodeGen/X86/ret-addr.ll b/llvm/test/CodeGen/X86/ret-addr.ll index b7b57ab3b84..cf164cc567a 100644 --- a/llvm/test/CodeGen/X86/ret-addr.ll +++ b/llvm/test/CodeGen/X86/ret-addr.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -disable-fp-elim -march=x86 | not grep xor -; RUN: llc < %s -disable-fp-elim -march=x86-64 | not grep xor +; RUN: llc < %s -disable-fp-elim -mtriple=i686-- | not grep xor +; RUN: llc < %s -disable-fp-elim -mtriple=x86_64-- | not grep xor define i8* @h() nounwind readnone optsize { entry: diff --git a/llvm/test/CodeGen/X86/ret-i64-0.ll b/llvm/test/CodeGen/X86/ret-i64-0.ll index bca0f056b90..be82129de21 100644 --- a/llvm/test/CodeGen/X86/ret-i64-0.ll +++ b/llvm/test/CodeGen/X86/ret-i64-0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep xor | count 2 +; RUN: llc < %s -mtriple=i686-- | grep xor | count 2 define i64 @foo() nounwind { ret i64 0 diff --git a/llvm/test/CodeGen/X86/rip-rel-address.ll b/llvm/test/CodeGen/X86/rip-rel-address.ll index b49d597d9f0..5a2f2627d3b 100644 --- a/llvm/test/CodeGen/X86/rip-rel-address.ll +++ b/llvm/test/CodeGen/X86/rip-rel-address.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64 +; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64 ; Use %rip-relative addressing even in static mode on x86-64, because diff --git a/llvm/test/CodeGen/X86/rot16.ll b/llvm/test/CodeGen/X86/rot16.ll index 6d7c702afc4..de08a3e35be 100644 --- a/llvm/test/CodeGen/X86/rot16.ll +++ b/llvm/test/CodeGen/X86/rot16.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=generic | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/rot32.ll b/llvm/test/CodeGen/X86/rot32.ll index 79ecbe0514d..4f2ed2d61e8 100644 --- a/llvm/test/CodeGen/X86/rot32.ll +++ b/llvm/test/CodeGen/X86/rot32.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s -; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD -; RUN: llc < %s -march=x86 -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2 +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD +; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2 define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/rot64.ll b/llvm/test/CodeGen/X86/rot64.ll index 976acbb0167..382d242c4f0 100644 --- a/llvm/test/CodeGen/X86/rot64.ll +++ b/llvm/test/CodeGen/X86/rot64.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD -; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD +; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2 define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/rotate2.ll b/llvm/test/CodeGen/X86/rotate2.ll index 2316c708507..73f11ab1f36 100644 --- a/llvm/test/CodeGen/X86/rotate2.ll +++ b/llvm/test/CodeGen/X86/rotate2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7 | grep rol | count 2 +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | grep rol | count 2 define i64 @test1(i64 %x) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll b/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll index 7191e0453a6..e293bd606d0 100644 --- a/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll +++ b/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK-LABEL: test define i64 @test(i64 %a, i256 %b, i1 %c) { diff --git a/llvm/test/CodeGen/X86/scalar-extract.ll b/llvm/test/CodeGen/X86/scalar-extract.ll index b8ef5e74c43..dd1b9a55eaf 100644 --- a/llvm/test/CodeGen/X86/scalar-extract.ll +++ b/llvm/test/CodeGen/X86/scalar-extract.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx -o %t +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx -o %t ; RUN: not grep movq %t ; Check that widening doesn't introduce a mmx register in this case when diff --git a/llvm/test/CodeGen/X86/scalar_sse_minmax.ll b/llvm/test/CodeGen/X86/scalar_sse_minmax.ll index 5ca3f85ce02..6a619f7f2c8 100644 --- a/llvm/test/CodeGen/X86/scalar_sse_minmax.ll +++ b/llvm/test/CodeGen/X86/scalar_sse_minmax.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse,+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+sse2 | FileCheck %s define float @min1(float %x, float %y) { ; CHECK-LABEL: min1 diff --git a/llvm/test/CodeGen/X86/scalar_widen_div.ll b/llvm/test/CodeGen/X86/scalar_widen_div.ll index 1671f8f8910..8945530648b 100644 --- a/llvm/test/CodeGen/X86/scalar_widen_div.ll +++ b/llvm/test/CodeGen/X86/scalar_widen_div.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse4.2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s ; Verify when widening a divide/remainder operation, we only generate a ; divide/rem per element since divide/remainder can trap. diff --git a/llvm/test/CodeGen/X86/scalarize-bitcast.ll b/llvm/test/CodeGen/X86/scalarize-bitcast.ll index 60650f46302..25cfaa2f353 100644 --- a/llvm/test/CodeGen/X86/scalarize-bitcast.ll +++ b/llvm/test/CodeGen/X86/scalarize-bitcast.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s ; PR3886 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/llvm/test/CodeGen/X86/scheduler-backtracking.ll b/llvm/test/CodeGen/X86/scheduler-backtracking.ll index 98471ee90d5..d62f07fa0f7 100644 --- a/llvm/test/CodeGen/X86/scheduler-backtracking.ll +++ b/llvm/test/CodeGen/X86/scheduler-backtracking.ll @@ -1,8 +1,8 @@ -; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-ilp | FileCheck %s -; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-hybrid | FileCheck %s -; RUN: llc -march=x86-64 < %s -pre-RA-sched=source | FileCheck %s -; RUN: llc -march=x86-64 < %s -pre-RA-sched=list-burr | FileCheck %s -; RUN: llc -march=x86-64 < %s -pre-RA-sched=linearize | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-ilp | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-hybrid | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=source | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=list-burr | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s -pre-RA-sched=linearize | FileCheck %s ; PR22304 https://llvm.org/bugs/show_bug.cgi?id=22304 ; Tests checking backtracking in source scheduler. llc used to crash on them. diff --git a/llvm/test/CodeGen/X86/sdiv-exact.ll b/llvm/test/CodeGen/X86/sdiv-exact.ll index a6ace5bc31c..6efe867b9d4 100644 --- a/llvm/test/CodeGen/X86/sdiv-exact.ll +++ b/llvm/test/CodeGen/X86/sdiv-exact.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s define i32 @test1(i32 %x) { %div = sdiv exact i32 %x, 25 diff --git a/llvm/test/CodeGen/X86/sdiv-pow2.ll b/llvm/test/CodeGen/X86/sdiv-pow2.ll index e89f76931e1..d3042f6ca4b 100644 --- a/llvm/test/CodeGen/X86/sdiv-pow2.ll +++ b/llvm/test/CodeGen/X86/sdiv-pow2.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s ; No attributes, should not use idiv define i32 @test1(i32 inreg %x) { diff --git a/llvm/test/CodeGen/X86/setoeq.ll b/llvm/test/CodeGen/X86/setoeq.ll index aa2f0af55cc..5c2f1d5c5da 100644 --- a/llvm/test/CodeGen/X86/setoeq.ll +++ b/llvm/test/CodeGen/X86/setoeq.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s define zeroext i8 @t(double %x) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/setuge.ll b/llvm/test/CodeGen/X86/setuge.ll index 4ca2f1871c0..96187198ac6 100644 --- a/llvm/test/CodeGen/X86/setuge.ll +++ b/llvm/test/CodeGen/X86/setuge.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep set +; RUN: llc < %s -mtriple=i686-- | not grep set declare i1 @llvm.isunordered.f32(float, float) diff --git a/llvm/test/CodeGen/X86/sext-load.ll b/llvm/test/CodeGen/X86/sext-load.ll index 2ea6e012192..4300c8f3a71 100644 --- a/llvm/test/CodeGen/X86/sext-load.ll +++ b/llvm/test/CodeGen/X86/sext-load.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; When doing sign extension, use the sext-load lowering to take advantage of ; x86's sign extension during loads. diff --git a/llvm/test/CodeGen/X86/sext-subreg.ll b/llvm/test/CodeGen/X86/sext-subreg.ll index e0c8ff9b5e0..f96f5b2a7c9 100644 --- a/llvm/test/CodeGen/X86/sext-subreg.ll +++ b/llvm/test/CodeGen/X86/sext-subreg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; rdar://7529457 define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind { diff --git a/llvm/test/CodeGen/X86/shift-coalesce.ll b/llvm/test/CodeGen/X86/shift-coalesce.ll index dee7d373dce..7f2c3b5a075 100644 --- a/llvm/test/CodeGen/X86/shift-coalesce.ll +++ b/llvm/test/CodeGen/X86/shift-coalesce.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \ ; RUN: grep "shld.*cl" -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \ +; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | \ ; RUN: not grep "mov cl, bl" ; PR687 diff --git a/llvm/test/CodeGen/X86/shift-i128.ll b/llvm/test/CodeGen/X86/shift-i128.ll index 802277ea112..9c69aab5b3d 100644 --- a/llvm/test/CodeGen/X86/shift-i128.ll +++ b/llvm/test/CodeGen/X86/shift-i128.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=i686-- +; RUN: llc < %s -mtriple=x86_64-- ; ; Scalars diff --git a/llvm/test/CodeGen/X86/shift-i256.ll b/llvm/test/CodeGen/X86/shift-i256.ll index 866e7e67fb0..4fa3303baf0 100644 --- a/llvm/test/CodeGen/X86/shift-i256.ll +++ b/llvm/test/CodeGen/X86/shift-i256.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s -check-prefix=CHECK-X64 -; RUN: llc < %s -march=x86-64 -O2 | FileCheck %s -check-prefix=CHECK-X64 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s -check-prefix=CHECK-X64 +; RUN: llc < %s -mtriple=x86_64-- -O2 | FileCheck %s -check-prefix=CHECK-X64 ; CHECK-LABEL: shift1 define void @shift1(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone { diff --git a/llvm/test/CodeGen/X86/shift-one.ll b/llvm/test/CodeGen/X86/shift-one.ll index 1ff02eb53e9..d961eb1451b 100644 --- a/llvm/test/CodeGen/X86/shift-one.ll +++ b/llvm/test/CodeGen/X86/shift-one.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep leal +; RUN: llc < %s -mtriple=i686-- | not grep leal @x = external global i32 ; <i32*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/shift-pair.ll b/llvm/test/CodeGen/X86/shift-pair.ll index 62e51f002f7..01ebfcd321f 100644 --- a/llvm/test/CodeGen/X86/shift-pair.ll +++ b/llvm/test/CodeGen/X86/shift-pair.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s define i64 @test(i64 %A) { ; CHECK: @test diff --git a/llvm/test/CodeGen/X86/shift-parts.ll b/llvm/test/CodeGen/X86/shift-parts.ll index 0b25a7595f2..67886697981 100644 --- a/llvm/test/CodeGen/X86/shift-parts.ll +++ b/llvm/test/CodeGen/X86/shift-parts.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s ; PR4736 %0 = type { i32, i8, [35 x i8] } diff --git a/llvm/test/CodeGen/X86/shl-anyext.ll b/llvm/test/CodeGen/X86/shl-anyext.ll index 0a5d047d23d..dbf560c6267 100644 --- a/llvm/test/CodeGen/X86/shl-anyext.ll +++ b/llvm/test/CodeGen/X86/shl-anyext.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s ; Codegen should be able to use a 32-bit shift instead of a 64-bit shift. ; CHECK: shll $16 diff --git a/llvm/test/CodeGen/X86/shl-i64.ll b/llvm/test/CodeGen/X86/shl-i64.ll index 849912cc12e..9326cc2d3ec 100644 --- a/llvm/test/CodeGen/X86/shl-i64.ll +++ b/llvm/test/CodeGen/X86/shl-i64.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s ; Make sure that we don't generate an illegal i64 extract after LegalizeType. ; CHECK: shll diff --git a/llvm/test/CodeGen/X86/shl_elim.ll b/llvm/test/CodeGen/X86/shl_elim.ll index 4762b13b516..ed67a09f06c 100644 --- a/llvm/test/CodeGen/X86/shl_elim.ll +++ b/llvm/test/CodeGen/X86/shl_elim.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s define i32 @test1(i64 %a) nounwind { %tmp29 = lshr i64 %a, 24 ; <i64> [#uses=1] diff --git a/llvm/test/CodeGen/X86/shrink-fp-const1.ll b/llvm/test/CodeGen/X86/shrink-fp-const1.ll index 49b9fa3c412..ba769c194a5 100644 --- a/llvm/test/CodeGen/X86/shrink-fp-const1.ll +++ b/llvm/test/CodeGen/X86/shrink-fp-const1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | not grep cvtss2sd +; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | not grep cvtss2sd ; PR1264 define double @foo(double %x) { diff --git a/llvm/test/CodeGen/X86/shrink-fp-const2.ll b/llvm/test/CodeGen/X86/shrink-fp-const2.ll index 3d5203be09a..b62a69cab18 100644 --- a/llvm/test/CodeGen/X86/shrink-fp-const2.ll +++ b/llvm/test/CodeGen/X86/shrink-fp-const2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep flds +; RUN: llc < %s -mtriple=i686-- | grep flds ; This should be a flds, not fldt. define x86_fp80 @test2() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/sink-hoist.ll b/llvm/test/CodeGen/X86/sink-hoist.ll index 972fbdf48cb..8111aa72b6e 100644 --- a/llvm/test/CodeGen/X86/sink-hoist.ll +++ b/llvm/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -verify-machineinstrs -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally diff --git a/llvm/test/CodeGen/X86/smul-with-overflow.ll b/llvm/test/CodeGen/X86/smul-with-overflow.ll index 2b21f4ff84e..7154a896a35 100644 --- a/llvm/test/CodeGen/X86/smul-with-overflow.ll +++ b/llvm/test/CodeGen/X86/smul-with-overflow.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s @ok = internal constant [4 x i8] c"%d\0A\00" @no = internal constant [4 x i8] c"no\0A\00" diff --git a/llvm/test/CodeGen/X86/soft-fp.ll b/llvm/test/CodeGen/X86/soft-fp.ll index 138e66c394b..134b24c73b6 100644 --- a/llvm/test/CodeGen/X86/soft-fp.ll +++ b/llvm/test/CodeGen/X86/soft-fp.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=x86 -mattr=+mmx,+sse,+soft-float \ +; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse,+soft-float \ ; RUN: | FileCheck %s --check-prefix=SOFT1 --check-prefix=CHECK -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2,+soft-float \ +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2,+soft-float \ ; RUN: | FileCheck %s --check-prefix=SOFT2 --check-prefix=CHECK -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse \ +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse \ ; RUN: | FileCheck %s --check-prefix=SSE1 --check-prefix=CHECK -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 \ +; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 \ ; RUN: | FileCheck %s --check-prefix=SSE2 --check-prefix=CHECK ; RUN: llc < %s -mtriple=x86_64-gnux32 -mattr=+mmx,+sse2,+soft-float | FileCheck %s diff --git a/llvm/test/CodeGen/X86/split-vector-bitcast.ll b/llvm/test/CodeGen/X86/split-vector-bitcast.ll index 8d80754b9a3..1ad71600324 100644 --- a/llvm/test/CodeGen/X86/split-vector-bitcast.ll +++ b/llvm/test/CodeGen/X86/split-vector-bitcast.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=-sse2,+sse | grep addps +; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,+sse | grep addps ; PR10497 + another isel issue with sse2 disabled ; (This is primarily checking that this construct doesn't crash.) diff --git a/llvm/test/CodeGen/X86/split-vector-rem.ll b/llvm/test/CodeGen/X86/split-vector-rem.ll index 681c6b0beaa..0e51dbf78bd 100644 --- a/llvm/test/CodeGen/X86/split-vector-rem.ll +++ b/llvm/test/CodeGen/X86/split-vector-rem.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | grep div | count 16 -; RUN: llc < %s -march=x86-64 | grep fmodf | count 8 +; RUN: llc < %s -mtriple=x86_64-- | grep div | count 16 +; RUN: llc < %s -mtriple=x86_64-- | grep fmodf | count 8 define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) { %m = srem <8 x i32> %t, %u diff --git a/llvm/test/CodeGen/X86/sse-align-1.ll b/llvm/test/CodeGen/X86/sse-align-1.ll index 1a6058c6114..378100d693b 100644 --- a/llvm/test/CodeGen/X86/sse-align-1.ll +++ b/llvm/test/CodeGen/X86/sse-align-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movap | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep movap | count 2 define <4 x float> @foo(<4 x float>* %p) nounwind { %t = load <4 x float>, <4 x float>* %p diff --git a/llvm/test/CodeGen/X86/sse-align-10.ll b/llvm/test/CodeGen/X86/sse-align-10.ll index 1e688a56ad4..48e405d792e 100644 --- a/llvm/test/CodeGen/X86/sse-align-10.ll +++ b/llvm/test/CodeGen/X86/sse-align-10.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s define <2 x i64> @bar(<2 x i64>* %p) nounwind { ; CHECK-LABEL: bar: diff --git a/llvm/test/CodeGen/X86/sse-align-11.ll b/llvm/test/CodeGen/X86/sse-align-11.ll index 9f5d4b40d61..857ea450817 100644 --- a/llvm/test/CodeGen/X86/sse-align-11.ll +++ b/llvm/test/CodeGen/X86/sse-align-11.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps +; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin8 | grep movaps +; RUN: llc < %s -mcpu=yonah -mtriple=i686-linux-gnu | grep movaps ; PR8969 - make 32-bit linux have a 16-byte aligned stack define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind { diff --git a/llvm/test/CodeGen/X86/sse-align-12.ll b/llvm/test/CodeGen/X86/sse-align-12.ll index 4fbb6e42cca..1ccb5ed4e6f 100644 --- a/llvm/test/CodeGen/X86/sse-align-12.ll +++ b/llvm/test/CodeGen/X86/sse-align-12.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -march=x86-64 -mcpu=nehalem | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=nehalem | FileCheck %s define <4 x float> @a(<4 x float>* %y) nounwind { ; CHECK-LABEL: a: diff --git a/llvm/test/CodeGen/X86/sse-align-2.ll b/llvm/test/CodeGen/X86/sse-align-2.ll index 063cc9d2f56..af548be6c05 100644 --- a/llvm/test/CodeGen/X86/sse-align-2.ll +++ b/llvm/test/CodeGen/X86/sse-align-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=penryn | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=penryn | FileCheck %s define <4 x float> @foo(<4 x float>* %p, <4 x float> %x) nounwind { %t = load <4 x float>, <4 x float>* %p, align 4 diff --git a/llvm/test/CodeGen/X86/sse-align-4.ll b/llvm/test/CodeGen/X86/sse-align-4.ll index 4c59934917f..8edafd96983 100644 --- a/llvm/test/CodeGen/X86/sse-align-4.ll +++ b/llvm/test/CodeGen/X86/sse-align-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movup | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep movup | count 2 define void @foo(<4 x float>* %p, <4 x float> %x) nounwind { store <4 x float> %x, <4 x float>* %p, align 4 diff --git a/llvm/test/CodeGen/X86/sse-align-5.ll b/llvm/test/CodeGen/X86/sse-align-5.ll index a64b953220d..4429d457950 100644 --- a/llvm/test/CodeGen/X86/sse-align-5.ll +++ b/llvm/test/CodeGen/X86/sse-align-5.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movaps | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep movaps | count 1 define <2 x i64> @bar(<2 x i64>* %p) nounwind { %t = load <2 x i64>, <2 x i64>* %p diff --git a/llvm/test/CodeGen/X86/sse-align-6.ll b/llvm/test/CodeGen/X86/sse-align-6.ll index 01f225101b9..343832c7464 100644 --- a/llvm/test/CodeGen/X86/sse-align-6.ll +++ b/llvm/test/CodeGen/X86/sse-align-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movdqu | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep movdqu | count 1 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind { %t = load <2 x i64>, <2 x i64>* %p, align 8 diff --git a/llvm/test/CodeGen/X86/sse-align-8.ll b/llvm/test/CodeGen/X86/sse-align-8.ll index cfeff8161c5..60aa22b7e19 100644 --- a/llvm/test/CodeGen/X86/sse-align-8.ll +++ b/llvm/test/CodeGen/X86/sse-align-8.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movups | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep movups | count 1 define void @bar(<2 x i64>* %p, <2 x i64> %x) nounwind { store <2 x i64> %x, <2 x i64>* %p, align 8 diff --git a/llvm/test/CodeGen/X86/sse-align-9.ll b/llvm/test/CodeGen/X86/sse-align-9.ll index 182c91c69d9..afec18ef578 100644 --- a/llvm/test/CodeGen/X86/sse-align-9.ll +++ b/llvm/test/CodeGen/X86/sse-align-9.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movup | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep movup | count 2 define <4 x float> @foo(<4 x float>* %p) nounwind { %t = load <4 x float>, <4 x float>* %p, align 4 diff --git a/llvm/test/CodeGen/X86/sse-load-ret.ll b/llvm/test/CodeGen/X86/sse-load-ret.ll index 8da45a786e7..a84201a9a11 100644 --- a/llvm/test/CodeGen/X86/sse-load-ret.ll +++ b/llvm/test/CodeGen/X86/sse-load-ret.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep movss -; RUN: llc < %s -march=x86 -mcpu=yonah | not grep xmm +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep movss +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | not grep xmm define double @test1(double* %P) { %X = load double, double* %P ; <double> [#uses=1] diff --git a/llvm/test/CodeGen/X86/sse-only.ll b/llvm/test/CodeGen/X86/sse-only.ll index 3fe9faaba85..9c4574365b4 100644 --- a/llvm/test/CodeGen/X86/sse-only.ll +++ b/llvm/test/CodeGen/X86/sse-only.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86 -mattr=+sse2,-mmx | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-mmx | FileCheck %s ; Test that turning off mmx doesn't turn off sse diff --git a/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll b/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll index 1c61a515f38..a5f62dde81f 100644 --- a/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll +++ b/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll @@ -1,7 +1,7 @@ -; RUN: llc -mcpu=yonah -mattr=sse-unaligned-mem -march=x86 < %s | FileCheck %s +; RUN: llc -mcpu=yonah -mattr=sse-unaligned-mem < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" +target triple = "i686-unknown-linux-gnu" define <4 x float> @foo(<4 x float>* %P, <4 x float> %In) nounwind { %A = load <4 x float>, <4 x float>* %P, align 4 diff --git a/llvm/test/CodeGen/X86/sse-varargs.ll b/llvm/test/CodeGen/X86/sse-varargs.ll index 7c3c78113de..3d1bec88e39 100644 --- a/llvm/test/CodeGen/X86/sse-varargs.ll +++ b/llvm/test/CodeGen/X86/sse-varargs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep xmm | grep esp +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | grep xmm | grep esp define i32 @t() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll b/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll index f3f9eebb26c..7578e22225b 100644 --- a/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll +++ b/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple i386-unknown-freebsd10.0 -march=x86 --relocation-model=pic %s -o - +; RUN: llc -mtriple i386-unknown-freebsd10.0 --relocation-model=pic %s -o - ; PR16979 diff --git a/llvm/test/CodeGen/X86/store-empty-member.ll b/llvm/test/CodeGen/X86/store-empty-member.ll index aea85b94d41..95d3bee98a5 100644 --- a/llvm/test/CodeGen/X86/store-empty-member.ll +++ b/llvm/test/CodeGen/X86/store-empty-member.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; Don't crash on an empty struct member. diff --git a/llvm/test/CodeGen/X86/store-fp-constant.ll b/llvm/test/CodeGen/X86/store-fp-constant.ll index 71df8d3109e..caf3c28c327 100644 --- a/llvm/test/CodeGen/X86/store-fp-constant.ll +++ b/llvm/test/CodeGen/X86/store-fp-constant.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; CHECK-NOT: rodata ; CHECK-NOT: literal diff --git a/llvm/test/CodeGen/X86/store-global-address.ll b/llvm/test/CodeGen/X86/store-global-address.ll index c8d4cbceea3..31bb0d59c93 100644 --- a/llvm/test/CodeGen/X86/store-global-address.ll +++ b/llvm/test/CodeGen/X86/store-global-address.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep movl | count 1 +; RUN: llc < %s -mtriple=i686-- | grep movl | count 1 @dst = global i32 0 ; <i32*> [#uses=1] @ptr = global i32* null ; <i32**> [#uses=1] diff --git a/llvm/test/CodeGen/X86/store-narrow.ll b/llvm/test/CodeGen/X86/store-narrow.ll index 5e9e1e364fe..9fc166a533e 100644 --- a/llvm/test/CodeGen/X86/store-narrow.ll +++ b/llvm/test/CodeGen/X86/store-narrow.ll @@ -1,9 +1,8 @@ ; rdar://7860110 -; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64 -; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON -; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF +; RUN: llc -mtriple=x86_64-apple-darwin10.2 -asm-verbose=false < %s | FileCheck %s -check-prefix=X64 +; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON +; RUN: llc -mtriple=i686-apple-darwin10.2 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin10.2" define void @test1(i32* nocapture %a0, i8 zeroext %a1) nounwind ssp { entry: diff --git a/llvm/test/CodeGen/X86/storetrunc-fp.ll b/llvm/test/CodeGen/X86/storetrunc-fp.ll index 03ad093ba86..0ead0bab410 100644 --- a/llvm/test/CodeGen/X86/storetrunc-fp.ll +++ b/llvm/test/CodeGen/X86/storetrunc-fp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep flds +; RUN: llc < %s -mtriple=i686-- | not grep flds define void @foo(x86_fp80 %a, x86_fp80 %b, float* %fp) { %c = fadd x86_fp80 %a, %b diff --git a/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll b/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll index 551bd7c2541..7c8f362a2cf 100644 --- a/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll +++ b/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; CHECK-NOT: lea diff --git a/llvm/test/CodeGen/X86/stride-reuse.ll b/llvm/test/CodeGen/X86/stride-reuse.ll index af036f3a8f1..986207428cc 100644 --- a/llvm/test/CodeGen/X86/stride-reuse.ll +++ b/llvm/test/CodeGen/X86/stride-reuse.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s +; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s ; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s ; CHECK-NOT: lea diff --git a/llvm/test/CodeGen/X86/sub.ll b/llvm/test/CodeGen/X86/sub.ll index 3cf79a3deca..3251cb60680 100644 --- a/llvm/test/CodeGen/X86/sub.ll +++ b/llvm/test/CodeGen/X86/sub.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 < %s | FileCheck %s +; RUN: llc -mtriple=i686-- < %s | FileCheck %s define i32 @test1(i32 %x) { %xor = xor i32 %x, 31 diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-0.ll b/llvm/test/CodeGen/X86/subreg-to-reg-0.ll index 251a754f438..bd600762964 100644 --- a/llvm/test/CodeGen/X86/subreg-to-reg-0.ll +++ b/llvm/test/CodeGen/X86/subreg-to-reg-0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1 ; Do eliminate the zero-extension instruction and rely on ; x86-64's implicit zero-extension! diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-1.ll b/llvm/test/CodeGen/X86/subreg-to-reg-1.ll index 2931bab0cdd..8acdb6176f5 100644 --- a/llvm/test/CodeGen/X86/subreg-to-reg-1.ll +++ b/llvm/test/CodeGen/X86/subreg-to-reg-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: {{leal .*[)], %e.*}} ; CHECK-NOT: {{leal .*[)], %e.*}} diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-3.ll b/llvm/test/CodeGen/X86/subreg-to-reg-3.ll index 80ab1a2e249..db9d0d12c3d 100644 --- a/llvm/test/CodeGen/X86/subreg-to-reg-3.ll +++ b/llvm/test/CodeGen/X86/subreg-to-reg-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: imull diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-4.ll b/llvm/test/CodeGen/X86/subreg-to-reg-4.ll index 8340fc53614..2a9a490c570 100644 --- a/llvm/test/CodeGen/X86/subreg-to-reg-4.ll +++ b/llvm/test/CodeGen/X86/subreg-to-reg-4.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 > %t +; RUN: llc < %s -mtriple=x86_64-- > %t ; RUN: not grep leaq %t ; RUN: not grep incq %t ; RUN: not grep decq %t diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-6.ll b/llvm/test/CodeGen/X86/subreg-to-reg-6.ll index bef09fa944e..6e4e24c08b6 100644 --- a/llvm/test/CodeGen/X86/subreg-to-reg-6.ll +++ b/llvm/test/CodeGen/X86/subreg-to-reg-6.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- define i64 @foo() nounwind { entry: diff --git a/llvm/test/CodeGen/X86/switch-bt.ll b/llvm/test/CodeGen/X86/switch-bt.ll index e4fbbeb26c3..6c732c9874d 100644 --- a/llvm/test/CodeGen/X86/switch-bt.ll +++ b/llvm/test/CodeGen/X86/switch-bt.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -asm-verbose=false < %s -jump-table-density=40 | FileCheck %s +; RUN: llc -mtriple=x86_64-- -asm-verbose=false < %s -jump-table-density=40 | FileCheck %s ; This switch should use bit tests, and the third bit test case is just ; testing for one possible value, so it doesn't need a bt. diff --git a/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll b/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll index e9a208d709e..888edbcaaec 100644 --- a/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll +++ b/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll @@ -1,5 +1,5 @@ ; PR925 -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s | FileCheck %s ; CHECK: {{mov.*str1}} ; CHECK-NOT: {{mov.*str1}} diff --git a/llvm/test/CodeGen/X86/switch-default-only.ll b/llvm/test/CodeGen/X86/switch-default-only.ll index 360ace5b787..4310e40b57a 100644 --- a/llvm/test/CodeGen/X86/switch-default-only.ll +++ b/llvm/test/CodeGen/X86/switch-default-only.ll @@ -1,4 +1,4 @@ -; RUN: llc -O0 -fast-isel=false -march=x86 < %s | FileCheck %s +; RUN: llc -O0 -fast-isel=false -mtriple=i686-- < %s | FileCheck %s ; No need for branching when the default and only destination follows ; immediately after the switch. diff --git a/llvm/test/CodeGen/X86/switch-edge-weight.ll b/llvm/test/CodeGen/X86/switch-edge-weight.ll index 3679433c372..861bd1289eb 100644 --- a/llvm/test/CodeGen/X86/switch-edge-weight.ll +++ b/llvm/test/CodeGen/X86/switch-edge-weight.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s +; RUN: llc -mtriple=x86_64-- -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s declare void @foo(i32) diff --git a/llvm/test/CodeGen/X86/switch-or.ll b/llvm/test/CodeGen/X86/switch-or.ll index 4642accfff8..c0501c315bc 100644 --- a/llvm/test/CodeGen/X86/switch-or.ll +++ b/llvm/test/CodeGen/X86/switch-or.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -asm-verbose=false < %s | FileCheck %s ; Check that merging switch cases that differ in one bit works. ; CHECK-LABEL: test1 diff --git a/llvm/test/CodeGen/X86/switch-zextload.ll b/llvm/test/CodeGen/X86/switch-zextload.ll index 2dd3f0e3ae7..68cfade0484 100644 --- a/llvm/test/CodeGen/X86/switch-zextload.ll +++ b/llvm/test/CodeGen/X86/switch-zextload.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 1 +; RUN: llc < %s | grep mov | count 1 ; Do zextload, instead of a load and a separate zext. diff --git a/llvm/test/CodeGen/X86/tail-call-legality.ll b/llvm/test/CodeGen/X86/tail-call-legality.ll index 119610430b1..a5ae82db11f 100644 --- a/llvm/test/CodeGen/X86/tail-call-legality.ll +++ b/llvm/test/CodeGen/X86/tail-call-legality.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -o - < %s | FileCheck %s +; RUN: llc -mtriple=i686-- -o - < %s | FileCheck %s ; This used to be classified as a tail call because of a mismatch in the ; arguments seen by Analysis.cpp and ISelLowering. As seen by ISelLowering, they diff --git a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll index c5ca6fc5750..5e0e8a229a5 100644 --- a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll +++ b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll @@ -1,4 +1,4 @@ -; RUN: llc -stop-after=tailduplication -march=x86-64 < %s | FileCheck %s +; RUN: llc -stop-after=tailduplication < %s | FileCheck %s ; ; Check that DebugLoc attached to the branch instruction of ; 'while.cond1.preheader.lr.ph' survives after tailduplication pass. diff --git a/llvm/test/CodeGen/X86/tail-opts.ll b/llvm/test/CodeGen/X86/tail-opts.ll index 96ff33ff5f7..28749b33cfa 100644 --- a/llvm/test/CodeGen/X86/tail-opts.ll +++ b/llvm/test/CodeGen/X86/tail-opts.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false -post-RA-scheduler=true | FileCheck %s declare void @bar(i32) declare void @car(i32) diff --git a/llvm/test/CodeGen/X86/tailcall-calleesave.ll b/llvm/test/CodeGen/X86/tailcall-calleesave.ll index c748bcef36d..1bb330bbe6a 100644 --- a/llvm/test/CodeGen/X86/tailcall-calleesave.ll +++ b/llvm/test/CodeGen/X86/tailcall-calleesave.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86 -tailcallopt -mcpu=core < %s | FileCheck %s +; RUN: llc -tailcallopt -mcpu=core < %s | FileCheck %s target triple = "i686-apple-darwin" diff --git a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll index 62c40164d79..62dd053c2a8 100644 --- a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll +++ b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: rBM_info ; CHECK-NOT: ret diff --git a/llvm/test/CodeGen/X86/tailcall.ll b/llvm/test/CodeGen/X86/tailcall.ll index 36a38e0b69d..1f49aee900a 100644 --- a/llvm/test/CodeGen/X86/tailcall.ll +++ b/llvm/test/CodeGen/X86/tailcall.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | grep TAILCALL | count 7 +; RUN: llc < %s -mtriple=i686-- -tailcallopt | grep TAILCALL | count 7 ; With -tailcallopt, CodeGen guarantees a tail call optimization ; for all of these. diff --git a/llvm/test/CodeGen/X86/tailcallfp.ll b/llvm/test/CodeGen/X86/tailcallfp.ll index 22a7930ba87..e42d5d5a9be 100644 --- a/llvm/test/CodeGen/X86/tailcallfp.ll +++ b/llvm/test/CodeGen/X86/tailcallfp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s define fastcc i32 @bar(i32 %X, i32(double, i32) *%FP) { %Y = tail call fastcc i32 %FP(double 0.0, i32 %X) ret i32 %Y diff --git a/llvm/test/CodeGen/X86/tailcallfp2.ll b/llvm/test/CodeGen/X86/tailcallfp2.ll index 9ef0d27f7de..d2ed0e62f58 100644 --- a/llvm/test/CodeGen/X86/tailcallfp2.ll +++ b/llvm/test/CodeGen/X86/tailcallfp2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s declare i32 @putchar(i32) diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll index 12218cc8ec4..2ed216484bb 100644 --- a/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll +++ b/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=x86_64-unknown-unknown -march=x86-64 -mattr=+tbm < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone { entry: diff --git a/llvm/test/CodeGen/X86/test-nofold.ll b/llvm/test/CodeGen/X86/test-nofold.ll index 19fbaafc194..8a49b9c9b25 100644 --- a/llvm/test/CodeGen/X86/test-nofold.ll +++ b/llvm/test/CodeGen/X86/test-nofold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s ; rdar://5752025 ; We want: diff --git a/llvm/test/CodeGen/X86/test-shrink.ll b/llvm/test/CodeGen/X86/test-shrink.ll index c9b76c88c1a..6d5bfd86fc4 100644 --- a/llvm/test/CodeGen/X86/test-shrink.ll +++ b/llvm/test/CodeGen/X86/test-shrink.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64 ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64 -; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32 ; CHECK-64-LABEL: g64xh: ; CHECK-64: testb $8, {{%ah|%ch}} diff --git a/llvm/test/CodeGen/X86/testb-je-fusion.ll b/llvm/test/CodeGen/X86/testb-je-fusion.ll index 9e946ae4ca3..c085a422295 100644 --- a/llvm/test/CodeGen/X86/testb-je-fusion.ll +++ b/llvm/test/CodeGen/X86/testb-je-fusion.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=corei7-avx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s ; testb should be scheduled right before je to enable macro-fusion. diff --git a/llvm/test/CodeGen/X86/tls-android-negative.ll b/llvm/test/CodeGen/X86/tls-android-negative.ll index e90b8914ab2..7a767cabb05 100644 --- a/llvm/test/CodeGen/X86/tls-android-negative.ll +++ b/llvm/test/CodeGen/X86/tls-android-negative.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s +; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s ; Make sure that some symboles are not emitted in emulated TLS model. diff --git a/llvm/test/CodeGen/X86/tls-android.ll b/llvm/test/CodeGen/X86/tls-android.ll index 53717f564fa..ecb9b430a7c 100644 --- a/llvm/test/CodeGen/X86/tls-android.ll +++ b/llvm/test/CodeGen/X86/tls-android.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -emulated-tls -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s -; RUN: llc < %s -emulated-tls -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s +; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s ; Make sure that TLS symboles are emitted in expected order. diff --git a/llvm/test/CodeGen/X86/tls-local-dynamic.ll b/llvm/test/CodeGen/X86/tls-local-dynamic.ll index 1f1b41a8a6d..711376303a8 100644 --- a/llvm/test/CodeGen/X86/tls-local-dynamic.ll +++ b/llvm/test/CodeGen/X86/tls-local-dynamic.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s @x = internal thread_local global i32 0, align 4 @y = internal thread_local global i32 0, align 4 diff --git a/llvm/test/CodeGen/X86/tls-models.ll b/llvm/test/CodeGen/X86/tls-models.ll index 2377da4f025..e0c3f05ad05 100644 --- a/llvm/test/CodeGen/X86/tls-models.ll +++ b/llvm/test/CodeGen/X86/tls-models.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s +; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s ; Darwin always uses the same model. -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s @external_gd = external thread_local global i32 @internal_gd = internal thread_local global i32 42 diff --git a/llvm/test/CodeGen/X86/tls-pic.ll b/llvm/test/CodeGen/X86/tls-pic.ll index ac0b43b2402..15533c94c4d 100644 --- a/llvm/test/CodeGen/X86/tls-pic.ll +++ b/llvm/test/CodeGen/X86/tls-pic.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86 -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64 @i = thread_local global i32 15 @j = internal thread_local global i32 42 diff --git a/llvm/test/CodeGen/X86/tls-pie.ll b/llvm/test/CodeGen/X86/tls-pie.ll index 7a7e40362bc..b2068ed3b4a 100644 --- a/llvm/test/CodeGen/X86/tls-pie.ll +++ b/llvm/test/CodeGen/X86/tls-pie.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86 -; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86 +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64 @i = thread_local global i32 15 @i2 = external thread_local global i32 diff --git a/llvm/test/CodeGen/X86/tls.ll b/llvm/test/CodeGen/X86/tls.ll index d39716aab76..ddfebcd0b66 100644 --- a/llvm/test/CodeGen/X86/tls.ll +++ b/llvm/test/CodeGen/X86/tls.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X86_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s +; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s +; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=X86_WIN %s +; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s +; RUN: llc < %s -mtriple=i686-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s +; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s @i1 = thread_local global i32 15 @i2 = external thread_local global i32 diff --git a/llvm/test/CodeGen/X86/token_landingpad.ll b/llvm/test/CodeGen/X86/token_landingpad.ll index 087b68bfce8..b72bfbbff64 100644 --- a/llvm/test/CodeGen/X86/token_landingpad.ll +++ b/llvm/test/CodeGen/X86/token_landingpad.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s +; RUN: llc < %s -mtriple=x86_64-- +; RUN: llc < %s -mtriple=i686-- ; This test verifies that SelectionDAG can handle landingPad of token type and not crash LLVM. diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll index 9da071f7ede..a5667be299b 100644 --- a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll +++ b/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \ +; RUN: llc < %s -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \ ; RUN: grep "twoaddressinstruction" | grep "Number of instructions aggressively commuted" ; rdar://6480363 diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll index f5a7326c970..b53ff00dfab 100644 --- a/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll +++ b/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -relocation-model=pic | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -relocation-model=pic | FileCheck %s ; This test is to ensure the TwoAddrInstruction pass chooses the proper operands to ; merge and generates fewer mov insns. diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce.ll index c727f34cc9a..81af9181126 100644 --- a/llvm/test/CodeGen/X86/twoaddr-coalesce.ll +++ b/llvm/test/CodeGen/X86/twoaddr-coalesce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep mov | count 2 +; RUN: llc < %s -mtriple=i686-- | grep mov | count 2 ; rdar://6523745 @"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <[4 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll b/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll index 9a98e4794f9..a06eaec894c 100644 --- a/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll +++ b/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll @@ -1,5 +1,5 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk" +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | grep "Number of 3-address instructions sunk" define void @t2(<2 x i64>* %vDct, <2 x i64>* %vYp, i8* %skiplist, <2 x i64> %a1) nounwind { entry: diff --git a/llvm/test/CodeGen/X86/uint_to_fp-2.ll b/llvm/test/CodeGen/X86/uint_to_fp-2.ll index c006c3115b2..b06b6c9109f 100644 --- a/llvm/test/CodeGen/X86/uint_to_fp-2.ll +++ b/llvm/test/CodeGen/X86/uint_to_fp-2.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i386-unknown-unknown -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s ; rdar://6504833 define float @test1(i32 %x) nounwind readnone { diff --git a/llvm/test/CodeGen/X86/umul-with-carry.ll b/llvm/test/CodeGen/X86/umul-with-carry.ll index 6435760e88a..5f76dd39058 100644 --- a/llvm/test/CodeGen/X86/umul-with-carry.ll +++ b/llvm/test/CodeGen/X86/umul-with-carry.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep "jc" | count 1 +; RUN: llc < %s -mtriple=i386-- | grep "jc" | count 1 ; XFAIL: * ; FIXME: umul-with-overflow not supported yet. diff --git a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll index 359c348b42c..2e1010f6f7a 100644 --- a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll +++ b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll @@ -1,4 +1,4 @@ -; RUN: llc -stop-after=machine-sink -march=x86-64 < %s | FileCheck %s +; RUN: llc -stop-after=machine-sink < %s | FileCheck %s ; ; test code: ; 1 extern int bar(int x); diff --git a/llvm/test/CodeGen/X86/update-terminator.mir b/llvm/test/CodeGen/X86/update-terminator.mir index 2e8e85b4ef6..4515521faf7 100644 --- a/llvm/test/CodeGen/X86/update-terminator.mir +++ b/llvm/test/CodeGen/X86/update-terminator.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=x86-64 -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s +# RUN: llc -mtriple=x86_64-- -verify-machineinstrs -run-pass block-placement -o - %s | FileCheck %s # Check the conditional jump in bb.1 is changed to unconditional after block placement swaps bb.2 and bb.3. --- | diff --git a/llvm/test/CodeGen/X86/utf8.ll b/llvm/test/CodeGen/X86/utf8.ll index 67bc5ae2fd4..baf01a2cb76 100644 --- a/llvm/test/CodeGen/X86/utf8.ll +++ b/llvm/test/CodeGen/X86/utf8.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- | FileCheck %s ; CHECK: iΔ @"i\CE\94" = common global i32 0, align 4 diff --git a/llvm/test/CodeGen/X86/v2f32.ll b/llvm/test/CodeGen/X86/v2f32.ll index 3b7160c7186..2fb46edc5c8 100644 --- a/llvm/test/CodeGen/X86/v2f32.ll +++ b/llvm/test/CodeGen/X86/v2f32.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -o - | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -mcpu=yonah -march=x86 -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mcpu=yonah -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32 ; PR7518 define void @test1(<2 x float> %Q, float *%P2) nounwind { diff --git a/llvm/test/CodeGen/X86/v4i32load-crash.ll b/llvm/test/CodeGen/X86/v4i32load-crash.ll index 8d019bc43d6..359e89e11e1 100644 --- a/llvm/test/CodeGen/X86/v4i32load-crash.ll +++ b/llvm/test/CodeGen/X86/v4i32load-crash.ll @@ -1,5 +1,5 @@ -; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s -; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --mtriple=i686-- --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --mtriple=x86_64-- --mcpu=x86-64 --mattr=ssse3 < %s ;PR18045: ;Issue of selection for 'v4i32 load'. diff --git a/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll b/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll index 1e86d75bf09..3971190f02c 100644 --- a/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll +++ b/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mtriple=i686-apple-darwin10 | grep __bzero +; RUN: llc < %s -mtriple=i686-apple-darwin10 | grep __bzero define void @foo(i8* %p, i64 %n) { call void @llvm.memset.p0i8.i64(i8* %p, i8 0, i64 %n, i32 4, i1 false) diff --git a/llvm/test/CodeGen/X86/vec_add.ll b/llvm/test/CodeGen/X86/vec_add.ll index 7c77d11a7b5..3d144e8ea3e 100644 --- a/llvm/test/CodeGen/X86/vec_add.ll +++ b/llvm/test/CodeGen/X86/vec_add.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) { entry: diff --git a/llvm/test/CodeGen/X86/vec_anyext.ll b/llvm/test/CodeGen/X86/vec_anyext.ll index c088d7f57b1..b42fbb55b94 100644 --- a/llvm/test/CodeGen/X86/vec_anyext.ll +++ b/llvm/test/CodeGen/X86/vec_anyext.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- ; PR 9267 define<4 x i16> @func_16_32() { diff --git a/llvm/test/CodeGen/X86/vec_call.ll b/llvm/test/CodeGen/X86/vec_call.ll index e0862ca8d1c..8c2d8ce66b7 100644 --- a/llvm/test/CodeGen/X86/vec_call.ll +++ b/llvm/test/CodeGen/X86/vec_call.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: llc < %s -mcpu=generic -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ ; RUN: grep "subl.*60" -; RUN: llc < %s -mcpu=generic -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ +; RUN: llc < %s -mcpu=generic -mattr=+sse2 -mtriple=i686-apple-darwin8 | \ ; RUN: grep "movaps.*32" diff --git a/llvm/test/CodeGen/X86/vec_compare.ll b/llvm/test/CodeGen/X86/vec_compare.ll index df3eae3399f..ed81cb5a78d 100644 --- a/llvm/test/CodeGen/X86/vec_compare.ll +++ b/llvm/test/CodeGen/X86/vec_compare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s +; RUN: llc < %s -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind { diff --git a/llvm/test/CodeGen/X86/vec_ins_extract.ll b/llvm/test/CodeGen/X86/vec_ins_extract.ll index 5ff49eff6df..e05c9977812 100644 --- a/llvm/test/CodeGen/X86/vec_ins_extract.ll +++ b/llvm/test/CodeGen/X86/vec_ins_extract.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: opt < %s -sroa -instcombine | \ -; RUN: llc -march=x86 -mcpu=yonah | not grep sub.*esp +; RUN: llc -mtriple=i686-- -mcpu=yonah | not grep sub.*esp ; This checks that various insert/extract idiom work without going to the ; stack. diff --git a/llvm/test/CodeGen/X86/vec_split.ll b/llvm/test/CodeGen/X86/vec_split.ll index 1df4cf2b232..9ce9b5b15c0 100644 --- a/llvm/test/CodeGen/X86/vec_split.ll +++ b/llvm/test/CodeGen/X86/vec_split.ll @@ -1,6 +1,6 @@ -; RUN: llc -march=x86-64 -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4 -; RUN: llc -march=x86-64 -mattr=avx < %s | FileCheck %s -check-prefix=AVX1 -; RUN: llc -march=x86-64 -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2 +; RUN: llc -mtriple=x86_64-- -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4 +; RUN: llc -mtriple=x86_64-- -mattr=avx < %s | FileCheck %s -check-prefix=AVX1 +; RUN: llc -mtriple=x86_64-- -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2 define <16 x i16> @split16(<16 x i16> %a, <16 x i16> %b, <16 x i8> %__mask) { ; SSE4-LABEL: split16: diff --git a/llvm/test/CodeGen/X86/vec_zero-2.ll b/llvm/test/CodeGen/X86/vec_zero-2.ll index cdb030eb38b..dce924cc6d4 100644 --- a/llvm/test/CodeGen/X86/vec_zero-2.ll +++ b/llvm/test/CodeGen/X86/vec_zero-2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 define i32 @t() { entry: diff --git a/llvm/test/CodeGen/X86/vec_zero.ll b/llvm/test/CodeGen/X86/vec_zero.ll index 1d900a0919f..e95e61b97fe 100644 --- a/llvm/test/CodeGen/X86/vec_zero.ll +++ b/llvm/test/CodeGen/X86/vec_zero.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s ; CHECK: foo ; CHECK: xorps diff --git a/llvm/test/CodeGen/X86/vector-intrinsics.ll b/llvm/test/CodeGen/X86/vector-intrinsics.ll index c140468d300..436644e9f9c 100644 --- a/llvm/test/CodeGen/X86/vector-intrinsics.ll +++ b/llvm/test/CodeGen/X86/vector-intrinsics.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep call | count 43 +; RUN: llc < %s -mtriple=x86_64-- | grep call | count 43 declare <4 x double> @llvm.sin.v4f64(<4 x double> %p) declare <4 x double> @llvm.cos.v4f64(<4 x double> %p) diff --git a/llvm/test/CodeGen/X86/vector-variable-idx.ll b/llvm/test/CodeGen/X86/vector-variable-idx.ll index 2a4d18c141a..7d37b1a4caf 100644 --- a/llvm/test/CodeGen/X86/vector-variable-idx.ll +++ b/llvm/test/CodeGen/X86/vector-variable-idx.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep movss | count 2 +; RUN: llc < %s -mtriple=x86_64-- | grep movss | count 2 ; PR2676 define float @foo(<4 x float> %p, i32 %t) { diff --git a/llvm/test/CodeGen/X86/vector-variable-idx2.ll b/llvm/test/CodeGen/X86/vector-variable-idx2.ll index df65257bac7..77b91961f58 100644 --- a/llvm/test/CodeGen/X86/vector-variable-idx2.ll +++ b/llvm/test/CodeGen/X86/vector-variable-idx2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse4.1 +; RUN: llc < %s -mattr=+sse4.1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-darwin11.0.0" diff --git a/llvm/test/CodeGen/X86/vector.ll b/llvm/test/CodeGen/X86/vector.ll index 39e7f0e0b06..a731643d7d4 100644 --- a/llvm/test/CodeGen/X86/vector.ll +++ b/llvm/test/CodeGen/X86/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. -; RUN: llc < %s -march=x86 -mcpu=i386 -; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -mtriple=i686-- -mcpu=i386 +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/llvm/test/CodeGen/X86/vfcmp.ll b/llvm/test/CodeGen/X86/vfcmp.ll index f5f5293622b..6d1b84d8b12 100644 --- a/llvm/test/CodeGen/X86/vfcmp.ll +++ b/llvm/test/CodeGen/X86/vfcmp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 ; PR2620 diff --git a/llvm/test/CodeGen/X86/volatile.ll b/llvm/test/CodeGen/X86/volatile.ll index 8d521b46f7c..29a57976a4a 100644 --- a/llvm/test/CodeGen/X86/volatile.ll +++ b/llvm/test/CodeGen/X86/volatile.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 -mattr=sse2 | grep movsd | count 5 -; RUN: llc < %s -march=x86 -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5 +; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | grep movsd | count 5 +; RUN: llc < %s -mtriple=i686-- -mattr=sse2 -O0 | grep -v esp | grep movsd | count 5 @x = external global double diff --git a/llvm/test/CodeGen/X86/vortex-bug.ll b/llvm/test/CodeGen/X86/vortex-bug.ll index b1f42681a50..a4114425437 100644 --- a/llvm/test/CodeGen/X86/vortex-bug.ll +++ b/llvm/test/CodeGen/X86/vortex-bug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- %struct.blktkntype = type { i32, i32 } %struct.fieldstruc = type { [128 x i8], %struct.blktkntype*, i32, i32 } diff --git a/llvm/test/CodeGen/X86/vshift_split.ll b/llvm/test/CodeGen/X86/vshift_split.ll index 359d36d8af6..6872dc0ab98 100644 --- a/llvm/test/CodeGen/X86/vshift_split.ll +++ b/llvm/test/CodeGen/X86/vshift_split.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 +; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 ; Example that requires splitting and expanding a vector shift. define <2 x i64> @update(<2 x i64> %val) nounwind readnone { diff --git a/llvm/test/CodeGen/X86/vshift_split2.ll b/llvm/test/CodeGen/X86/vshift_split2.ll index 0f8c2b896e2..e07bfefcaee 100644 --- a/llvm/test/CodeGen/X86/vshift_split2.ll +++ b/llvm/test/CodeGen/X86/vshift_split2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah +; RUN: llc < %s -mtriple=i686-- -mcpu=yonah ; Legalization example that requires splitting a large vector into smaller pieces. diff --git a/llvm/test/CodeGen/X86/weak.ll b/llvm/test/CodeGen/X86/weak.ll index 8590e8d0001..087e1d14b50 100644 --- a/llvm/test/CodeGen/X86/weak.ll +++ b/llvm/test/CodeGen/X86/weak.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -mtriple=i686-- @a = extern_weak global i32 ; <i32*> [#uses=1] @b = global i32* @a ; <i32**> [#uses=0] diff --git a/llvm/test/CodeGen/X86/wide-fma-contraction.ll b/llvm/test/CodeGen/X86/wide-fma-contraction.ll index 99e03c891c0..59d51ee677e 100644 --- a/llvm/test/CodeGen/X86/wide-fma-contraction.ll +++ b/llvm/test/CodeGen/X86/wide-fma-contraction.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma -mtriple=x86_64-apple-darwin < %s | FileCheck %s -; RUN: llc -march=x86 -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA +; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s +; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA ; CHECK-LABEL: fmafunc ; CHECK-NOFMA-LABEL: fmafunc diff --git a/llvm/test/CodeGen/X86/wide-integer-fold.ll b/llvm/test/CodeGen/X86/wide-integer-fold.ll index b3b4d24ab3a..d4da64e7b06 100644 --- a/llvm/test/CodeGen/X86/wide-integer-fold.ll +++ b/llvm/test/CodeGen/X86/wide-integer-fold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s ; CHECK: movq $-65535, %rax ; DAGCombiner should fold this to a simple constant. diff --git a/llvm/test/CodeGen/X86/widen_load-1.ll b/llvm/test/CodeGen/X86/widen_load-1.ll index 810e409c175..2e4acb57ee4 100644 --- a/llvm/test/CodeGen/X86/widen_load-1.ll +++ b/llvm/test/CodeGen/X86/widen_load-1.ll @@ -1,5 +1,5 @@ -; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE -; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX +; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE +; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX ; PR4891 ; PR5626 diff --git a/llvm/test/CodeGen/X86/x86-64-disp.ll b/llvm/test/CodeGen/X86/x86-64-disp.ll index 790634c1e4a..fd63ff1be71 100644 --- a/llvm/test/CodeGen/X86/x86-64-disp.ll +++ b/llvm/test/CodeGen/X86/x86-64-disp.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 2 +; RUN: llc < %s | grep mov | count 2 ; Fold an offset into an address even if it's not a 32-bit ; signed integer. diff --git a/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll b/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll index ba559aa2ff0..2fd98727421 100644 --- a/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll +++ b/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mcpu=bdver1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s ; clang -Oz -c test1.cpp -emit-llvm -S -o ; Verify that we generate shld insruction when we are optimizing for size, diff --git a/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll b/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll index c025ee874b2..b78ab0825a5 100644 --- a/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll +++ b/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll @@ -1,23 +1,23 @@ -; RUN: llc < %s -march=x86-64 -mcpu=athlon | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon-tbird | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon-4 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon-xp | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon-mp | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=k8 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=opteron | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon64 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon-fx | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=k8-sse3 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=opteron-sse3 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=athlon64-sse3 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=amdfam10 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=btver1 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=btver2 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=bdver1 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=bdver2 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=bdver3 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=bdver4 | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=znver1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-tbird | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-4 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-xp | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-mp | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-fx | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8-sse3 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron-sse3 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64-sse3 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=amdfam10 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s ; Verify that for the X86_64 processors that are known to have poor latency ; double precision shift instructions we do not generate 'shld' or 'shrd' diff --git a/llvm/test/CodeGen/X86/x86-64-ret0.ll b/llvm/test/CodeGen/X86/x86-64-ret0.ll index c74f6d803b1..3e840ab2edf 100644 --- a/llvm/test/CodeGen/X86/x86-64-ret0.ll +++ b/llvm/test/CodeGen/X86/x86-64-ret0.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep mov | count 1 +; RUN: llc < %s -mtriple=x86_64-- | grep mov | count 1 define i32 @f() nounwind { tail call void @t( i32 1 ) nounwind diff --git a/llvm/test/CodeGen/X86/x86-fold-pshufb.ll b/llvm/test/CodeGen/X86/x86-fold-pshufb.ll index 84af4f5d4b8..c250bef08e4 100644 --- a/llvm/test/CodeGen/X86/x86-fold-pshufb.ll +++ b/llvm/test/CodeGen/X86/x86-fold-pshufb.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -relocation-model=pic -march=x86-64 -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s -; RUN: llc -march=x86-64 -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s +; RUN: llc -relocation-model=pic -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s ; Verify that the backend correctly folds the shuffle in function 'fold_pshufb' ; into a simple load from constant pool. diff --git a/llvm/test/CodeGen/X86/x87.ll b/llvm/test/CodeGen/X86/x87.ll index 9bc654861b6..f70f1857104 100644 --- a/llvm/test/CodeGen/X86/x87.ll +++ b/llvm/test/CodeGen/X86/x87.ll @@ -1,9 +1,9 @@ -; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X87 -; RUN: llc < %s -march=x86-64 -mattr=-sse | FileCheck %s -check-prefix=X87 -; RUN: llc < %s -march=x86 -mattr=-x87 | FileCheck %s -check-prefix=NOX87 -; RUN: llc < %s -march=x86-64 -mattr=-x87,-sse | FileCheck %s -check-prefix=NOX87 -; RUN: llc < %s -march=x86 -mattr=-x87,+sse | FileCheck %s -check-prefix=NOX87 -; RUN: llc < %s -march=x86-64 -mattr=-x87,-sse2 | FileCheck %s -check-prefix=NOX87 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X87 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse | FileCheck %s -check-prefix=X87 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefix=NOX87 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse | FileCheck %s -check-prefix=NOX87 +; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse | FileCheck %s -check-prefix=NOX87 +; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefix=NOX87 define void @test(i32 %i, i64 %l, float* %pf, double* %pd, fp128* %pld) nounwind readnone { ; X87-LABEL: test: diff --git a/llvm/test/CodeGen/X86/xmm-r64.ll b/llvm/test/CodeGen/X86/xmm-r64.ll index 2a6b5c71aa4..9fe5376a9d4 100644 --- a/llvm/test/CodeGen/X86/xmm-r64.ll +++ b/llvm/test/CodeGen/X86/xmm-r64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 +; RUN: llc < %s -mtriple=x86_64-- define <4 x i32> @test() { %tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1] diff --git a/llvm/test/CodeGen/X86/xtest.ll b/llvm/test/CodeGen/X86/xtest.ll index e85565edcd5..005e41fd650 100644 --- a/llvm/test/CodeGen/X86/xtest.ll +++ b/llvm/test/CodeGen/X86/xtest.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+rtm | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-- -mattr=+rtm | FileCheck %s declare i32 @llvm.x86.xtest() nounwind diff --git a/llvm/test/CodeGen/X86/zero-remat.ll b/llvm/test/CodeGen/X86/zero-remat.ll index e3c3c5e3190..04d7a2c2c55 100644 --- a/llvm/test/CodeGen/X86/zero-remat.ll +++ b/llvm/test/CodeGen/X86/zero-remat.ll @@ -1,7 +1,7 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 -; RUN: llc < %s -march=x86-64 -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12 -; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 +; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -mtriple=x86_64-- -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12 +; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32 declare void @bar(double %x) declare void @barf(float %x) diff --git a/llvm/test/CodeGen/X86/zext-inreg-0.ll b/llvm/test/CodeGen/X86/zext-inreg-0.ll index 688b88db526..72fd6885dcd 100644 --- a/llvm/test/CodeGen/X86/zext-inreg-0.ll +++ b/llvm/test/CodeGen/X86/zext-inreg-0.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s -; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X64 %s +; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s +; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix=X64 %s ; X86-NOT: and diff --git a/llvm/test/CodeGen/X86/zext-inreg-1.ll b/llvm/test/CodeGen/X86/zext-inreg-1.ll index 17fe374e01e..580269d1435 100644 --- a/llvm/test/CodeGen/X86/zext-inreg-1.ll +++ b/llvm/test/CodeGen/X86/zext-inreg-1.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | not grep and +; RUN: llc < %s -mtriple=i686-- | not grep and ; These tests differ from the ones in zext-inreg-0.ll in that ; on x86-64 they do require and instructions. diff --git a/llvm/test/CodeGen/X86/zlib-longest-match.ll b/llvm/test/CodeGen/X86/zlib-longest-match.ll index 7be03f662da..fc80bcaa3b2 100644 --- a/llvm/test/CodeGen/X86/zlib-longest-match.ll +++ b/llvm/test/CodeGen/X86/zlib-longest-match.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=x86-64 < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s +; RUN: llc < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.9.0" |
