diff options
| -rw-r--r-- | llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp | 133 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-bad.s | 412 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/regs-bad.s | 330 |
3 files changed, 328 insertions, 547 deletions
diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index 7f2159f79e1..600834e7449 100644 --- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -60,7 +60,15 @@ private: unsigned Length; }; - // LLVM register Num, which has kind Kind. + // LLVM register Num, which has kind Kind. In some ways it might be + // easier for this class to have a register bank (general, floating-point + // or access) and a raw register number (0-15). This would postpone the + // interpretation of the operand to the add*() methods and avoid the need + // for context-dependent parsing. However, we do things the current way + // because of the virtual getReg() method, which needs to distinguish + // between (say) %r0 used as a single register and %r0 used as a pair. + // Context-dependent parsing can also give us slightly better error + // messages when invalid pairs like %r1 are used. struct RegOp { RegisterKind Kind; unsigned Num; @@ -258,21 +266,26 @@ class SystemZAsmParser : public MCTargetAsmParser { private: MCSubtargetInfo &STI; MCAsmParser &Parser; + enum RegisterGroup { + RegGR, + RegFP, + RegAccess + }; struct Register { - char Prefix; - unsigned Number; + RegisterGroup Group; + unsigned Num; SMLoc StartLoc, EndLoc; }; bool parseRegister(Register &Reg); OperandMatchResultTy - parseRegister(Register &Reg, char Prefix, const unsigned *Regs, + parseRegister(Register &Reg, RegisterGroup Group, const unsigned *Regs, bool IsAddress = false); OperandMatchResultTy parseRegister(SmallVectorImpl<MCParsedAsmOperand*> &Operands, - char Prefix, const unsigned *Regs, + RegisterGroup Group, const unsigned *Regs, SystemZOperand::RegisterKind Kind, bool IsAddress = false); @@ -310,27 +323,27 @@ public: // Used by the TableGen code to parse particular operand types. OperandMatchResultTy parseGR32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'r', SystemZMC::GR32Regs, + return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, SystemZOperand::GR32Reg); } OperandMatchResultTy parseGR64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'r', SystemZMC::GR64Regs, + return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, SystemZOperand::GR64Reg); } OperandMatchResultTy parseGR128(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'r', SystemZMC::GR128Regs, + return parseRegister(Operands, RegGR, SystemZMC::GR128Regs, SystemZOperand::GR128Reg); } OperandMatchResultTy parseADDR32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'r', SystemZMC::GR32Regs, + return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, SystemZOperand::ADDR32Reg, true); } OperandMatchResultTy parseADDR64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'r', SystemZMC::GR64Regs, + return parseRegister(Operands, RegGR, SystemZMC::GR64Regs, SystemZOperand::ADDR64Reg, true); } OperandMatchResultTy @@ -339,17 +352,17 @@ public: } OperandMatchResultTy parseFP32(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'f', SystemZMC::FP32Regs, + return parseRegister(Operands, RegFP, SystemZMC::FP32Regs, SystemZOperand::FP32Reg); } OperandMatchResultTy parseFP64(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'f', SystemZMC::FP64Regs, + return parseRegister(Operands, RegFP, SystemZMC::FP64Regs, SystemZOperand::FP64Reg); } OperandMatchResultTy parseFP128(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { - return parseRegister(Operands, 'f', SystemZMC::FP128Regs, + return parseRegister(Operands, RegFP, SystemZMC::FP128Regs, SystemZOperand::FP128Reg); } OperandMatchResultTy @@ -405,14 +418,24 @@ bool SystemZAsmParser::parseRegister(Register &Reg) { if (Parser.getTok().isNot(AsmToken::Identifier)) return true; - // Check the prefix. + // Check that there's a prefix. StringRef Name = Parser.getTok().getString(); if (Name.size() < 2) return true; - Reg.Prefix = Name[0]; + char Prefix = Name[0]; // Treat the rest of the register name as a register number. - if (Name.substr(1).getAsInteger(10, Reg.Number)) + if (Name.substr(1).getAsInteger(10, Reg.Num)) + return true; + + // Look for valid combinations of prefix and number. + if (Prefix == 'r' && Reg.Num < 16) + Reg.Group = RegGR; + else if (Prefix == 'f' && Reg.Num < 16) + Reg.Group = RegFP; + else if (Prefix == 'a' && Reg.Num < 16) + Reg.Group = RegAccess; + else return true; Reg.EndLoc = Parser.getTok().getLoc(); @@ -420,41 +443,46 @@ bool SystemZAsmParser::parseRegister(Register &Reg) { return false; } -// Parse a register with prefix Prefix and convert it to LLVM numbering. -// Regs maps asm register numbers to LLVM register numbers, with zero -// entries indicating an invalid register. IsAddress says whether the -// register appears in an address context. +// Parse a register of group Group. If Regs is nonnull, use it to map +// the raw register number to LLVM numbering, with zero entries indicating +// an invalid register. IsAddress says whether the register appears in an +// address context. SystemZAsmParser::OperandMatchResultTy -SystemZAsmParser::parseRegister(Register &Reg, char Prefix, +SystemZAsmParser::parseRegister(Register &Reg, RegisterGroup Group, const unsigned *Regs, bool IsAddress) { - if (parseRegister(Reg)) + if (Parser.getTok().isNot(AsmToken::Percent)) return MatchOperand_NoMatch; - if (Reg.Prefix != Prefix || Reg.Number > 15 || Regs[Reg.Number] == 0) { + if (parseRegister(Reg)) { Error(Reg.StartLoc, "invalid register"); return MatchOperand_ParseFail; } - if (Reg.Number == 0 && IsAddress) { + if (Reg.Group != Group) { + Error(Reg.StartLoc, "invalid operand for instruction"); + return MatchOperand_ParseFail; + } + if (Regs && Regs[Reg.Num] == 0) { + Error(Reg.StartLoc, "invalid register pair"); + return MatchOperand_ParseFail; + } + if (Reg.Num == 0 && IsAddress) { Error(Reg.StartLoc, "%r0 used in an address"); return MatchOperand_ParseFail; } - Reg.Number = Regs[Reg.Number]; + if (Regs) + Reg.Num = Regs[Reg.Num]; return MatchOperand_Success; } -// Parse a register and add it to Operands. Prefix is 'r' for GPRs, -// 'f' for FPRs, etc. Regs maps asm register numbers to LLVM register numbers, -// with zero entries indicating an invalid register. Kind is the type of -// register represented by Regs and IsAddress says whether the register is -// being parsed in an address context, meaning that %r0 evaluates as 0. +// Parse a register and add it to Operands. The other arguments are as above. SystemZAsmParser::OperandMatchResultTy SystemZAsmParser::parseRegister(SmallVectorImpl<MCParsedAsmOperand*> &Operands, - char Prefix, const unsigned *Regs, + RegisterGroup Group, const unsigned *Regs, SystemZOperand::RegisterKind Kind, bool IsAddress) { Register Reg; - OperandMatchResultTy Result = parseRegister(Reg, Prefix, Regs, IsAddress); + OperandMatchResultTy Result = parseRegister(Reg, Group, Regs, IsAddress); if (Result == MatchOperand_Success) - Operands.push_back(SystemZOperand::createReg(Kind, Reg.Number, + Operands.push_back(SystemZOperand::createReg(Kind, Reg.Num, Reg.StartLoc, Reg.EndLoc)); return Result; } @@ -483,8 +511,7 @@ SystemZAsmParser::parseAddress(SmallVectorImpl<MCParsedAsmOperand*> &Operands, // Parse the first register. Register Reg; - OperandMatchResultTy Result = parseRegister(Reg, 'r', SystemZMC::GR64Regs, - true); + OperandMatchResultTy Result = parseRegister(Reg, RegGR, Regs, true); if (Result != MatchOperand_Success) return Result; @@ -498,12 +525,12 @@ SystemZAsmParser::parseAddress(SmallVectorImpl<MCParsedAsmOperand*> &Operands, return MatchOperand_ParseFail; } - Index = Reg.Number; - Result = parseRegister(Reg, 'r', SystemZMC::GR64Regs, true); + Index = Reg.Num; + Result = parseRegister(Reg, RegGR, Regs, true); if (Result != MatchOperand_Success) return Result; } - Base = Reg.Number; + Base = Reg.Num; // Consume the closing bracket. if (getLexer().isNot(AsmToken::RParen)) @@ -524,15 +551,18 @@ bool SystemZAsmParser::ParseDirective(AsmToken DirectiveID) { bool SystemZAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) { + if (Parser.getTok().isNot(AsmToken::Percent)) + return Error(Parser.getTok().getLoc(), "register expected"); Register Reg; if (parseRegister(Reg)) - return Error(Reg.StartLoc, "register expected"); - if (Reg.Prefix == 'r' && Reg.Number < 16) - RegNo = SystemZMC::GR64Regs[Reg.Number]; - else if (Reg.Prefix == 'f' && Reg.Number < 16) - RegNo = SystemZMC::FP64Regs[Reg.Number]; - else return Error(Reg.StartLoc, "invalid register"); + if (Reg.Group == RegGR) + RegNo = SystemZMC::GR64Regs[Reg.Num]; + else if (Reg.Group == RegFP) + RegNo = SystemZMC::FP64Regs[Reg.Num]; + else + // FIXME: Access registers aren't modelled as LLVM registers yet. + return Error(Reg.StartLoc, "invalid operand for instruction"); StartLoc = Reg.StartLoc; EndLoc = Reg.EndLoc; return false; @@ -654,15 +684,12 @@ MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, SystemZAsmParser::OperandMatchResultTy SystemZAsmParser:: parseAccessReg(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { Register Reg; - if (parseRegister(Reg)) - return MatchOperand_NoMatch; - if (Reg.Prefix != 'a' || Reg.Number > 15) { - Error(Reg.StartLoc, "invalid register"); - return MatchOperand_ParseFail; - } - Operands.push_back(SystemZOperand::createAccessReg(Reg.Number, - Reg.StartLoc, Reg.EndLoc)); - return MatchOperand_Success; + OperandMatchResultTy Result = parseRegister(Reg, RegAccess, 0); + if (Result == MatchOperand_Success) + Operands.push_back(SystemZOperand::createAccessReg(Reg.Num, + Reg.StartLoc, + Reg.EndLoc)); + return Result; } SystemZAsmParser::OperandMatchResultTy SystemZAsmParser:: diff --git a/llvm/test/MC/SystemZ/insn-bad.s b/llvm/test/MC/SystemZ/insn-bad.s index 6891fa94ae6..f1d86db437a 100644 --- a/llvm/test/MC/SystemZ/insn-bad.s +++ b/llvm/test/MC/SystemZ/insn-bad.s @@ -193,19 +193,13 @@ asi 0, -129 asi 0, 128 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: axbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: axbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: axbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: axbr %f14, %f0 axbr %f0, %f2 - axbr %f0, %f14 axbr %f2, %f0 - axbr %f14, %f0 #CHECK: error: invalid operand @@ -310,34 +304,6 @@ cdb %f0, -1 cdb %f0, 4096 -#CHECK: error: invalid register -#CHECK: cdfbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cdfbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cdfbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cdfbr %a0, %r0 - - cdfbr %r0, %r0 - cdfbr %f0, %f0 - cdfbr %f0, %a0 - cdfbr %a0, %r0 - -#CHECK: error: invalid register -#CHECK: cdgbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cdgbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cdgbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cdgbr %a0, %r0 - - cdgbr %r0, %r0 - cdgbr %f0, %f0 - cdgbr %f0, %a0 - cdgbr %a0, %r0 - #CHECK: error: invalid operand #CHECK: ceb %f0, -1 #CHECK: error: invalid operand @@ -346,59 +312,19 @@ ceb %f0, -1 ceb %f0, 4096 -#CHECK: error: invalid register -#CHECK: cefbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cefbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cefbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cefbr %a0, %r0 - - cefbr %r0, %r0 - cefbr %f0, %f0 - cefbr %f0, %a0 - cefbr %a0, %r0 - -#CHECK: error: invalid register -#CHECK: cegbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cegbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cegbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cegbr %a0, %r0 - - cegbr %r0, %r0 - cegbr %f0, %f0 - cegbr %f0, %a0 - cegbr %a0, %r0 - -#CHECK: error: invalid register -#CHECK: cfdbr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cfdbr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cfdbr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cfdbr %r0, 16, %f0 - cfdbr %r0, 0, %r0 - cfdbr %f0, 0, %f0 cfdbr %r0, -1, %f0 cfdbr %r0, 16, %f0 -#CHECK: error: invalid register -#CHECK: cfebr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cfebr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cfebr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cfebr %r0, 16, %f0 - cfebr %r0, 0, %r0 - cfebr %f0, 0, %f0 cfebr %r0, -1, %f0 cfebr %r0, 16, %f0 @@ -410,25 +336,16 @@ cfi %r0, (-1 << 31) - 1 cfi %r0, (1 << 31) -#CHECK: error: invalid register -#CHECK: cfxbr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cfxbr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cfxbr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cfxbr %r0, 16, %f0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: cfxbr %r0, 0, %f2 -#CHECK: error: invalid register -#CHECK: cfxbr %r0, 0, %f14 - cfxbr %r0, 0, %r0 - cfxbr %f0, 0, %f0 cfxbr %r0, -1, %f0 cfxbr %r0, 16, %f0 cfxbr %r0, 0, %f2 - cfxbr %r0, 0, %f14 #CHECK: error: invalid operand @@ -439,31 +356,19 @@ cg %r0, -524289 cg %r0, 524288 -#CHECK: error: invalid register -#CHECK: cgdbr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cgdbr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cgdbr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cgdbr %r0, 16, %f0 - cgdbr %r0, 0, %r0 - cgdbr %f0, 0, %f0 cgdbr %r0, -1, %f0 cgdbr %r0, 16, %f0 -#CHECK: error: invalid register -#CHECK: cgebr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cgebr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cgebr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cgebr %r0, 16, %f0 - cgebr %r0, 0, %r0 - cgebr %f0, 0, %f0 cgebr %r0, -1, %f0 cgebr %r0, 16, %f0 @@ -561,25 +466,16 @@ cgrl %r0, 1 cgrl %r0, 0x100000000 -#CHECK: error: invalid register -#CHECK: cgxbr %r0, 0, %r0 -#CHECK: error: invalid register -#CHECK: cgxbr %f0, 0, %f0 #CHECK: error: invalid operand #CHECK: cgxbr %r0, -1, %f0 #CHECK: error: invalid operand #CHECK: cgxbr %r0, 16, %f0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: cgxbr %r0, 0, %f2 -#CHECK: error: invalid register -#CHECK: cgxbr %r0, 0, %f14 - cgxbr %r0, 0, %r0 - cgxbr %f0, 0, %f0 cgxbr %r0, -1, %f0 cgxbr %r0, 16, %f0 cgxbr %r0, 0, %f2 - cgxbr %r0, 0, %f14 #CHECK: error: invalid operand @@ -907,60 +803,23 @@ csy %r0, %r0, 524288 csy %r0, %r0, 0(%r1,%r2) -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: cxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: cxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: cxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: cxbr %f14, %f0 cxbr %f0, %f2 - cxbr %f0, %f14 cxbr %f2, %f0 - cxbr %f14, %f0 - - -#CHECK: error: invalid register -#CHECK: cxfbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cxfbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cxfbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cxfbr %a0, %r0 -#CHECK: error: invalid register + +#CHECK: error: invalid register pair #CHECK: cxfbr %f2, %r0 -#CHECK: error: invalid register -#CHECK: cxfbr %f14, %r0 - cxfbr %r0, %r0 - cxfbr %f0, %f0 - cxfbr %f0, %a0 - cxfbr %a0, %r0 cxfbr %f2, %r0 - cxfbr %f14, %r0 - -#CHECK: error: invalid register -#CHECK: cxgbr %r0, %r0 -#CHECK: error: invalid register -#CHECK: cxgbr %f0, %f0 -#CHECK: error: invalid register -#CHECK: cxgbr %f0, %a0 -#CHECK: error: invalid register -#CHECK: cxgbr %a0, %r0 -#CHECK: error: invalid register + +#CHECK: error: invalid register pair #CHECK: cxgbr %f2, %r0 -#CHECK: error: invalid register -#CHECK: cxgbr %f14, %r0 - cxgbr %r0, %r0 - cxgbr %f0, %f0 - cxgbr %f0, %a0 - cxgbr %a0, %r0 cxgbr %f2, %r0 - cxgbr %f14, %r0 #CHECK: error: invalid operand #CHECK: cy %r0, -524289 @@ -990,177 +849,108 @@ #CHECK: dl %r0, -524289 #CHECK: error: invalid operand #CHECK: dl %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dl %r1, 0 -#CHECK: error: invalid register -#CHECK: dl %r15, 0 dl %r0, -524289 dl %r0, 524288 dl %r1, 0 - dl %r15, 0 #CHECK: error: invalid operand #CHECK: dlg %r0, -524289 #CHECK: error: invalid operand #CHECK: dlg %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dlg %r1, 0 -#CHECK: error: invalid register -#CHECK: dlg %r15, 0 dlg %r0, -524289 dlg %r0, 524288 dlg %r1, 0 - dlg %r15, 0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dlgr %r1, %r0 -#CHECK: error: invalid register -#CHECK: dlgr %r15, %r0 dlgr %r1, %r0 - dlgr %r15, %r0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dlr %r1, %r0 -#CHECK: error: invalid register -#CHECK: dlr %r15, %r0 dlr %r1, %r0 - dlr %r15, %r0 #CHECK: error: invalid operand #CHECK: dsg %r0, -524289 #CHECK: error: invalid operand #CHECK: dsg %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dsg %r1, 0 -#CHECK: error: invalid register -#CHECK: dsg %r15, 0 dsg %r0, -524289 dsg %r0, 524288 dsg %r1, 0 - dsg %r15, 0 #CHECK: error: invalid operand #CHECK: dsgf %r0, -524289 #CHECK: error: invalid operand #CHECK: dsgf %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dsgf %r1, 0 -#CHECK: error: invalid register -#CHECK: dsgf %r15, 0 dsgf %r0, -524289 dsgf %r0, 524288 dsgf %r1, 0 - dsgf %r15, 0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dsgfr %r1, %r0 -#CHECK: error: invalid register -#CHECK: dsgfr %r15, %r0 dsgfr %r1, %r0 - dsgfr %r15, %r0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dsgr %r1, %r0 -#CHECK: error: invalid register -#CHECK: dsgr %r15, %r0 dsgr %r1, %r0 - dsgr %r15, %r0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: dxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: dxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: dxbr %f14, %f0 dxbr %f0, %f2 - dxbr %f0, %f14 dxbr %f2, %f0 - dxbr %f14, %f0 - - -#CHECK: error: invalid operand -#CHECK: ear %r0, 0 -#CHECK: error: invalid register -#CHECK: ear %r0, %r0 -#CHECK: error: invalid register -#CHECK: ear %a0, %r0 - - ear %r0, 0 - ear %r0, %r0 - ear %a0, %r0 -#CHECK: error: invalid register -#CHECK: fidbr %r0, 0, %f0 -#CHECK: error: invalid register -#CHECK: fidbr %f0, 0, %r0 #CHECK: error: invalid operand #CHECK: fidbr %f0, -1, %f0 #CHECK: error: invalid operand #CHECK: fidbr %f0, 16, %f0 - fidbr %r0, 0, %f0 - fidbr %f0, 0, %r0 fidbr %f0, -1, %f0 fidbr %f0, 16, %f0 -#CHECK: error: invalid register -#CHECK: fiebr %r0, 0, %f0 -#CHECK: error: invalid register -#CHECK: fiebr %f0, 0, %r0 #CHECK: error: invalid operand #CHECK: fiebr %f0, -1, %f0 #CHECK: error: invalid operand #CHECK: fiebr %f0, 16, %f0 - fiebr %r0, 0, %f0 - fiebr %f0, 0, %r0 fiebr %f0, -1, %f0 fiebr %f0, 16, %f0 -#CHECK: error: invalid register -#CHECK: fixbr %r0, 0, %f0 -#CHECK: error: invalid register -#CHECK: fixbr %f0, 0, %r0 #CHECK: error: invalid operand #CHECK: fixbr %f0, -1, %f0 #CHECK: error: invalid operand #CHECK: fixbr %f0, 16, %f0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: fixbr %f0, 0, %f2 -#CHECK: error: invalid register -#CHECK: fixbr %f0, 0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: fixbr %f2, 0, %f0 -#CHECK: error: invalid register -#CHECK: fixbr %f14, 0, %f0 - fixbr %r0, 0, %f0 - fixbr %f0, 0, %r0 fixbr %f0, -1, %f0 fixbr %f0, 16, %f0 fixbr %f0, 0, %f2 - fixbr %f0, 0, %f14 fixbr %f2, 0, %f0 - fixbr %f14, 0, %f0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: flogr %r1, %r0 -#CHECK: error: invalid register -#CHECK: flogr %r15, %r0 flogr %r1, %r0 - flogr %r15, %r0 #CHECK: error: invalid operand #CHECK: ic %r0, -1 @@ -1272,20 +1062,13 @@ lb %r0, -524289 lb %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lcxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: lcxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lcxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: lcxbr %f14, %f0 lcxbr %f0, %f2 - lcxbr %f0, %f14 lcxbr %f2, %f0 - lcxbr %f14, %f0 - #CHECK: error: invalid operand #CHECK: ld %f0, -1 @@ -1303,33 +1086,13 @@ ldeb %f0, -1 ldeb %f0, 4096 -#CHECK: error: invalid register -#CHECK: ldgr %f0, %f0 -#CHECK: error: invalid register -#CHECK: ldgr %r0, %r0 -#CHECK: error: invalid register -#CHECK: ldgr %f0, %a0 -#CHECK: error: invalid register -#CHECK: ldgr %a0, %r0 - - ldgr %f0, %f0 - ldgr %r0, %r0 - ldgr %f0, %a0 - ldgr %a0, %r0 - -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: ldxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: ldxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: ldxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: ldxbr %f14, %f0 ldxbr %f0, %f2 - ldxbr %f0, %f14 ldxbr %f2, %f0 - ldxbr %f14, %f0 #CHECK: error: invalid operand #CHECK: ldy %f0, -524289 @@ -1347,19 +1110,13 @@ le %f0, -1 le %f0, 4096 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lexbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: lexbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lexbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: lexbr %f14, %f0 lexbr %f0, %f2 - lexbr %f0, %f14 lexbr %f2, %f0 - lexbr %f14, %f0 #CHECK: error: invalid operand #CHECK: ley %f0, -524289 @@ -1385,20 +1142,6 @@ lgb %r0, -524289 lgb %r0, 524288 -#CHECK: error: invalid register -#CHECK: lgdr %f0, %f0 -#CHECK: error: invalid register -#CHECK: lgdr %r0, %r0 -#CHECK: error: invalid register -#CHECK: lgdr %r0, %a0 -#CHECK: error: invalid register -#CHECK: lgdr %a0, %f0 - - lgdr %f0, %f0 - lgdr %r0, %r0 - lgdr %r0, %a0 - lgdr %a0, %f0 - #CHECK: error: invalid operand #CHECK: lgf %r0, -524289 #CHECK: error: invalid operand @@ -1658,35 +1401,21 @@ lmg %r0, %r0, 524288 lmg %r0, %r0, 0(%r1,%r2) -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lnxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: lnxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lnxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: lnxbr %f14, %f0 lnxbr %f0, %f2 - lnxbr %f0, %f14 lnxbr %f2, %f0 - lnxbr %f14, %f0 - -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lpxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: lpxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lpxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: lpxbr %f14, %f0 lpxbr %f0, %f2 - lpxbr %f0, %f14 lpxbr %f2, %f0 - lpxbr %f14, %f0 - #CHECK: error: offset out of range #CHECK: lrl %r0, -0x1000000002 @@ -1718,19 +1447,13 @@ lrvg %r0, -524289 lrvg %r0, 524288 -#CHECK: error: invalid register -#CHECK: lxr %f2, %f0 -#CHECK: error: invalid register -#CHECK: lxr %f15, %f0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lxr %f0, %f2 -#CHECK: error: invalid register -#CHECK: lxr %f0, %f15 +#CHECK: error: invalid register pair +#CHECK: lxr %f2, %f0 - lxr %f2, %f0 - lxr %f15, %f0 lxr %f0, %f2 - lxr %f0, %f15 + lxr %f2, %f0 #CHECK: error: invalid operand #CHECK: ly %r0, -524289 @@ -1740,16 +1463,10 @@ ly %r0, -524289 ly %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: lzxr %f2 -#CHECK: error: invalid register -#CHECK: lzxr %f14 -#CHECK: error: invalid register -#CHECK: lzxr %f15 lzxr %f2 - lzxr %f14 - lzxr %f15 #CHECK: error: invalid operand #CHECK: madb %f0, %f0, -1 @@ -1833,23 +1550,17 @@ #CHECK: mlg %r0, -524289 #CHECK: error: invalid operand #CHECK: mlg %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mlg %r1, 0 -#CHECK: error: invalid register -#CHECK: mlg %r15, 0 mlg %r0, -524289 mlg %r0, 524288 mlg %r1, 0 - mlg %r15, 0 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mlgr %r1, %r0 -#CHECK: error: invalid register -#CHECK: mlgr %r15, %r0 mlgr %r1, %r0 - mlgr %r15, %r0 #CHECK: error: invalid operand #CHECK: ms %r0, -1 @@ -2000,42 +1711,29 @@ mviy 0, -1 mviy 0, 256 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: mxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: mxbr %f14, %f0 mxbr %f0, %f2 - mxbr %f0, %f14 mxbr %f2, %f0 - mxbr %f14, %f0 - -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mxdb %f2, 0 -#CHECK: error: invalid register -#CHECK: mxdb %f15, 0 #CHECK: error: invalid operand #CHECK: mxdb %f0, -1 #CHECK: error: invalid operand #CHECK: mxdb %f0, 4096 mxdb %f2, 0 - mxdb %f15, 0 mxdb %f0, -1 mxdb %f0, 4096 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: mxdbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: mxdbr %f15, %f0 mxdbr %f2, %f0 - mxdbr %f15, %f0 #CHECK: error: invalid operand #CHECK: n %r0, -1 @@ -2461,20 +2159,13 @@ sqeb %f0, -1 sqeb %f0, 4096 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: sqxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: sqxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: sqxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: sqxbr %f14, %f0 sqxbr %f0, %f2 - sqxbr %f0, %f14 sqxbr %f2, %f0 - sqxbr %f14, %f0 - #CHECK: error: invalid operand #CHECK: sra %r0,-1 @@ -2689,20 +2380,13 @@ sty %r0, -524289 sty %r0, 524288 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: sxbr %f0, %f2 -#CHECK: error: invalid register -#CHECK: sxbr %f0, %f14 -#CHECK: error: invalid register +#CHECK: error: invalid register pair #CHECK: sxbr %f2, %f0 -#CHECK: error: invalid register -#CHECK: sxbr %f14, %f0 sxbr %f0, %f2 - sxbr %f0, %f14 sxbr %f2, %f0 - sxbr %f14, %f0 - #CHECK: error: invalid operand #CHECK: sy %r0, -524289 diff --git a/llvm/test/MC/SystemZ/regs-bad.s b/llvm/test/MC/SystemZ/regs-bad.s index 6a8bff6ec79..ec6751af840 100644 --- a/llvm/test/MC/SystemZ/regs-bad.s +++ b/llvm/test/MC/SystemZ/regs-bad.s @@ -1,182 +1,252 @@ # RUN: not llvm-mc -triple s390x-linux-gnu < %s 2> %t # RUN: FileCheck < %t %s -#CHECK: error: invalid register -#CHECK: lr %r16,%r1 -#CHECK: error: invalid register +# Test GR32 operands +# +#CHECK: error: invalid operand for instruction #CHECK: lr %f0,%r1 -#CHECK: error: invalid register +#CHECK: error: invalid operand for instruction #CHECK: lr %a0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: lr %arid,%r1 +#CHECK: lr %r0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: lr %0,%r1 +#CHECK: lr %r0,%a1 #CHECK: error: invalid operand for instruction -#CHECK: lr 0,%r1 -#CHECK: error: unknown token in expression -#CHECK: lr (%r0),%r1 -#CHECK: error: unknown token in expression -#CHECK: lr %,%r1 +#CHECK: lr %r0,0 +#CHECK: error: unexpected token in argument list +#CHECK: lr %r0,0(%r1) - lr %r16,%r1 lr %f0,%r1 lr %a0,%r1 - lr %arid,%r1 - lr %0,%r1 - lr 0,%r1 - lr (%r0),%r1 - lr %,%r1 + lr %r0,%f1 + lr %r0,%a1 + lr %r0,0 + lr %r0,0(%r1) -#CHECK: error: invalid register -#CHECK: lgr %r16,%r1 -#CHECK: error: invalid register +# Test GR64 operands +# +#CHECK: error: invalid operand for instruction #CHECK: lgr %f0,%r1 -#CHECK: error: invalid register +#CHECK: error: invalid operand for instruction #CHECK: lgr %a0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: lgr %arid,%r1 +#CHECK: lgr %r0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: lgr %0,%r1 +#CHECK: lgr %r0,%a1 #CHECK: error: invalid operand for instruction -#CHECK: lgr 0,%r1 -#CHECK: error: unknown token in expression -#CHECK: lgr (%r0),%r1 -#CHECK: error: unknown token in expression -#CHECK: lgr %,%r1 +#CHECK: lgr %r0,0 +#CHECK: error: unexpected token in argument list +#CHECK: lgr %r0,0(%r1) - lgr %r16,%r1 lgr %f0,%r1 lgr %a0,%r1 - lgr %arid,%r1 - lgr %0,%r1 - lgr 0,%r1 - lgr (%r0),%r1 - lgr %,%r1 + lgr %r0,%f1 + lgr %r0,%a1 + lgr %r0,0 + lgr %r0,0(%r1) -#CHECK: error: invalid register -#CHECK: dlr %r1,%r8 -#CHECK: error: invalid register -#CHECK: dlr %r16,%r1 -#CHECK: error: invalid register +# Test GR128 operands +# +#CHECK: error: invalid register pair +#CHECK: dlr %r1,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r3,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r5,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r7,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r9,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r11,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r13,%r0 +#CHECK: error: invalid register pair +#CHECK: dlr %r15,%r0 +#CHECK: error: invalid operand for instruction #CHECK: dlr %f0,%r1 -#CHECK: error: invalid register +#CHECK: error: invalid operand for instruction #CHECK: dlr %a0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: dlr %arid,%r1 +#CHECK: dlr %r0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: dlr %0,%r1 +#CHECK: dlr %r0,%a1 #CHECK: error: invalid operand for instruction -#CHECK: dlr 0,%r1 -#CHECK: error: unknown token in expression -#CHECK: dlr (%r0),%r1 -#CHECK: error: unknown token in expression -#CHECK: dlr %,%r1 +#CHECK: dlr %r0,0 +#CHECK: error: unexpected token in argument list +#CHECK: dlr %r0,0(%r1) - dlr %r1,%r8 - dlr %r16,%r1 + dlr %r1,%r0 + dlr %r3,%r0 + dlr %r5,%r0 + dlr %r7,%r0 + dlr %r9,%r0 + dlr %r11,%r0 + dlr %r13,%r0 + dlr %r15,%r0 dlr %f0,%r1 dlr %a0,%r1 - dlr %arid,%r1 - dlr %0,%r1 - dlr 0,%r1 - dlr (%r0),%r1 - dlr %,%r1 + dlr %r0,%f1 + dlr %r0,%a1 + dlr %r0,0 + dlr %r0,0(%r1) -#CHECK: error: invalid register -#CHECK: ler %f1,%f16 -#CHECK: error: invalid register -#CHECK: ler %f1,%r0 -#CHECK: error: invalid register -#CHECK: ler %f1,%a0 +# Test FP32 operands +# +#CHECK: error: invalid operand for instruction +#CHECK: ler %r0,%f1 +#CHECK: error: invalid operand for instruction +#CHECK: ler %a0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: ler %f1,%fly +#CHECK: ler %f0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: ler %f1,%0 +#CHECK: ler %f0,%a1 #CHECK: error: invalid operand for instruction -#CHECK: ler %f1,0 -#CHECK: error: unknown token in expression -#CHECK: ler %f1,(%f0) -#CHECK: error: unknown token in expression -#CHECK: ler %f1,% +#CHECK: ler %f0,0 +#CHECK: error: unexpected token in argument list +#CHECK: ler %f0,0(%r1) - ler %f1,%f16 - ler %f1,%r0 - ler %f1,%a0 - ler %f1,%fly - ler %f1,%0 - ler %f1,0 - ler %f1,(%f0) - ler %f1,% + ler %r0,%f1 + ler %a0,%f1 + ler %f0,%r1 + ler %f0,%a1 + ler %f0,0 + ler %f0,0(%r1) -#CHECK: error: invalid register -#CHECK: ldr %f1,%f16 -#CHECK: error: invalid register -#CHECK: ldr %f1,%r0 -#CHECK: error: invalid register -#CHECK: ldr %f1,%a0 +# Test FP64 operands +# +#CHECK: error: invalid operand for instruction +#CHECK: ldr %r0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: ldr %f1,%fly +#CHECK: ldr %a0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: ldr %f1,%0 +#CHECK: ldr %f0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: ldr %f1,0 -#CHECK: error: unknown token in expression -#CHECK: ldr %f1,(%f0) -#CHECK: error: unknown token in expression -#CHECK: ldr %f1,% +#CHECK: ldr %f0,%a1 +#CHECK: error: invalid operand for instruction +#CHECK: ldr %f0,0 +#CHECK: error: unexpected token in argument list +#CHECK: ldr %f0,0(%r1) - ldr %f1,%f16 - ldr %f1,%r0 - ldr %f1,%a0 - ldr %f1,%fly - ldr %f1,%0 - ldr %f1,0 - ldr %f1,(%f0) - ldr %f1,% + ldr %r0,%f1 + ldr %a0,%f1 + ldr %f0,%r1 + ldr %f0,%a1 + ldr %f0,0 + ldr %f0,0(%r1) -#CHECK: error: invalid register -#CHECK: lxr %f1,%f2 -#CHECK: error: invalid register -#CHECK: lxr %f1,%f16 -#CHECK: error: invalid register -#CHECK: lxr %f1,%r0 -#CHECK: error: invalid register -#CHECK: lxr %f1,%a0 +# Test FP128 operands +# +#CHECK: error: invalid register pair +#CHECK: lxr %f2,%f0 +#CHECK: error: invalid register pair +#CHECK: lxr %f0,%f3 +#CHECK: error: invalid register pair +#CHECK: lxr %f6,%f0 +#CHECK: error: invalid register pair +#CHECK: lxr %f0,%f7 +#CHECK: error: invalid register pair +#CHECK: lxr %f10,%f0 +#CHECK: error: invalid register pair +#CHECK: lxr %f0,%f11 +#CHECK: error: invalid register pair +#CHECK: lxr %f14,%f0 +#CHECK: error: invalid register pair +#CHECK: lxr %f0,%f15 +#CHECK: error: invalid operand for instruction +#CHECK: lxr %r0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: lxr %f1,%fly +#CHECK: lxr %a0,%f1 #CHECK: error: invalid operand for instruction -#CHECK: lxr %f1,%0 +#CHECK: lxr %f0,%r1 #CHECK: error: invalid operand for instruction -#CHECK: lxr %f1,0 -#CHECK: error: unknown token in expression -#CHECK: lxr %f1,(%f0) -#CHECK: error: unknown token in expression -#CHECK: lxr %f1,% +#CHECK: lxr %f0,%a1 +#CHECK: error: invalid operand for instruction +#CHECK: lxr %f0,0 +#CHECK: error: unexpected token in argument list +#CHECK: lxr %f0,0(%r1) - lxr %f1,%f2 - lxr %f1,%f16 - lxr %f1,%r0 - lxr %f1,%a0 - lxr %f1,%fly - lxr %f1,%0 - lxr %f1,0 - lxr %f1,(%f0) - lxr %f1,% + lxr %f2,%f0 + lxr %f0,%f3 + lxr %f6,%f0 + lxr %f0,%f7 + lxr %f10,%f0 + lxr %f0,%f11 + lxr %f14,%f0 + lxr %f0,%f15 + lxr %r0,%f1 + lxr %a0,%f1 + lxr %f0,%r1 + lxr %f0,%a1 + lxr %f0,0 + lxr %f0,0(%r1) -#CHECK: error: invalid register -#CHECK: .cfi_offset %a0,0 -#CHECK: error: register expected -#CHECK: .cfi_offset %foo,0 -#CHECK: error: register expected -#CHECK: .cfi_offset %,0 +# Test access register operands +# +#CHECK: error: invalid operand for instruction +#CHECK: ear %r0,%r0 +#CHECK: error: invalid operand for instruction +#CHECK: ear %r0,%f0 +#CHECK: error: invalid operand for instruction +#CHECK: ear %r0,0 +#CHECK: error: unexpected token in argument list +#CHECK: ear %r0,0(%r1) + + ear %r0,%r0 + ear %r0,%f0 + ear %r0,0 + ear %r0,0(%r1) + + .cfi_startproc + +# Test general register parsing, with no predetermined class in mind. +# #CHECK: error: register expected #CHECK: .cfi_offset r0,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %r,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %f,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %a,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %0,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %c0,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %r16,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %f16,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %a16,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %reef,0 +#CHECK: error: invalid register +#CHECK: .cfi_offset %arid,0 - .cfi_startproc - .cfi_offset %a0,0 - .cfi_offset %foo,0 - .cfi_offset %,0 .cfi_offset r0,0 + .cfi_offset %,0 + .cfi_offset %r,0 + .cfi_offset %f,0 + .cfi_offset %a,0 + .cfi_offset %0,0 + .cfi_offset %c0,0 + .cfi_offset %r16,0 + .cfi_offset %f16,0 + .cfi_offset %a16,0 + .cfi_offset %reef,0 + .cfi_offset %arid,0 + +# Test invalid CFI registers. Will need to be updated once access +# registers are modelled as LLVM registers. +# +#CHECK: error: invalid operand for instruction +#CHECK: .cfi_offset %a0,0 + + .cfi_offset %a0,0 + .cfi_endproc #CHECK: error: %r0 used in an address |
