diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64FastISel.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AArch64/swiftcc.ll | 11 |
3 files changed, 13 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index a2bb2b2922a..405e7d0a211 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -2860,7 +2860,7 @@ bool AArch64FastISel::fastLowerArguments() { return false; CallingConv::ID CC = F->getCallingConv(); - if (CC != CallingConv::C) + if (CC != CallingConv::C && CC != CallingConv::Swift) return false; // Only handle simple cases of up to 8 GPR and FPR each. diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 6ed9e6fe5aa..bdc9ca4444b 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2429,6 +2429,7 @@ CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC, case CallingConv::Fast: case CallingConv::PreserveMost: case CallingConv::CXX_FAST_TLS: + case CallingConv::Swift: if (!Subtarget->isTargetDarwin()) return CC_AArch64_AAPCS; return IsVarArg ? CC_AArch64_DarwinPCS_VarArg : CC_AArch64_DarwinPCS; diff --git a/llvm/test/CodeGen/AArch64/swiftcc.ll b/llvm/test/CodeGen/AArch64/swiftcc.ll new file mode 100644 index 00000000000..43249542715 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/swiftcc.ll @@ -0,0 +1,11 @@ +; RUN: llc -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s +; RUN: llc -O0 -verify-machineinstrs -mtriple=aarch64-apple-ios -o - %s | FileCheck %s + +; CHECK: t1 +; CHECK: fadd s0, s0, s1 +; CHECK: ret +define swiftcc float @t1(float %a, float %b) { +entry: + %add = fadd float %a, %b + ret float %add +} |
