diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 11 |
2 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 83d61c82cb0..2a5599f665d 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -503,6 +503,7 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII, !TargetRegisterInfo::isPhysicalRegister(I.getOperand(1).getReg()))) && "No phys reg on generic operator!"); assert(KnownValid || isValidCopy(I, DstRegBank, MRI, TRI, RBI)); + (void)KnownValid; return true; }; diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp index d69f3265ec1..a9f1f6bbc22 100644 --- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp @@ -665,11 +665,12 @@ bool ARMInstructionSelector::selectGlobal(MachineInstrBuilder &MIB, // FIXME: Taking advantage of MOVT for ELF is pretty involved, so we don't // support it yet. See PR28229. - unsigned Opc = UseMovt && !STI.isTargetELF() - ? (UseOpcodeThatLoads ? ARM::MOV_ga_pcrel_ldr - : Opcodes.MOV_ga_pcrel) - : (UseOpcodeThatLoads ? ARM::LDRLIT_ga_pcrel_ldr - : Opcodes.LDRLIT_ga_pcrel); + unsigned Opc = + UseMovt && !STI.isTargetELF() + ? (UseOpcodeThatLoads ? (unsigned)ARM::MOV_ga_pcrel_ldr + : Opcodes.MOV_ga_pcrel) + : (UseOpcodeThatLoads ? (unsigned)ARM::LDRLIT_ga_pcrel_ldr + : Opcodes.LDRLIT_ga_pcrel); MIB->setDesc(TII.get(Opc)); int TargetFlags = ARMII::MO_NO_FLAG; |
