diff options
| -rw-r--r-- | llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp index fb814b1c6c0..33698d2b8c3 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp @@ -84,12 +84,6 @@ public: SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const; - /// getAuthSImmOpValue - Return encoding for a 10-bit immediate which is - /// encoded as a sign bit and an 9-bit immediate, separated by a single bit. - uint32_t getAuthSImmOpValue(const MCInst &MI, unsigned OpIdx, - SmallVectorImpl<MCFixup> &Fixups, - const MCSubtargetInfo &STI) const; - /// getCondBranchTargetOpValue - Return the encoded value for a conditional /// branch target. uint32_t getCondBranchTargetOpValue(const MCInst &MI, unsigned OpIdx, @@ -288,18 +282,6 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx, return ShiftVal == 0 ? 0 : (1 << ShiftVal); } -/// getAuthSImmOpValue - encode a 10-bit scale signed immediate within an 11-bit -/// field in which bit 10 of that field is not used to encode any information -/// about the immediate. -uint32_t -AArch64MCCodeEmitter::getAuthSImmOpValue(const MCInst &MI, unsigned OpIdx, - SmallVectorImpl<MCFixup> &Fixups, - const MCSubtargetInfo &STI) const { - const MCOperand &MO = MI.getOperand(OpIdx); - int32_t offset = MO.getImm(); - return (uint32_t)offset; -} - /// getCondBranchTargetOpValue - Return the encoded value for a conditional /// branch target. uint32_t AArch64MCCodeEmitter::getCondBranchTargetOpValue( |
