diff options
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.cpp | 9 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/dagcombine-concatvector.ll | 2 |
2 files changed, 8 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp index 3111f5e385e..e9254c3d90c 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.cpp +++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp @@ -133,8 +133,13 @@ void ARMSubtarget::resetSubtargetFeatures(const MachineFunction *MF) { } void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { - if (CPUString.empty()) - CPUString = "generic"; + if (CPUString.empty()) { + if (isTargetIOS() && TargetTriple.getArchName().endswith("v7s")) + // Default to the Swift CPU when targeting armv7s/thumbv7s. + CPUString = "swift"; + else + CPUString = "generic"; + } // Insert the architecture feature derived from the target triple into the // feature string. This is important for setting features that are implied diff --git a/llvm/test/CodeGen/ARM/dagcombine-concatvector.ll b/llvm/test/CodeGen/ARM/dagcombine-concatvector.ll index d8c6c645580..2927ea2f3ca 100644 --- a/llvm/test/CodeGen/ARM/dagcombine-concatvector.ll +++ b/llvm/test/CodeGen/ARM/dagcombine-concatvector.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 -mcpu=generic | FileCheck %s ; PR15525 ; CHECK-LABEL: test1: |
