diff options
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 7 |
3 files changed, 9 insertions, 5 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index 42a0c96b876..01664373fb6 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -3791,6 +3791,9 @@ bool MipsAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, case Match_UImm20_0: return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), "expected 20-bit unsigned immediate"); + case Match_UImm26_0: + return Error(RefineErrorLoc(IDLoc, Operands, ErrorInfo), + "expected 26-bit unsigned immediate"); } llvm_unreachable("Implement any new match types added!"); diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.td b/llvm/lib/Target/Mips/Mips16InstrInfo.td index dad6ea4c9e9..ebb94e52f11 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.td @@ -115,7 +115,7 @@ class FEXT_CCRXI16_ins<string asmstr>: // class FJAL16_ins<bits<1> _X, string asmstr, InstrItinClass itin>: - FJAL16<_X, (outs), (ins simm20:$imm), + FJAL16<_X, (outs), (ins uimm26:$imm), !strconcat(asmstr, "\t$imm\n\tnop"),[], itin> { let isCodeGenOnly=1; @@ -124,7 +124,7 @@ class FJAL16_ins<bits<1> _X, string asmstr, class FJALB16_ins<bits<1> _X, string asmstr, InstrItinClass itin>: - FJAL16<_X, (outs), (ins simm20:$imm), + FJAL16<_X, (outs), (ins uimm26:$imm), !strconcat(asmstr, "\t$imm\t# branch\n\tnop"),[], itin> { let isCodeGenOnly=1; diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index 02c7a590747..f0780add250 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -453,8 +453,10 @@ class UImmAsmOperandClass<int Bits, list<AsmOperandClass> Supers = []> // uimm5 < uimm5_64, and uimm5 < vsplat_uimm5 // This is entirely arbitrary. We need an ordering and what we pick is // unimportant since only one is possible for a given mnemonic. +def ConstantUImm26AsmOperandClass + : ConstantUImmAsmOperandClass<26, []>; def ConstantUImm20AsmOperandClass - : ConstantUImmAsmOperandClass<20, []>; + : ConstantUImmAsmOperandClass<20, [ConstantUImm26AsmOperandClass]>; def UImm16RelaxedAsmOperandClass : UImmAsmOperandClass<16, [ConstantUImm20AsmOperandClass]> { let Name = "UImm16_Relaxed"; @@ -593,7 +595,6 @@ def simm18_lsl3 : Operand<i32> { let ParserMatchClass = MipsJumpTargetAsmOperand; } -def simm20 : Operand<i32>; def simm32 : Operand<i32>; def simm16_64 : Operand<i64> { @@ -615,7 +616,7 @@ def uimm_range_2_64 : Operand<i32> { } // Unsigned Operands -foreach I = {1, 2, 3, 4, 5, 6, 7, 8, 10, 20} in +foreach I = {1, 2, 3, 4, 5, 6, 7, 8, 10, 20, 26} in def uimm # I : Operand<i32> { let PrintMethod = "printUImm<" # I # ">"; let ParserMatchClass = |
