diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 53 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86IntrinsicsInfo.h | 2 |
2 files changed, 3 insertions, 52 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 81772619aa5..51f23c00258 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4046,14 +4046,6 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.offset = 0; switch (IntrData->Type) { - case LOADA: - case LOADU: { - Info.ptrVal = I.getArgOperand(0); - Info.memVT = MVT::getVT(I.getType()); - Info.align = (IntrData->Type == LOADA ? Info.memVT.getSizeInBits()/8 : 1); - Info.readMem = true; - break; - } case EXPAND_FROM_MEM: { Info.ptrVal = I.getArgOperand(0); Info.memVT = MVT::getVT(I.getType()); @@ -4086,12 +4078,10 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, Info.writeMem = true; break; } - case STOREA: - case STOREANT: - case STOREU: { + case STOREANT: { Info.ptrVal = I.getArgOperand(0); Info.memVT = MVT::getVT(I.getArgOperand(1)->getType()); - Info.align = (IntrData->Type == STOREU ? 1 : Info.memVT.getSizeInBits()/8); + Info.align = Info.memVT.getSizeInBits()/8; Info.writeMem = true; break; } @@ -18282,45 +18272,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget, Mask, PassThru, Subtarget, DAG), Chain}; return DAG.getMergeValues(Results, dl); } - case LOADU: - case LOADA: { - SDValue Mask = Op.getOperand(4); - SDValue PassThru = Op.getOperand(3); - SDValue Addr = Op.getOperand(2); - SDValue Chain = Op.getOperand(0); - MVT VT = Op.getSimpleValueType(); - - MemIntrinsicSDNode *MemIntr = dyn_cast<MemIntrinsicSDNode>(Op); - assert(MemIntr && "Expected MemIntrinsicSDNode!"); - - if (isAllOnesConstant(Mask)) // return just a load - return DAG.getLoad(VT, dl, Chain, Addr, MemIntr->getMemOperand()); - - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements()); - SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); - return DAG.getMaskedLoad(VT, dl, Chain, Addr, VMask, PassThru, VT, - MemIntr->getMemOperand(), ISD::NON_EXTLOAD); - } - case STOREU: - case STOREA: { - SDValue Mask = Op.getOperand(4); - SDValue Data = Op.getOperand(3); - SDValue Addr = Op.getOperand(2); - SDValue Chain = Op.getOperand(0); - - MemIntrinsicSDNode *MemIntr = dyn_cast<MemIntrinsicSDNode>(Op); - assert(MemIntr && "Expected MemIntrinsicSDNode!"); - - if (isAllOnesConstant(Mask)) // return just a store - return DAG.getStore(Chain, dl, Data, Addr, MemIntr->getMemOperand()); - - EVT VT = MemIntr->getMemoryVT(); - MVT MaskVT = MVT::getVectorVT(MVT::i1, VT.getVectorNumElements()); - SDValue VMask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl); - - return DAG.getMaskedStore(Chain, dl, Data, Addr, VMask, VT, - MemIntr->getMemOperand(), false); - } case STOREANT: { // Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic implementation. SDValue Data = Op.getOperand(3); diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h index e1f5c35617e..ed8da4e24fe 100644 --- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h +++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h @@ -33,7 +33,7 @@ enum IntrinsicType { INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_RM, COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM, BRCST_SUBVEC_TO_VEC, BRCST32x2_TO_VEC, TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32, - EXPAND_FROM_MEM, LOADA, LOADU, STOREA, STOREU, STOREANT, BLEND, INSERT_SUBVEC, + EXPAND_FROM_MEM, STOREANT, BLEND, INSERT_SUBVEC, TERLOG_OP_MASK, TERLOG_OP_MASKZ, BROADCASTM, KUNPCK, FIXUPIMM, FIXUPIMM_MASKZ, FIXUPIMMS, FIXUPIMMS_MASKZ, CONVERT_MASK_TO_VEC, CONVERT_TO_MASK }; |
