diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86.td | 3 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-schedule.ll | 16 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll | 3 |
3 files changed, 7 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 8fc2a63c8fc..93521a38858 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -874,8 +874,7 @@ def : ProcessorModel<"x86-64", SandyBridgeModel, [ Feature64Bit, FeatureSlow3OpsLEA, FeatureSlowBTMem, - FeatureSlowIncDec, - FeatureSlowUAMem32 + FeatureSlowIncDec ]>; //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/X86/avx-schedule.ll b/llvm/test/CodeGen/X86/avx-schedule.ll index f6f326c88fc..23b30b5d316 100644 --- a/llvm/test/CodeGen/X86/avx-schedule.ll +++ b/llvm/test/CodeGen/X86/avx-schedule.ll @@ -752,9 +752,7 @@ define <8 x float> @test_cvtdq2ps(<8 x i32> %a0, <8 x i32> *%a1) { ; GENERIC-LABEL: test_cvtdq2ps: ; GENERIC: # BB#0: ; GENERIC-NEXT: vcvtdq2ps %ymm0, %ymm0 # sched: [3:1.00] -; GENERIC-NEXT: vmovaps (%rdi), %xmm1 # sched: [6:0.50] -; GENERIC-NEXT: vinsertf128 $1, 16(%rdi), %ymm1, %ymm1 # sched: [7:0.50] -; GENERIC-NEXT: vcvtdq2ps %ymm1, %ymm1 # sched: [3:1.00] +; GENERIC-NEXT: vcvtdq2ps (%rdi), %ymm1 # sched: [10:1.00] ; GENERIC-NEXT: vaddps %ymm1, %ymm0, %ymm0 # sched: [3:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -1956,11 +1954,9 @@ define <8 x float> @test_movsldup(<8 x float> %a0, <8 x float> *%a1) { define <4 x double> @test_movupd(<4 x double> *%a0, <4 x double> *%a1) { ; GENERIC-LABEL: test_movupd: ; GENERIC: # BB#0: -; GENERIC-NEXT: vmovups (%rdi), %xmm0 # sched: [6:0.50] -; GENERIC-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:0.50] +; GENERIC-NEXT: vmovupd (%rdi), %ymm0 # sched: [7:0.50] ; GENERIC-NEXT: vaddpd %ymm0, %ymm0, %ymm0 # sched: [3:1.00] -; GENERIC-NEXT: vextractf128 $1, %ymm0, 16(%rsi) # sched: [5:1.00] -; GENERIC-NEXT: vmovupd %xmm0, (%rsi) # sched: [5:1.00] +; GENERIC-NEXT: vmovupd %ymm0, (%rsi) # sched: [5:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SANDY-LABEL: test_movupd: @@ -2001,11 +1997,9 @@ define <4 x double> @test_movupd(<4 x double> *%a0, <4 x double> *%a1) { define <8 x float> @test_movups(<8 x float> *%a0, <8 x float> *%a1) { ; GENERIC-LABEL: test_movups: ; GENERIC: # BB#0: -; GENERIC-NEXT: vmovups (%rdi), %xmm0 # sched: [6:0.50] -; GENERIC-NEXT: vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 # sched: [7:0.50] +; GENERIC-NEXT: vmovups (%rdi), %ymm0 # sched: [7:0.50] ; GENERIC-NEXT: vaddps %ymm0, %ymm0, %ymm0 # sched: [3:1.00] -; GENERIC-NEXT: vextractf128 $1, %ymm0, 16(%rsi) # sched: [5:1.00] -; GENERIC-NEXT: vmovups %xmm0, (%rsi) # sched: [5:1.00] +; GENERIC-NEXT: vmovups %ymm0, (%rsi) # sched: [5:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; ; SANDY-LABEL: test_movups: diff --git a/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll b/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll index bc89d90d5d8..665c5110e7c 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll @@ -299,8 +299,7 @@ define <4 x i32> @test_v16i32_0_1_2_12 (<16 x i32> %v) { define <8 x float> @shuffle_v16f32_extract_256(float* %RET, float* %a) { ; ALL-LABEL: shuffle_v16f32_extract_256: ; ALL: # BB#0: -; ALL-NEXT: vmovups 32(%rsi), %xmm0 -; ALL-NEXT: vinsertf128 $1, 48(%rsi), %ymm0, %ymm0 +; ALL-NEXT: vmovups 32(%rsi), %ymm0 ; ALL-NEXT: retq %ptr_a = bitcast float* %a to <16 x float>* %v_a = load <16 x float>, <16 x float>* %ptr_a, align 4 |
