diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/x86-flags-intrinsics.ll | 2 |
4 files changed, 10 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 59c0f199150..23c8a667c0b 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -23255,7 +23255,12 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, MI->getOpcode() == X86::RDFLAGS32 ? X86::PUSHF32 : X86::PUSHF64; unsigned Pop = MI->getOpcode() == X86::RDFLAGS32 ? X86::POP32r : X86::POP64r; - BuildMI(*BB, MI, DL, TII->get(PushF)); + MachineInstr *Push = BuildMI(*BB, MI, DL, TII->get(PushF)); + // Permit reads of the FLAGS register without it being defined. + // This intrinsic exists to read external processor state in flags, such as + // the trap flag, interrupt flag, and direction flag, none of which are + // modeled by the backend. + Push->getOperand(2).setIsUndef(); BuildMI(*BB, MI, DL, TII->get(Pop), MI->getOperand(0).getReg()); MI->eraseFromParent(); // The pseudo is gone now. diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 14956fcff09..70106251bbe 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -1122,12 +1122,12 @@ def PUSH32rmm: I<0xFF, MRM6m, (outs), (ins i32mem:$src), "push{l}\t$src",[], let mayLoad = 1, mayStore = 1, usesCustomInserter = 1, SchedRW = [WriteRMW], Defs = [ESP] in { - let Uses = [ESP, EFLAGS] in + let Uses = [ESP] in def RDFLAGS32 : PseudoI<(outs GR32:$dst), (ins), [(set GR32:$dst, (int_x86_flags_read_u32))]>, Requires<[Not64BitMode]>; - let Uses = [RSP, EFLAGS] in + let Uses = [RSP] in def RDFLAGS64 : PseudoI<(outs GR64:$dst), (ins), [(set GR64:$dst, (int_x86_flags_read_u64))]>, Requires<[In64BitMode]>; diff --git a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll index 4c5032aedbc..2852ef49e0a 100644 --- a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll +++ b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s target triple = "x86_64-pc-win32" declare i64 @llvm.x86.flags.read.u64() diff --git a/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll b/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll index 325de7d5f1e..e2233aec22c 100644 --- a/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll +++ b/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -verify-machineinstrs < %s | FileCheck %s target triple = "i686-pc-win32" declare i32 @llvm.x86.flags.read.u32() |
